提交 d89ddd1c 编写于 作者: M Magnus Damm 提交者: Paul Mundt

sh: remove support for sh7300 and solution engine 7300

This patch removes old dead code:
- kill off sh7300 cpu support
- get rid of broken solution engine 7300 board support
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
上级 32582fa4
...@@ -264,14 +264,6 @@ config SH_7780_SOLUTION_ENGINE ...@@ -264,14 +264,6 @@ config SH_7780_SOLUTION_ENGINE
Select 7780 SolutionEngine if configuring for a Renesas SH7780 Select 7780 SolutionEngine if configuring for a Renesas SH7780
evaluation board. evaluation board.
config SH_7300_SOLUTION_ENGINE
bool "SolutionEngine7300"
select SOLUTION_ENGINE
depends on CPU_SUBTYPE_SH7300
help
Select 7300 SolutionEngine if configuring for a Hitachi
SH7300(SH-Mobile V) evaluation board.
config SH_7343_SOLUTION_ENGINE config SH_7343_SOLUTION_ENGINE
bool "SolutionEngine7343" bool "SolutionEngine7343"
select SOLUTION_ENGINE select SOLUTION_ENGINE
...@@ -446,7 +438,7 @@ config SH_PCLK_FREQ ...@@ -446,7 +438,7 @@ config SH_PCLK_FREQ
default "27000000" if CPU_SUBTYPE_SH7343 default "27000000" if CPU_SUBTYPE_SH7343
default "31250000" if CPU_SUBTYPE_SH7619 default "31250000" if CPU_SUBTYPE_SH7619
default "32000000" if CPU_SUBTYPE_SH7722 default "32000000" if CPU_SUBTYPE_SH7722
default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \ default "33333333" if CPU_SUBTYPE_SH7770 || \
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
CPU_SUBTYPE_SH7206 CPU_SUBTYPE_SH7206
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
......
...@@ -91,7 +91,6 @@ machdir-$(CONFIG_SH_SOLUTION_ENGINE) += se/770x ...@@ -91,7 +91,6 @@ machdir-$(CONFIG_SH_SOLUTION_ENGINE) += se/770x
machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722 machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751 machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751
machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780 machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) += se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343 machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
machdir-$(CONFIG_SH_HP6XX) += hp6xx machdir-$(CONFIG_SH_HP6XX) += hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += dreamcast machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
......
#
# Makefile for the 7300 SolutionEngine specific parts of the kernel
#
obj-y := setup.o io.o irq.o
/*
* arch/sh/boards/se/7300/io.c
*
* Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
* Based on arch/sh/kernel/io_shmse.c
*
* I/O routine for SH-Mobile3 73180 SolutionEngine.
*
*/
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/se7300.h>
#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
struct iop {
unsigned long start, end;
unsigned long base;
struct iop *(*check) (struct iop * p, unsigned long port);
unsigned char (*inb) (struct iop * p, unsigned long port);
unsigned short (*inw) (struct iop * p, unsigned long port);
void (*outb) (struct iop * p, unsigned char value, unsigned long port);
void (*outw) (struct iop * p, unsigned short value, unsigned long port);
};
struct iop *
simple_check(struct iop *p, unsigned long port)
{
if ((p->start <= port) && (port <= p->end))
return p;
else
badio(check, port);
}
struct iop *
ide_check(struct iop *p, unsigned long port)
{
if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
return p;
return NULL;
}
unsigned char
simple_inb(struct iop *p, unsigned long port)
{
return *(unsigned char *) (p->base + port);
}
unsigned short
simple_inw(struct iop *p, unsigned long port)
{
return *(unsigned short *) (p->base + port);
}
void
simple_outb(struct iop *p, unsigned char value, unsigned long port)
{
*(unsigned char *) (p->base + port) = value;
}
void
simple_outw(struct iop *p, unsigned short value, unsigned long port)
{
*(unsigned short *) (p->base + port) = value;
}
unsigned char
pcc_inb(struct iop *p, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
unsigned long v;
if (port & 1)
addr += 0x00400000;
v = *(volatile unsigned char *) addr;
return v;
}
void
pcc_outb(struct iop *p, unsigned char value, unsigned long port)
{
unsigned long addr = p->base + port + 0x40000;
if (port & 1)
addr += 0x00400000;
*(volatile unsigned char *) addr = value;
}
unsigned char
bad_inb(struct iop *p, unsigned long port)
{
badio(inb, port);
}
void
bad_outb(struct iop *p, unsigned char value, unsigned long port)
{
badio(inw, port);
}
#ifdef CONFIG_SMC91X
/* MSTLANEX01 LAN at 0xb400:0000 */
static struct iop laniop = {
.start = 0x300,
.end = 0x30f,
.base = 0xb4000000,
.check = simple_check,
.inb = simple_inb,
.inw = simple_inw,
.outb = simple_outb,
.outw = simple_outw,
};
#endif
/* NE2000 pc card NIC */
static struct iop neiop = {
.start = 0x280,
.end = 0x29f,
.base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
.check = simple_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#ifdef CONFIG_IDE
/* CF in CF slot */
static struct iop cfiop = {
.base = 0xb0600000,
.check = ide_check,
.inb = pcc_inb,
.inw = simple_inw,
.outb = pcc_outb,
.outw = simple_outw,
};
#endif
static __inline__ struct iop *
port2iop(unsigned long port)
{
if (0) ;
#if defined(CONFIG_SMC91X)
else if (laniop.check(&laniop, port))
return &laniop;
#endif
#if defined(CONFIG_NE2000)
else if (neiop.check(&neiop, port))
return &neiop;
#endif
#if defined(CONFIG_IDE)
else if (cfiop.check(&cfiop, port))
return &cfiop;
#endif
else
return &neiop; /* fallback */
}
static inline void
delay(void)
{
ctrl_inw(0xac000000);
ctrl_inw(0xac000000);
}
unsigned char
sh7300se_inb(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inb) (p, port);
}
unsigned char
sh7300se_inb_p(unsigned long port)
{
unsigned char v = sh7300se_inb(port);
delay();
return v;
}
unsigned short
sh7300se_inw(unsigned long port)
{
struct iop *p = port2iop(port);
return (p->inw) (p, port);
}
unsigned int
sh7300se_inl(unsigned long port)
{
badio(inl, port);
}
void
sh7300se_outb(unsigned char value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outb) (p, value, port);
}
void
sh7300se_outb_p(unsigned char value, unsigned long port)
{
sh7300se_outb(value, port);
delay();
}
void
sh7300se_outw(unsigned short value, unsigned long port)
{
struct iop *p = port2iop(port);
(p->outw) (p, value, port);
}
void
sh7300se_outl(unsigned int value, unsigned long port)
{
badio(outl, port);
}
void
sh7300se_insb(unsigned long port, void *addr, unsigned long count)
{
unsigned char *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inb) (p, port);
}
void
sh7300se_insw(unsigned long port, void *addr, unsigned long count)
{
unsigned short *a = addr;
struct iop *p = port2iop(port);
while (count--)
*a++ = (p->inw) (p, port);
}
void
sh7300se_insl(unsigned long port, void *addr, unsigned long count)
{
badio(insl, port);
}
void
sh7300se_outsb(unsigned long port, const void *addr, unsigned long count)
{
unsigned char *a = (unsigned char *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outb) (p, *a++, port);
}
void
sh7300se_outsw(unsigned long port, const void *addr, unsigned long count)
{
unsigned short *a = (unsigned short *) addr;
struct iop *p = port2iop(port);
while (count--)
(p->outw) (p, *a++, port);
}
void
sh7300se_outsl(unsigned long port, const void *addr, unsigned long count)
{
badio(outsw, port);
}
/*
* linux/arch/sh/boards/se/7300/irq.c
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7300 Support.
*
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/se7300.h>
static struct ipr_data se7300_ipr_map[] = {
/* PC_IRQ[0-3] -> IRQ0 (32) */
{ IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ },
/* A_IRQ[0-3] -> IRQ1 (33) */
{ IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ },
{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
{ VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
};
/*
* Initialize IRQ setting
*/
void __init
init_7300se_IRQ(void)
{
ctrl_outw(0x0028, PA_EPLD_MODESET); /* mode set IRQ0,1 active low. */
ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */
ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */
make_ipr_irq(se7300_ipr_map, ARRAY_SIZE(se7300_ipr_map));
ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
}
/*
* linux/arch/sh/boards/se/7300/setup.c
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7300 Support.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se7300.h>
void init_7300se_IRQ(void);
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se7300_devices[] __initdata = {
&heartbeat_device,
};
static int __init se7300_devices_setup(void)
{
return platform_add_devices(se7300_devices, ARRAY_SIZE(se7300_devices));
}
__initcall(se7300_devices_setup);
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_7300se __initmv = {
.mv_name = "SolutionEngine 7300",
.mv_nr_irqs = 109,
.mv_inb = sh7300se_inb,
.mv_inw = sh7300se_inw,
.mv_inl = sh7300se_inl,
.mv_outb = sh7300se_outb,
.mv_outw = sh7300se_outw,
.mv_outl = sh7300se_outl,
.mv_inb_p = sh7300se_inb_p,
.mv_inw_p = sh7300se_inw,
.mv_inl_p = sh7300se_inl,
.mv_outb_p = sh7300se_outb_p,
.mv_outw_p = sh7300se_outw,
.mv_outl_p = sh7300se_outl,
.mv_insb = sh7300se_insb,
.mv_insw = sh7300se_insw,
.mv_insl = sh7300se_insl,
.mv_outsb = sh7300se_outsb,
.mv_outsw = sh7300se_outsw,
.mv_outsl = sh7300se_outsl,
.mv_init_irq = init_7300se_IRQ,
};
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.18
# Tue Oct 3 11:43:22 2006
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
# CONFIG_SWAP is not set
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_UTS_NS is not set
# CONFIG_IKCONFIG is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
# CONFIG_MODULES is not set
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
CONFIG_DEFAULT_NOOP=y
CONFIG_DEFAULT_IOSCHED="noop"
#
# System type
#
CONFIG_SOLUTION_ENGINE=y
# CONFIG_SH_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SOLUTION_ENGINE is not set
CONFIG_SH_7300_SOLUTION_ENGINE=y
# CONFIG_SH_7343_SOLUTION_ENGINE is not set
# CONFIG_SH_73180_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SYSTEMH is not set
# CONFIG_SH_HP6XX is not set
# CONFIG_SH_EC3104 is not set
# CONFIG_SH_SATURN is not set
# CONFIG_SH_DREAMCAST is not set
# CONFIG_SH_BIGSUR is not set
# CONFIG_SH_MPC1211 is not set
# CONFIG_SH_SH03 is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_HS7751RVOIP is not set
# CONFIG_SH_7710VOIPGW is not set
# CONFIG_SH_RTS7751R2D is not set
# CONFIG_SH_R7780RP is not set
# CONFIG_SH_EDOSK7705 is not set
# CONFIG_SH_SH4202_MICRODEV is not set
# CONFIG_SH_LANDISK is not set
# CONFIG_SH_TITAN is not set
# CONFIG_SH_SHMIN is not set
# CONFIG_SH_UNKNOWN is not set
#
# Processor selection
#
CONFIG_CPU_SH3=y
#
# SH-2 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7604 is not set
#
# SH-3 Processor Support
#
CONFIG_CPU_SUBTYPE_SH7300=y
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
#
# SH-4 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
# CONFIG_CPU_SUBTYPE_SH7751R is not set
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
#
# ST40 Processor Support
#
# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
#
# SH-4A Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
#
# SH4AL-DSP Processor Support
#
# CONFIG_CPU_SUBTYPE_SH73180 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
#
# Memory management options
#
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x04000000
CONFIG_VSYSCALL=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
#
# Cache configuration
#
# CONFIG_SH_DIRECT_MAPPED is not set
# CONFIG_SH_WRITETHROUGH is not set
# CONFIG_SH_OCRAM is not set
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_SH_FPU_EMU is not set
CONFIG_SH_DSP=y
# CONFIG_SH_ADC is not set
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y
#
# Timer support
#
CONFIG_SH_TMU=y
CONFIG_SH_PCLK_FREQ=33333333
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# DMA support
#
# CONFIG_SH_DMA is not set
#
# Companion Chips
#
# CONFIG_HD6446X_SERIES is not set
CONFIG_HEARTBEAT=y
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_KEXEC is not set
# CONFIG_SMP is not set
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00210000
# CONFIG_UBC_WAKEUP is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttySC0,38400 root=/dev/ram0"
#
# Bus options
#
# CONFIG_PCI is not set
#
# PCCARD (PCMCIA/CardBus) support
#
#
# PCI Hotplug Support
#
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_FLAT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options (EXPERIMENTAL)
#
# CONFIG_PM is not set
#
# Networking
#
# CONFIG_NET is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_NETLINK is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# ISDN subsystem
#
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_SERPORT is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=2
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_UNIX98_PTYS is not set
# CONFIG_LEGACY_PTYS is not set
#
# IPMI
#
CONFIG_IPMI_HANDLER=y
# CONFIG_IPMI_PANIC_EVENT is not set
CONFIG_IPMI_DEVICE_INTERFACE=y
# CONFIG_IPMI_SI is not set
CONFIG_IPMI_WATCHDOG=y
# CONFIG_IPMI_POWEROFF is not set
#
# Watchdog Cards
#
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
#
# Watchdog Device Drivers
#
CONFIG_SOFT_WATCHDOG=y
# CONFIG_SH_WDT is not set
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
#
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_FS is not set
CONFIG_FRAME_POINTER=y
# CONFIG_UNWIND_INFO is not set
CONFIG_SH_STANDARD_BIOS=y
CONFIG_EARLY_PRINTK=y
CONFIG_KGDB=y
#
# KGDB configuration options
#
# CONFIG_MORE_COMPILE_OPTIONS is not set
# CONFIG_KGDB_NMI is not set
# CONFIG_KGDB_THREAD is not set
# CONFIG_SH_KGDB_CONSOLE is not set
# CONFIG_KGDB_SYSRQ is not set
# CONFIG_KGDB_KERNEL_ASSERTS is not set
#
# Serial port setup
#
CONFIG_KGDB_DEFPORT=1
CONFIG_KGDB_DEFBAUD=115200
CONFIG_KGDB_DEFPARITY_N=y
# CONFIG_KGDB_DEFPARITY_E is not set
# CONFIG_KGDB_DEFPARITY_O is not set
CONFIG_KGDB_DEFBITS_8=y
# CONFIG_KGDB_DEFBITS_7 is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* *
* Supported system: * Supported system:
* On-chip supporting modules (TMU, RTC, etc.). * On-chip supporting modules (TMU, RTC, etc.).
* On-chip supporting modules for SH7709/SH7709A/SH7729/SH7300. * On-chip supporting modules for SH7709/SH7709A/SH7729.
* Hitachi SolutionEngine external I/O: * Hitachi SolutionEngine external I/O:
* MS7709SE01, MS7709ASE01, and MS7750SE01 * MS7709SE01, MS7709ASE01, and MS7750SE01
* *
......
...@@ -10,16 +10,14 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o ...@@ -10,16 +10,14 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o
obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
# Primary on-chip clocks (common) # Primary on-chip clocks (common)
clock-$(CONFIG_CPU_SH3) := clock-sh3.o clock-$(CONFIG_CPU_SH3) := clock-sh3.o
clock-$(CONFIG_CPU_SUBTYPE_SH7300) := clock-sh7300.o
clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o
clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7300.o clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
obj-y += $(clock-y) obj-y += $(clock-y)
/* /*
* arch/sh/kernel/cpu/sh3/clock-sh7300.c * arch/sh/kernel/cpu/sh3/clock-sh7710.c
* *
* SH7300 support for the clock framework * SH7710 support for the clock framework
* *
* Copyright (C) 2005 Paul Mundt * Copyright (C) 2005 Paul Mundt
* *
...@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk) ...@@ -29,7 +29,7 @@ static void master_clk_init(struct clk *clk)
clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007]; clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007];
} }
static struct clk_ops sh7300_master_clk_ops = { static struct clk_ops sh7710_master_clk_ops = {
.init = master_clk_init, .init = master_clk_init,
}; };
...@@ -39,7 +39,7 @@ static void module_clk_recalc(struct clk *clk) ...@@ -39,7 +39,7 @@ static void module_clk_recalc(struct clk *clk)
clk->rate = clk->parent->rate / md_table[idx]; clk->rate = clk->parent->rate / md_table[idx];
} }
static struct clk_ops sh7300_module_clk_ops = { static struct clk_ops sh7710_module_clk_ops = {
.recalc = module_clk_recalc, .recalc = module_clk_recalc,
}; };
...@@ -49,7 +49,7 @@ static void bus_clk_recalc(struct clk *clk) ...@@ -49,7 +49,7 @@ static void bus_clk_recalc(struct clk *clk)
clk->rate = clk->parent->rate / md_table[idx]; clk->rate = clk->parent->rate / md_table[idx];
} }
static struct clk_ops sh7300_bus_clk_ops = { static struct clk_ops sh7710_bus_clk_ops = {
.recalc = bus_clk_recalc, .recalc = bus_clk_recalc,
}; };
...@@ -59,20 +59,20 @@ static void cpu_clk_recalc(struct clk *clk) ...@@ -59,20 +59,20 @@ static void cpu_clk_recalc(struct clk *clk)
clk->rate = clk->parent->rate / md_table[idx]; clk->rate = clk->parent->rate / md_table[idx];
} }
static struct clk_ops sh7300_cpu_clk_ops = { static struct clk_ops sh7710_cpu_clk_ops = {
.recalc = cpu_clk_recalc, .recalc = cpu_clk_recalc,
}; };
static struct clk_ops *sh7300_clk_ops[] = { static struct clk_ops *sh7710_clk_ops[] = {
&sh7300_master_clk_ops, &sh7710_master_clk_ops,
&sh7300_module_clk_ops, &sh7710_module_clk_ops,
&sh7300_bus_clk_ops, &sh7710_bus_clk_ops,
&sh7300_cpu_clk_ops, &sh7710_cpu_clk_ops,
}; };
void __init arch_init_clk_ops(struct clk_ops **ops, int idx) void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
{ {
if (idx < ARRAY_SIZE(sh7300_clk_ops)) if (idx < ARRAY_SIZE(sh7710_clk_ops))
*ops = sh7300_clk_ops[idx]; *ops = sh7710_clk_ops[idx];
} }
/*
* SH7300 Setup
*
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xa4430000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCI,
.irqs = { 80, 80, 80, 80 },
}, {
.flags = 0,
}
};
static struct platform_device sci_device = {
.name = "sh-sci",
.id = -1,
.dev = {
.platform_data = sci_platform_data,
},
};
static struct platform_device *sh7300_devices[] __initdata = {
&sci_device,
};
static int __init sh7300_devices_setup(void)
{
return platform_add_devices(sh7300_devices,
ARRAY_SIZE(sh7300_devices));
}
__initcall(sh7300_devices_setup);
...@@ -276,7 +276,6 @@ void __init setup_arch(char **cmdline_p) ...@@ -276,7 +276,6 @@ void __init setup_arch(char **cmdline_p)
static const char *cpu_name[] = { static const char *cpu_name[] = {
[CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
[CPU_SH7300] = "SH7300",
[CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
[CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
[CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
......
...@@ -173,8 +173,7 @@ static int tmu_timer_init(void) ...@@ -173,8 +173,7 @@ static int tmu_timer_init(void)
tmu_timer_stop(); tmu_timer_stop();
#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && \ #if !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
!defined(CONFIG_CPU_SUBTYPE_SH7760) && \
!defined(CONFIG_CPU_SUBTYPE_SH7785) && \ !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
!defined(CONFIG_CPU_SUBTYPE_SHX3) !defined(CONFIG_CPU_SUBTYPE_SHX3)
ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
......
...@@ -63,10 +63,6 @@ config CPU_SUBTYPE_SH7206 ...@@ -63,10 +63,6 @@ config CPU_SUBTYPE_SH7206
# SH-3 Processor Support # SH-3 Processor Support
config CPU_SUBTYPE_SH7300
bool "Support SH7300 processor"
select CPU_SH3
config CPU_SUBTYPE_SH7705 config CPU_SUBTYPE_SH7705
bool "Support SH7705 processor" bool "Support SH7705 processor"
select CPU_SH3 select CPU_SH3
......
...@@ -8,7 +8,6 @@ ...@@ -8,7 +8,6 @@
SE SH_SOLUTION_ENGINE SE SH_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE 7751SE SH_7751_SOLUTION_ENGINE
7722SE SH_7722_SOLUTION_ENGINE 7722SE SH_7722_SOLUTION_ENGINE
7300SE SH_7300_SOLUTION_ENGINE
7343SE SH_7343_SOLUTION_ENGINE 7343SE SH_7343_SOLUTION_ENGINE
7206SE SH_7206_SOLUTION_ENGINE 7206SE SH_7206_SOLUTION_ENGINE
7619SE SH_7619_SOLUTION_ENGINE 7619SE SH_7619_SOLUTION_ENGINE
......
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
* Modified to support multiple serial ports. Stuart Menefy (May 2000). * Modified to support multiple serial ports. Stuart Menefy (May 2000).
* Modified to support SecureEdge. David McCullough (2002) * Modified to support SecureEdge. David McCullough (2002)
* Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003). * Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
* Removed SH7300 support (Jul 2007).
* *
* This file is subject to the terms and conditions of the GNU General Public * This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive * License. See the file "COPYING" in the main directory of this archive
...@@ -289,13 +290,7 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) ...@@ -289,13 +290,7 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
#endif #endif
#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
#if defined(CONFIG_CPU_SUBTYPE_SH7300) #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
/* SH7300 doesn't use RTS/CTS */
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
{
sci_out(port, SCFCR, 0);
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
{ {
unsigned int fcr_val = 0; unsigned int fcr_val = 0;
......
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
* Modified to support multiple serial ports. Stuart Menefy (May 2000). * Modified to support multiple serial ports. Stuart Menefy (May 2000).
* Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003). * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003).
* Modified to support H8/300 Series Yoshinori Sato (Feb 2004). * Modified to support H8/300 Series Yoshinori Sato (Feb 2004).
* Removed SH7300 support (Jul 2007).
*/ */
#include <linux/serial_core.h> #include <linux/serial_core.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -70,11 +71,6 @@ ...@@ -70,11 +71,6 @@
# define SCIF_ORER 0x0001 /* overrun error bit */ # define SCIF_ORER 0x0001 /* overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY # define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
# define SCPCR 0xA4050116 /* 16 bit SCIF */
# define SCPDR 0xA4050136 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
# define SCSPTR0 0xA4400000 /* 16 bit SCIF */ # define SCSPTR0 0xA4400000 /* 16 bit SCIF */
# define SCI_NPORTS 2 # define SCI_NPORTS 2
...@@ -221,7 +217,7 @@ ...@@ -221,7 +217,7 @@
#define SCIF_RDF 0x0002 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ #define SCIF_RDF 0x0002 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */
#define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ #define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) #if defined(CONFIG_CPU_SUBTYPE_SH7705)
#define SCIF_ORER 0x0200 #define SCIF_ORER 0x0200
#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
#define SCIF_RFDC_MASK 0x007f #define SCIF_RFDC_MASK 0x007f
...@@ -250,7 +246,7 @@ ...@@ -250,7 +246,7 @@
# define SCxSR_ERRORS(port) SCIF_ERRORS # define SCxSR_ERRORS(port) SCIF_ERRORS
# define SCxSR_RDxF(port) SCIF_RDF # define SCxSR_RDxF(port) SCIF_RDF
# define SCxSR_TDxE(port) SCIF_TDFE # define SCxSR_TDxE(port) SCIF_TDFE
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) #if defined(CONFIG_CPU_SUBTYPE_SH7705)
# define SCxSR_ORER(port) SCIF_ORER # define SCxSR_ORER(port) SCIF_ORER
#else #else
# define SCxSR_ORER(port) 0x0000 # define SCxSR_ORER(port) 0x0000
...@@ -258,13 +254,13 @@ ...@@ -258,13 +254,13 @@
# define SCxSR_FER(port) SCIF_FER # define SCxSR_FER(port) SCIF_FER
# define SCxSR_PER(port) SCIF_PER # define SCxSR_PER(port) SCIF_PER
# define SCxSR_BRK(port) SCIF_BRK # define SCxSR_BRK(port) SCIF_BRK
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) #if defined(CONFIG_CPU_SUBTYPE_SH7705)
# define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc) # define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc)
# define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73) # define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73)
# define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf) # define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf)
# define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3) # define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3)
#else #else
/* SH7705 can also use this, clearing is same between 7705 and 7709 and 7300 */ /* SH7705 can also use this, clearing is same between 7705 and 7709 */
# define SCxSR_RDxF_CLEAR(port) 0x00fc # define SCxSR_RDxF_CLEAR(port) 0x00fc
# define SCxSR_ERROR_CLEAR(port) 0x0073 # define SCxSR_ERROR_CLEAR(port) 0x0073
# define SCxSR_TDxE_CLEAR(port) 0x00df # define SCxSR_TDxE_CLEAR(port) 0x00df
...@@ -366,8 +362,7 @@ ...@@ -366,8 +362,7 @@
CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size) CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ #define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ #elif defined(CONFIG_CPU_SUBTYPE_SH7705)
defined(CONFIG_CPU_SUBTYPE_SH7705)
#define SCIF_FNS(name, scif_offset, scif_size) \ #define SCIF_FNS(name, scif_offset, scif_size) \
CPU_SCIF_FNS(name, scif_offset, scif_size) CPU_SCIF_FNS(name, scif_offset, scif_size)
#else #else
...@@ -393,8 +388,7 @@ ...@@ -393,8 +388,7 @@
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7705)
defined(CONFIG_CPU_SUBTYPE_SH7705)
SCIF_FNS(SCSMR, 0x00, 16) SCIF_FNS(SCSMR, 0x00, 16)
SCIF_FNS(SCBRR, 0x04, 8) SCIF_FNS(SCBRR, 0x04, 8)
...@@ -547,13 +541,6 @@ static inline int sci_rxd_in(struct uart_port *port) ...@@ -547,13 +541,6 @@ static inline int sci_rxd_in(struct uart_port *port)
return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
return 1; return 1;
} }
#elif defined(CONFIG_CPU_SUBTYPE_SH7300)
static inline int sci_rxd_in(struct uart_port *port)
{
if (port->mapbase == 0xa4430000)
return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCIF0 */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7343) #elif defined(CONFIG_CPU_SUBTYPE_SH7343)
static inline int sci_rxd_in(struct uart_port *port) static inline int sci_rxd_in(struct uart_port *port)
{ {
...@@ -701,8 +688,7 @@ static inline int sci_rxd_in(struct uart_port *port) ...@@ -701,8 +688,7 @@ static inline int sci_rxd_in(struct uart_port *port)
* -- Mitch Davis - 15 Jul 2000 * -- Mitch Davis - 15 Jul 2000
*/ */
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785) defined(CONFIG_CPU_SUBTYPE_SH7785)
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705) #elif defined(CONFIG_CPU_SUBTYPE_SH7705)
......
...@@ -29,7 +29,7 @@ static void __init check_bugs(void) ...@@ -29,7 +29,7 @@ static void __init check_bugs(void)
*p++ = '2'; *p++ = '2';
*p++ = 'a'; *p++ = 'a';
break; break;
case CPU_SH7705 ... CPU_SH7300: case CPU_SH7705 ... CPU_SH7729:
*p++ = '3'; *p++ = '3';
break; break;
case CPU_SH7750 ... CPU_SH4_501: case CPU_SH7750 ... CPU_SH4_501:
......
...@@ -10,11 +10,7 @@ ...@@ -10,11 +10,7 @@
#ifndef __ASM_CPU_SH3_FREQ_H #ifndef __ASM_CPU_SH3_FREQ_H
#define __ASM_CPU_SH3_FREQ_H #define __ASM_CPU_SH3_FREQ_H
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
#define FRQCR 0xa415ff80
#else
#define FRQCR 0xffffff80 #define FRQCR 0xffffff80
#endif
#define MIN_DIVISOR_NR 0 #define MIN_DIVISOR_NR 0
#define MAX_DIVISOR_NR 4 #define MAX_DIVISOR_NR 4
......
...@@ -30,7 +30,6 @@ ...@@ -30,7 +30,6 @@
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \ defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \ defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \ defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7712) || \ defined(CONFIG_CPU_SUBTYPE_SH7712) || \
defined(CONFIG_CPU_SUBTYPE_SH7710) defined(CONFIG_CPU_SUBTYPE_SH7710)
......
...@@ -19,7 +19,6 @@ ...@@ -19,7 +19,6 @@
* SH7729R * SH7729R
* SH7710 * SH7710
* SH7720 * SH7720
* SH7300
* SH7710 * SH7710
* --------------------------------------------------------------------------- * ---------------------------------------------------------------------------
*/ */
...@@ -28,7 +27,7 @@ ...@@ -28,7 +27,7 @@
#define TMU_TOCR 0xfffffe90 /* Byte access */ #define TMU_TOCR 0xfffffe90 /* Byte access */
#endif #endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) #if defined(CONFIG_CPU_SUBTYPE_SH7710)
#define TMU_012_TSTR 0xa412fe92 /* Byte access */ #define TMU_012_TSTR 0xa412fe92 /* Byte access */
#define TMU0_TCOR 0xa412fe94 /* Long access */ #define TMU0_TCOR 0xa412fe94 /* Long access */
......
...@@ -45,7 +45,7 @@ enum cpu_type { ...@@ -45,7 +45,7 @@ enum cpu_type {
CPU_SH7705, CPU_SH7706, CPU_SH7707, CPU_SH7705, CPU_SH7706, CPU_SH7707,
CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
CPU_SH7729, CPU_SH7300, CPU_SH7729,
/* SH-4 types */ /* SH-4 types */
CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
......
#ifndef __ASM_SH_HITACHI_SE7300_H
#define __ASM_SH_HITACHI_SE7300_H
/*
* linux/include/asm-sh/se/se7300.h
*
* Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
*
* SH-Mobile SolutionEngine 7300 support
*/
/* Box specific addresses. */
/* Area 0 */
#define PA_ROM 0x00000000 /* EPROM */
#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
#define PA_FROM 0x00400000 /* Flash ROM */
#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
#define PA_SRAM 0x00800000 /* SRAM */
#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
/* Area 1 */
#define PA_EXT1 0x04000000
#define PA_EXT1_SIZE 0x04000000
/* Area 2 */
#define PA_EXT2 0x08000000
#define PA_EXT2_SIZE 0x04000000
/* Area 3 */
#define PA_SDRAM 0x0c000000
#define PA_SDRAM_SIZE 0x04000000
/* Area 4 */
#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
#define MRSHPC_OPTION (PA_MRSHPC + 6)
#define MRSHPC_CSR (PA_MRSHPC + 8)
#define MRSHPC_ISR (PA_MRSHPC + 10)
#define MRSHPC_ICR (PA_MRSHPC + 12)
#define MRSHPC_CPWCR (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
#define MRSHPC_CDCR (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED 0xb0800000 /* LED */
#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
/* Area 5 */
#define PA_EXT5 0x14000000
#define PA_EXT5_SIZE 0x04000000
/* Area 6 */
#define PA_LCD1 0xb8000000
#define PA_LCD2 0xb8800000
#define __IO_PREFIX sh7300se
#include <asm/io_generic.h>
#endif /* __ASM_SH_HITACHI_SE7300_H */
...@@ -15,8 +15,7 @@ ...@@ -15,8 +15,7 @@
#include <asm/cpu/ubc.h> #include <asm/cpu/ubc.h>
/* User Break Controller */ /* User Break Controller */
#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
defined(CONFIG_CPU_SUBTYPE_SH7300)
#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) #define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
#else #else
#define UBC_TYPE_SH7729 0 #define UBC_TYPE_SH7729 0
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册