drm/vc4: hvs: Boost the core clock during modeset
In order to prevent timeouts and stalls in the pipeline, the core clock needs to be maxed at 500MHz during a modeset on the BCM2711. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Tested-by: NHoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: NStefan Wahren <stefan.wahren@i2se.com> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/37ed9e0124c5cce005ddc8dafe821d8b0da036ff.1599120059.git-series.maxime@cerno.tech
Showing
想要评论请 注册 或 登录