提交 d5490f1f 编写于 作者: M Martin Blumenstingl 提交者: David S. Miller

net: dt-bindings: add RGMII TX delay configuration to meson8b-dwmac

This allows configuring the RGMII TX clock delay. The RGMII clock is
generated by underlying hardware of the the Meson 8b / GXBB DWMAC glue.
The configuration depends on the actual hardware (no delay may be
needed due to the design of the actual circuit, the PHY might add this
delay, etc.).
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: NNeil Armstrong <narmstrong@baylibre.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 23e3d618
......@@ -25,6 +25,22 @@ Required properties on Meson8b and newer:
- "clkin0" - first parent clock of the internal mux
- "clkin1" - second parent clock of the internal mux
Optional properties on Meson8b and newer:
- amlogic,tx-delay-ns: The internal RGMII TX clock delay (provided
by this driver) in nanoseconds. Allowed values
are: 0ns, 2ns, 4ns, 6ns.
When phy-mode is set to "rgmii" then the TX
delay should be explicitly configured. When
not configured a fallback of 2ns is used.
When the phy-mode is set to either "rgmii-id"
or "rgmii-txid" the TX clock delay is already
provided by the PHY. In that case this
property should be set to 0ns (which disables
the TX clock delay in the MAC to prevent the
clock from going off because both PHY and MAC
are adding a delay).
Any configuration is ignored when the phy-mode
is set to "rmii".
Example for Meson6:
......
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