未验证 提交 d45329b6 编写于 作者: O openeuler-ci-bot 提交者: Gitee

!588 [sync] PR-585: x86/speculation: Allow enabling STIBP with legacy IBRS

Merge Pull Request from: @openeuler-sync-bot 
 

Origin pull request: 
https://gitee.com/openeuler/kernel/pulls/585 
 
PR sync from:  Wei Li <liwei391@huawei.com>
 https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/thread/UNWNKYXBCMVT2QIU4QPROMO5UMGXKQS7/ 
 
 
Link:https://gitee.com/openeuler/kernel/pulls/588 

Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
...@@ -1051,14 +1051,18 @@ spectre_v2_parse_user_cmdline(void) ...@@ -1051,14 +1051,18 @@ spectre_v2_parse_user_cmdline(void)
return SPECTRE_V2_USER_CMD_AUTO; return SPECTRE_V2_USER_CMD_AUTO;
} }
static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode) static inline bool spectre_v2_in_eibrs_mode(enum spectre_v2_mitigation mode)
{ {
return mode == SPECTRE_V2_IBRS || return mode == SPECTRE_V2_EIBRS ||
mode == SPECTRE_V2_EIBRS ||
mode == SPECTRE_V2_EIBRS_RETPOLINE || mode == SPECTRE_V2_EIBRS_RETPOLINE ||
mode == SPECTRE_V2_EIBRS_LFENCE; mode == SPECTRE_V2_EIBRS_LFENCE;
} }
static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode)
{
return spectre_v2_in_eibrs_mode(mode) || mode == SPECTRE_V2_IBRS;
}
static void __init static void __init
spectre_v2_user_select_mitigation(void) spectre_v2_user_select_mitigation(void)
{ {
...@@ -1121,12 +1125,19 @@ spectre_v2_user_select_mitigation(void) ...@@ -1121,12 +1125,19 @@ spectre_v2_user_select_mitigation(void)
} }
/* /*
* If no STIBP, IBRS or enhanced IBRS is enabled, or SMT impossible, * If no STIBP, enhanced IBRS is enabled, or SMT impossible, STIBP
* STIBP is not required. * is not required.
*
* Enhanced IBRS also protects against cross-thread branch target
* injection in user-mode as the IBRS bit remains always set which
* implicitly enables cross-thread protections. However, in legacy IBRS
* mode, the IBRS bit is set only on kernel entry and cleared on return
* to userspace. This disables the implicit cross-thread protection,
* so allow for STIBP to be selected in that case.
*/ */
if (!boot_cpu_has(X86_FEATURE_STIBP) || if (!boot_cpu_has(X86_FEATURE_STIBP) ||
!smt_possible || !smt_possible ||
spectre_v2_in_ibrs_mode(spectre_v2_enabled)) spectre_v2_in_eibrs_mode(spectre_v2_enabled))
return; return;
/* /*
...@@ -2220,7 +2231,7 @@ static ssize_t mmio_stale_data_show_state(char *buf) ...@@ -2220,7 +2231,7 @@ static ssize_t mmio_stale_data_show_state(char *buf)
static char *stibp_state(void) static char *stibp_state(void)
{ {
if (spectre_v2_in_ibrs_mode(spectre_v2_enabled)) if (spectre_v2_in_eibrs_mode(spectre_v2_enabled))
return ""; return "";
switch (spectre_v2_user_stibp) { switch (spectre_v2_user_stibp) {
......
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