drm/amd/powerplay: move clock dpm enablement check to smu_v11/v12

As those APIs of smu_v11/v12 are more widely called. And they
need this check also.
Signed-off-by: NEvan Quan <evan.quan@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

@@ -262,9 +262,6 @@ int smu_set_soft_freq_range(struct smu_context *smu,
 {
 	int ret = 0;
 
-	if (!smu_clk_dpm_is_enabled(smu, clk_type))
-		return 0;
-
 	mutex_lock(&smu->mutex);
 
 	if (smu->ppt_funcs->set_soft_freq_limited_range)

drivers/gpu/drm/amd/powerplay/smu_v11_0.c

@@ -1769,6 +1769,9 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu,
 	int ret = 0, clk_id = 0;
 	uint32_t param;
 
+	if (!smu_clk_dpm_is_enabled(smu, clk_type))
+		return 0;
+
 	clk_id = smu_cmn_to_asic_specific_index(smu,
 						CMN2ASIC_MAPPING_CLK,
 						clk_type);

drivers/gpu/drm/amd/powerplay/smu_v12_0.c

@@ -328,6 +328,9 @@ int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_
 {
 	int ret = 0;
 
+	if (!smu_clk_dpm_is_enabled(smu, clk_type))
+		return 0;
+
 	switch (clk_type) {
 	case SMU_GFXCLK:
 	case SMU_SCLK: