提交 d048a268 编写于 作者: V Ville Syrjälä

drm/i915: Use enum pipe consistently

Replace all "int pipe"s with "enum pipe pipe"s to make it clear
what we're dealing with.
Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190821173033.24123-3-ville.syrjala@linux.intel.comReviewed-by: NJani Nikula <jani.nikula@intel.com>
上级 e8edae54
...@@ -490,7 +490,7 @@ static const struct intel_limit intel_limits_bxt = { ...@@ -490,7 +490,7 @@ static const struct intel_limit intel_limits_bxt = {
/* WA Display #0827: Gen9:all */ /* WA Display #0827: Gen9:all */
static void static void
skl_wa_827(struct drm_i915_private *dev_priv, int pipe, bool enable) skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable)
{ {
if (enable) if (enable)
I915_WRITE(CLKGATE_DIS_PSL(pipe), I915_WRITE(CLKGATE_DIS_PSL(pipe),
...@@ -4421,7 +4421,7 @@ static void intel_fdi_normal_train(struct intel_crtc *crtc) ...@@ -4421,7 +4421,7 @@ static void intel_fdi_normal_train(struct intel_crtc *crtc)
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp; u32 temp;
...@@ -4464,7 +4464,7 @@ static void ironlake_fdi_link_train(struct intel_crtc *crtc, ...@@ -4464,7 +4464,7 @@ static void ironlake_fdi_link_train(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp, tries; u32 temp, tries;
...@@ -4565,7 +4565,7 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc, ...@@ -4565,7 +4565,7 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp, i, retry; u32 temp, i, retry;
...@@ -4698,7 +4698,7 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc, ...@@ -4698,7 +4698,7 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp, i, j; u32 temp, i, j;
...@@ -4816,7 +4816,7 @@ static void ironlake_fdi_pll_enable(const struct intel_crtc_state *crtc_state) ...@@ -4816,7 +4816,7 @@ static void ironlake_fdi_pll_enable(const struct intel_crtc_state *crtc_state)
{ {
struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp; u32 temp;
...@@ -4853,7 +4853,7 @@ static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc) ...@@ -4853,7 +4853,7 @@ static void ironlake_fdi_pll_disable(struct intel_crtc *intel_crtc)
{ {
struct drm_device *dev = intel_crtc->base.dev; struct drm_device *dev = intel_crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp; u32 temp;
...@@ -4884,7 +4884,7 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc) ...@@ -4884,7 +4884,7 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
i915_reg_t reg; i915_reg_t reg;
u32 temp; u32 temp;
...@@ -5199,7 +5199,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state, ...@@ -5199,7 +5199,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
u32 temp; u32 temp;
assert_pch_transcoder_disabled(dev_priv, pipe); assert_pch_transcoder_disabled(dev_priv, pipe);
...@@ -5294,7 +5294,7 @@ static void lpt_pch_enable(const struct intel_atomic_state *state, ...@@ -5294,7 +5294,7 @@ static void lpt_pch_enable(const struct intel_atomic_state *state,
lpt_enable_pch_transcoder(dev_priv, cpu_transcoder); lpt_enable_pch_transcoder(dev_priv, cpu_transcoder);
} }
static void cpt_verify_modeset(struct drm_device *dev, int pipe) static void cpt_verify_modeset(struct drm_device *dev, enum pipe pipe)
{ {
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
i915_reg_t dslreg = PIPEDSL(pipe); i915_reg_t dslreg = PIPEDSL(pipe);
...@@ -5633,7 +5633,7 @@ static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state) ...@@ -5633,7 +5633,7 @@ static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state)
{ {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
if (crtc_state->pch_pfit.enabled) { if (crtc_state->pch_pfit.enabled) {
/* Force use of hard-coded filter coefficients /* Force use of hard-coded filter coefficients
...@@ -5746,7 +5746,7 @@ intel_post_enable_primary(struct drm_crtc *crtc, ...@@ -5746,7 +5746,7 @@ intel_post_enable_primary(struct drm_crtc *crtc,
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
/* /*
* Gen2 reports pipe underruns whenever all planes are disabled. * Gen2 reports pipe underruns whenever all planes are disabled.
...@@ -5770,7 +5770,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc) ...@@ -5770,7 +5770,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
/* /*
* Gen2 reports pipe underruns whenever all planes are disabled. * Gen2 reports pipe underruns whenever all planes are disabled.
...@@ -6293,7 +6293,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -6293,7 +6293,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
if (WARN_ON(intel_crtc->active)) if (WARN_ON(intel_crtc->active))
return; return;
...@@ -6426,7 +6426,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -6426,7 +6426,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
struct drm_crtc *crtc = pipe_config->base.crtc; struct drm_crtc *crtc = pipe_config->base.crtc;
struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct drm_i915_private *dev_priv = to_i915(crtc->dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe, hsw_workaround_pipe; enum pipe pipe = intel_crtc->pipe, hsw_workaround_pipe;
enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
bool psl_clkgate_wa; bool psl_clkgate_wa;
...@@ -6552,7 +6552,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state, ...@@ -6552,7 +6552,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
/* /*
* Sometimes spurious CPU pipe underruns happen when the * Sometimes spurious CPU pipe underruns happen when the
...@@ -6839,7 +6839,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -6839,7 +6839,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
if (WARN_ON(intel_crtc->active)) if (WARN_ON(intel_crtc->active))
return; return;
...@@ -6971,7 +6971,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state, ...@@ -6971,7 +6971,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
/* /*
* On gen2 planes are double buffered but the pipe isn't, so we must * On gen2 planes are double buffered but the pipe isn't, so we must
...@@ -8543,7 +8543,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc, ...@@ -8543,7 +8543,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = pipe_config->cpu_transcoder; enum pipe pipe = crtc->pipe;
struct dpll clock; struct dpll clock;
u32 mdiv; u32 mdiv;
int refclk = 100000; int refclk = 100000;
...@@ -8653,7 +8653,7 @@ static void chv_crtc_clock_get(struct intel_crtc *crtc, ...@@ -8653,7 +8653,7 @@ static void chv_crtc_clock_get(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = pipe_config->cpu_transcoder; enum pipe pipe = crtc->pipe;
enum dpio_channel port = vlv_pipe_to_channel(pipe); enum dpio_channel port = vlv_pipe_to_channel(pipe);
struct dpll clock; struct dpll clock;
u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3; u32 cmn_dw13, pll_dw0, pll_dw1, pll_dw2, pll_dw3;
...@@ -11265,7 +11265,7 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc, ...@@ -11265,7 +11265,7 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
{ {
struct drm_device *dev = crtc->base.dev; struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
int pipe = pipe_config->cpu_transcoder; enum pipe pipe = crtc->pipe;
u32 dpll = pipe_config->dpll_hw_state.dpll; u32 dpll = pipe_config->dpll_hw_state.dpll;
u32 fp; u32 fp;
struct dpll clock; struct dpll clock;
......
...@@ -1509,7 +1509,7 @@ intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe) ...@@ -1509,7 +1509,7 @@ intel_wait_for_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
drm_wait_one_vblank(&dev_priv->drm, pipe); drm_wait_one_vblank(&dev_priv->drm, pipe);
} }
static inline void static inline void
intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, int pipe) intel_wait_for_vblank_if_active(struct drm_i915_private *dev_priv, enum pipe pipe)
{ {
const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe); const struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
......
...@@ -280,7 +280,7 @@ static void intel_dvo_pre_enable(struct intel_encoder *encoder, ...@@ -280,7 +280,7 @@ static void intel_dvo_pre_enable(struct intel_encoder *encoder,
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
struct intel_dvo *intel_dvo = enc_to_dvo(encoder); struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
u32 dvo_val; u32 dvo_val;
i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
......
...@@ -232,7 +232,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder, ...@@ -232,7 +232,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
int pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
u32 temp; u32 temp;
if (HAS_PCH_SPLIT(dev_priv)) { if (HAS_PCH_SPLIT(dev_priv)) {
......
...@@ -749,7 +749,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, ...@@ -749,7 +749,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
struct drm_crtc *crtc = pipe_config->base.crtc; struct drm_crtc *crtc = pipe_config->base.crtc;
struct drm_i915_private *dev_priv = to_i915(crtc->dev); struct drm_i915_private *dev_priv = to_i915(crtc->dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe; enum pipe pipe = intel_crtc->pipe;
enum port port; enum port port;
u32 val; u32 val;
bool glk_cold_boot = false; bool glk_cold_boot = false;
......
...@@ -376,7 +376,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data) ...@@ -376,7 +376,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
static void gen8_display_interrupt_info(struct seq_file *m) static void gen8_display_interrupt_info(struct seq_file *m)
{ {
struct drm_i915_private *dev_priv = node_to_i915(m->private); struct drm_i915_private *dev_priv = node_to_i915(m->private);
int pipe; enum pipe pipe;
for_each_pipe(dev_priv, pipe) { for_each_pipe(dev_priv, pipe) {
enum intel_display_power_domain power_domain; enum intel_display_power_domain power_domain;
......
...@@ -1716,7 +1716,7 @@ static void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv) ...@@ -1716,7 +1716,7 @@ static void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv, static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,
u32 iir, u32 pipe_stats[I915_MAX_PIPES]) u32 iir, u32 pipe_stats[I915_MAX_PIPES])
{ {
int pipe; enum pipe pipe;
spin_lock(&dev_priv->irq_lock); spin_lock(&dev_priv->irq_lock);
...@@ -1741,6 +1741,7 @@ static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv, ...@@ -1741,6 +1741,7 @@ static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,
status_mask = PIPE_FIFO_UNDERRUN_STATUS; status_mask = PIPE_FIFO_UNDERRUN_STATUS;
switch (pipe) { switch (pipe) {
default:
case PIPE_A: case PIPE_A:
iir_bit = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT; iir_bit = I915_DISPLAY_PIPE_A_EVENT_INTERRUPT;
break; break;
...@@ -2136,7 +2137,7 @@ static void ibx_hpd_irq_handler(struct drm_i915_private *dev_priv, ...@@ -2136,7 +2137,7 @@ static void ibx_hpd_irq_handler(struct drm_i915_private *dev_priv,
static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
{ {
int pipe; enum pipe pipe;
u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK; u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
ibx_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ibx); ibx_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ibx);
...@@ -2222,7 +2223,7 @@ static void cpt_serr_int_handler(struct drm_i915_private *dev_priv) ...@@ -2222,7 +2223,7 @@ static void cpt_serr_int_handler(struct drm_i915_private *dev_priv)
static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir) static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
{ {
int pipe; enum pipe pipe;
u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT; u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
ibx_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_cpt); ibx_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_cpt);
...@@ -3246,7 +3247,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv) ...@@ -3246,7 +3247,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
static void gen8_irq_reset(struct drm_i915_private *dev_priv) static void gen8_irq_reset(struct drm_i915_private *dev_priv)
{ {
struct intel_uncore *uncore = &dev_priv->uncore; struct intel_uncore *uncore = &dev_priv->uncore;
int pipe; enum pipe pipe;
gen8_master_intr_disable(dev_priv->uncore.regs); gen8_master_intr_disable(dev_priv->uncore.regs);
...@@ -3271,7 +3272,7 @@ static void gen8_irq_reset(struct drm_i915_private *dev_priv) ...@@ -3271,7 +3272,7 @@ static void gen8_irq_reset(struct drm_i915_private *dev_priv)
static void gen11_irq_reset(struct drm_i915_private *dev_priv) static void gen11_irq_reset(struct drm_i915_private *dev_priv)
{ {
struct intel_uncore *uncore = &dev_priv->uncore; struct intel_uncore *uncore = &dev_priv->uncore;
int pipe; enum pipe pipe;
gen11_master_intr_disable(dev_priv->uncore.regs); gen11_master_intr_disable(dev_priv->uncore.regs);
......
...@@ -8858,7 +8858,7 @@ static void ilk_init_clock_gating(struct drm_i915_private *dev_priv) ...@@ -8858,7 +8858,7 @@ static void ilk_init_clock_gating(struct drm_i915_private *dev_priv)
static void cpt_init_clock_gating(struct drm_i915_private *dev_priv) static void cpt_init_clock_gating(struct drm_i915_private *dev_priv)
{ {
int pipe; enum pipe pipe;
u32 val; u32 val;
/* /*
......
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