提交 d0174640 编写于 作者: L Linus Torvalds

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6:
  drivers/net/pcmcia/3c589_cs: fix port configuration switcheroo
  sk98lin: resurrect driver
  ucc_geth: fix compilation
  mv643xx_eth: Fix tx_bytes stats calculation
  As struct iw_point is bi-directional payload, we should copy back the content
  [PATCH] bcm43xx: Fix cancellation of work queue crashes
  spidernet: fix interrupt reason recognition
  ehea: fix last_rx update
  ehea: propagate physical port state
  Fix a lock problem in generic phy code
  sky2: restore multicast list on resume and other ops
  atl1: disable broken 64-bit DMA
......@@ -298,3 +298,11 @@ Why: All mthca hardware also supports MSI-X, which provides
Who: Roland Dreier <rolandd@cisco.com>
---------------------------
What: sk98lin network driver
When: Feburary 2008
Why: In kernel tree version of driver is unmaintained. Sk98lin driver
replaced by the skge driver.
Who: Stephen Hemminger <shemminger@linux-foundation.org>
---------------------------
......@@ -96,6 +96,9 @@ routing.txt
- the new routing mechanism
shaper.txt
- info on the module that can shape/limit transmitted traffic.
sk98lin.txt
- Marvell Yukon Chipset / SysKonnect SK-98xx compliant Gigabit
Ethernet Adapter family driver info
skfp.txt
- SysKonnect FDDI (SK-5xxx, Compaq Netelligent) driver info.
smc9.txt
......
此差异已折叠。
......@@ -2177,7 +2177,7 @@ config SKGE
with better performance and more complete ethtool support.
It does not support the link failover and network management
features available in the hardware.
features that "portable" vendor supplied sk98lin driver does.
This driver supports adapters based on the original Yukon chipset:
Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
......@@ -2215,6 +2215,93 @@ config SKY2_DEBUG
If unsure, say N.
config SK98LIN
tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support (DEPRECATED)"
depends on PCI
---help---
Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
compliant Gigabit Ethernet Adapter.
This driver supports the original Yukon chipset. This driver is
deprecated and will be removed from the kernel in the near future,
it has been replaced by the skge driver. skge is cleaner and
seems to work better.
This driver does not support the newer Yukon2 chipset. A separate
driver, sky2, is provided to support Yukon2-based adapters.
The following adapters are supported by this driver:
- 3Com 3C940 Gigabit LOM Ethernet Adapter
- 3Com 3C941 Gigabit LOM Ethernet Adapter
- Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
- Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
- Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
- Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
- Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
- Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
- Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
- Allied Telesyn AT-2971T Gigabit Ethernet Adapter
- Belkin Gigabit Desktop Card 10/100/1000Base-T Adapter, Copper RJ-45
- EG1032 v2 Instant Gigabit Network Adapter
- EG1064 v2 Instant Gigabit Network Adapter
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Abit)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Albatron)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Asus)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (ECS)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Epox)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Foxconn)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Gigabyte)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Iwill)
- Marvell 88E8050 Gigabit LOM Ethernet Adapter (Intel)
- Marvell RDK-8001 Adapter
- Marvell RDK-8002 Adapter
- Marvell RDK-8003 Adapter
- Marvell RDK-8004 Adapter
- Marvell RDK-8006 Adapter
- Marvell RDK-8007 Adapter
- Marvell RDK-8008 Adapter
- Marvell RDK-8009 Adapter
- Marvell RDK-8010 Adapter
- Marvell RDK-8011 Adapter
- Marvell RDK-8012 Adapter
- Marvell RDK-8052 Adapter
- Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (32 bit)
- Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (64 bit)
- N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
- SK-9521 10/100/1000Base-T Adapter
- SK-9521 V2.0 10/100/1000Base-T Adapter
- SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
- SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
- SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
- SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
- SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
- SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
- SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
- SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
- SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
- SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
- SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
- SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
- SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
- SMC EZ Card 1000 (SMC9452TXV.2)
The adapters support Jumbo Frames.
The dual link adapters support link-failover and dual port features.
Both Marvell Yukon and SysKonnect SK-98xx/SK-95xx adapters support
the scatter-gather functionality with sendfile(). Please refer to
<file:Documentation/networking/sk98lin.txt> for more information about
optional driver parameters.
Questions concerning this driver may be addressed to:
<linux@syskonnect.de>
If you want to compile this driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
say M here and read <file:Documentation/kbuild/modules.txt>. The module will
be called sk98lin. This is recommended.
config VIA_VELOCITY
tristate "VIA Velocity support"
depends on PCI
......
......@@ -66,6 +66,7 @@ ps3_gelic-objs += ps3_gelic_net.o
obj-$(CONFIG_TC35815) += tc35815.o
obj-$(CONFIG_SKGE) += skge.o
obj-$(CONFIG_SKY2) += sky2.o
obj-$(CONFIG_SK98LIN) += sk98lin/
obj-$(CONFIG_SKFP) += skfp/
obj-$(CONFIG_VIA_RHINE) += via-rhine.o
obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o
......
......@@ -2203,21 +2203,20 @@ static int __devinit atl1_probe(struct pci_dev *pdev,
struct net_device *netdev;
struct atl1_adapter *adapter;
static int cards_found = 0;
bool pci_using_64 = true;
int err;
err = pci_enable_device(pdev);
if (err)
return err;
err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
/*
* 64-bit DMA currently has data corruption problems, so let's just
* use 32-bit DMA for now. This is a big hack that is probably wrong.
*/
err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (err) {
err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (err) {
dev_err(&pdev->dev, "no usable DMA configuration\n");
goto err_dma;
}
pci_using_64 = false;
dev_err(&pdev->dev, "no usable DMA configuration\n");
goto err_dma;
}
/* Mark all PCI regions associated with PCI device
* pdev as being reserved by owner atl1_driver_name
......@@ -2282,7 +2281,6 @@ static int __devinit atl1_probe(struct pci_dev *pdev,
netdev->ethtool_ops = &atl1_ethtool_ops;
adapter->bd_number = cards_found;
adapter->pci_using_64 = pci_using_64;
/* setup the private structure */
err = atl1_sw_init(adapter);
......@@ -2299,9 +2297,6 @@ static int __devinit atl1_probe(struct pci_dev *pdev,
*/
/* netdev->features |= NETIF_F_TSO; */
if (pci_using_64)
netdev->features |= NETIF_F_HIGHDMA;
netdev->features |= NETIF_F_LLTX;
/*
......
......@@ -39,7 +39,7 @@
#include <asm/io.h>
#define DRV_NAME "ehea"
#define DRV_VERSION "EHEA_0073"
#define DRV_VERSION "EHEA_0074"
/* eHEA capability flags */
#define DLPAR_PORT_ADD_REM 1
......@@ -402,6 +402,8 @@ struct ehea_mc_list {
#define EHEA_PORT_UP 1
#define EHEA_PORT_DOWN 0
#define EHEA_PHY_LINK_UP 1
#define EHEA_PHY_LINK_DOWN 0
#define EHEA_MAX_PORT_RES 16
struct ehea_port {
struct ehea_adapter *adapter; /* adapter that owns this port */
......@@ -427,6 +429,7 @@ struct ehea_port {
u32 msg_enable;
u32 sig_comp_iv;
u32 state;
u8 phy_link;
u8 full_duplex;
u8 autoneg;
u8 num_def_qps;
......
......@@ -53,17 +53,21 @@ static int rq3_entries = EHEA_DEF_ENTRIES_RQ3;
static int sq_entries = EHEA_DEF_ENTRIES_SQ;
static int use_mcs = 0;
static int num_tx_qps = EHEA_NUM_TX_QP;
static int prop_carrier_state = 0;
module_param(msg_level, int, 0);
module_param(rq1_entries, int, 0);
module_param(rq2_entries, int, 0);
module_param(rq3_entries, int, 0);
module_param(sq_entries, int, 0);
module_param(prop_carrier_state, int, 0);
module_param(use_mcs, int, 0);
module_param(num_tx_qps, int, 0);
MODULE_PARM_DESC(num_tx_qps, "Number of TX-QPS");
MODULE_PARM_DESC(msg_level, "msg_level");
MODULE_PARM_DESC(prop_carrier_state, "Propagate carrier state of physical "
"port to stack. 1:yes, 0:no. Default = 0 ");
MODULE_PARM_DESC(rq3_entries, "Number of entries for Receive Queue 3 "
"[2^x - 1], x = [6..14]. Default = "
__MODULE_STRING(EHEA_DEF_ENTRIES_RQ3) ")");
......@@ -467,7 +471,7 @@ static struct ehea_cqe *ehea_proc_rwqes(struct net_device *dev,
else
netif_receive_skb(skb);
dev->last_rx = jiffies;
port->netdev->last_rx = jiffies;
} else {
pr->p_stats.poll_receive_errors++;
port_reset = ehea_treat_poll_error(pr, rq, cqe,
......@@ -814,7 +818,9 @@ int ehea_set_portspeed(struct ehea_port *port, u32 port_speed)
ehea_error("Failed setting port speed");
}
}
netif_carrier_on(port->netdev);
if (!prop_carrier_state || (port->phy_link == EHEA_PHY_LINK_UP))
netif_carrier_on(port->netdev);
kfree(cb4);
out:
return ret;
......@@ -869,13 +875,19 @@ static void ehea_parse_eqe(struct ehea_adapter *adapter, u64 eqe)
}
if (EHEA_BMASK_GET(NEQE_EXTSWITCH_PORT_UP, eqe)) {
port->phy_link = EHEA_PHY_LINK_UP;
if (netif_msg_link(port))
ehea_info("%s: Physical port up",
port->netdev->name);
if (prop_carrier_state)
netif_carrier_on(port->netdev);
} else {
port->phy_link = EHEA_PHY_LINK_DOWN;
if (netif_msg_link(port))
ehea_info("%s: Physical port down",
port->netdev->name);
if (prop_carrier_state)
netif_carrier_off(port->netdev);
}
if (EHEA_BMASK_GET(NEQE_EXTSWITCH_PRIMARY, eqe))
......
......@@ -1222,7 +1222,7 @@ static int mv643xx_eth_start_xmit(struct sk_buff *skb, struct net_device *dev)
spin_lock_irqsave(&mp->lock, flags);
eth_tx_submit_descs_for_skb(mp, skb);
stats->tx_bytes = skb->len;
stats->tx_bytes += skb->len;
stats->tx_packets++;
dev->trans_start = jiffies;
......
......@@ -116,7 +116,7 @@ struct el3_private {
spinlock_t lock;
};
static const char *if_names[] = { "auto", "10baseT", "10base2", "AUI" };
static const char *if_names[] = { "auto", "10base2", "10baseT", "AUI" };
/*====================================================================*/
......
......@@ -755,7 +755,7 @@ void phy_stop(struct phy_device *phydev)
*/
void phy_start(struct phy_device *phydev)
{
spin_lock(&phydev->lock);
spin_lock_bh(&phydev->lock);
switch (phydev->state) {
case PHY_STARTING:
......@@ -769,7 +769,7 @@ void phy_start(struct phy_device *phydev)
default:
break;
}
spin_unlock(&phydev->lock);
spin_unlock_bh(&phydev->lock);
}
EXPORT_SYMBOL(phy_stop);
EXPORT_SYMBOL(phy_start);
......
......@@ -644,7 +644,7 @@ static int phy_probe(struct device *dev)
if (!(phydrv->flags & PHY_HAS_INTERRUPT))
phydev->irq = PHY_POLL;
spin_lock(&phydev->lock);
spin_lock_bh(&phydev->lock);
/* Start out supporting everything. Eventually,
* a controller will attach, and may modify one
......@@ -658,7 +658,7 @@ static int phy_probe(struct device *dev)
if (phydev->drv->probe)
err = phydev->drv->probe(phydev);
spin_unlock(&phydev->lock);
spin_unlock_bh(&phydev->lock);
return err;
......
#
# Makefile for the SysKonnect SK-98xx device driver.
#
#
# Standalone driver params
# SKPARAM += -DSK_KERNEL_24
# SKPARAM += -DSK_KERNEL_24_26
# SKPARAM += -DSK_KERNEL_26
# SKPARAM += -DSK_KERNEL_22_24
obj-$(CONFIG_SK98LIN) += sk98lin.o
sk98lin-objs := \
skge.o \
skethtool.o \
skdim.o \
skaddr.o \
skgehwt.o \
skgeinit.o \
skgepnmi.o \
skgesirq.o \
ski2c.o \
sklm80.o \
skqueue.o \
skrlmt.o \
sktimer.o \
skvpd.o \
skxmac2.o
# DBGDEF = \
# -DDEBUG
ifdef DEBUG
DBGDEF += \
-DSK_DEBUG_CHKMOD=0x00000000L \
-DSK_DEBUG_CHKCAT=0x00000000L
endif
# **** possible debug modules for SK_DEBUG_CHKMOD *****************
# SK_DBGMOD_MERR 0x00000001L /* general module error indication */
# SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
# SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
# SK_DBGMOD_VPD 0x00000008L /* VPD module */
# SK_DBGMOD_I2C 0x00000010L /* I2C module */
# SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
# SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
# SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
# SK_DBGMOD_DRV 0x00010000L /* DRV module */
# **** possible debug categories for SK_DEBUG_CHKCAT **************
# *** common modules ***
# SK_DBGCAT_INIT 0x00000001L module/driver initialization
# SK_DBGCAT_CTRL 0x00000002L controlling: add/rmv MCA/MAC and other controls (IOCTL)
# SK_DBGCAT_ERR 0x00000004L error handling paths
# SK_DBGCAT_TX 0x00000008L transmit path
# SK_DBGCAT_RX 0x00000010L receive path
# SK_DBGCAT_IRQ 0x00000020L general IRQ handling
# SK_DBGCAT_QUEUE 0x00000040L any queue management
# SK_DBGCAT_DUMP 0x00000080L large data output e.g. hex dump
# SK_DBGCAT_FATAL 0x00000100L large data output e.g. hex dump
# *** driver (file skge.c) ***
# SK_DBGCAT_DRV_ENTRY 0x00010000 entry points
# SK_DBGCAT_DRV_??? 0x00020000 not used
# SK_DBGCAT_DRV_MCA 0x00040000 multicast
# SK_DBGCAT_DRV_TX_PROGRESS 0x00080000 tx path
# SK_DBGCAT_DRV_RX_PROGRESS 0x00100000 rx path
# SK_DBGCAT_DRV_PROGRESS 0x00200000 general runtime
# SK_DBGCAT_DRV_??? 0x00400000 not used
# SK_DBGCAT_DRV_PROM 0x00800000 promiscuous mode
# SK_DBGCAT_DRV_TX_FRAME 0x01000000 display tx frames
# SK_DBGCAT_DRV_ERROR 0x02000000 error conditions
# SK_DBGCAT_DRV_INT_SRC 0x04000000 interrupts sources
# SK_DBGCAT_DRV_EVENT 0x08000000 driver events
EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_DIAG_SUPPORT -DGENESIS -DYUKON $(DBGDEF) $(SKPARAM)
clean:
rm -f core *.o *.a *.s
/******************************************************************************
*
* Name: lm80.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.6 $
* Date: $Date: 2003/05/13 17:26:52 $
* Purpose: Contains all defines for the LM80 Chip
* (National Semiconductor).
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef __INC_LM80_H
#define __INC_LM80_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* defines ********************************************************************/
/*
* LM80 register definition
*
* All registers are 8 bit wide
*/
#define LM80_CFG 0x00 /* Configuration Register */
#define LM80_ISRC_1 0x01 /* Interrupt Status Register 1 */
#define LM80_ISRC_2 0x02 /* Interrupt Status Register 2 */
#define LM80_IMSK_1 0x03 /* Interrupt Mask Register 1 */
#define LM80_IMSK_2 0x04 /* Interrupt Mask Register 2 */
#define LM80_FAN_CTRL 0x05 /* Fan Devisor/RST#/OS# Register */
#define LM80_TEMP_CTRL 0x06 /* OS# Config, Temp Res. Reg */
/* 0x07 - 0x1f reserved */
/* current values */
#define LM80_VT0_IN 0x20 /* current Voltage 0 value */
#define LM80_VT1_IN 0x21 /* current Voltage 1 value */
#define LM80_VT2_IN 0x22 /* current Voltage 2 value */
#define LM80_VT3_IN 0x23 /* current Voltage 3 value */
#define LM80_VT4_IN 0x24 /* current Voltage 4 value */
#define LM80_VT5_IN 0x25 /* current Voltage 5 value */
#define LM80_VT6_IN 0x26 /* current Voltage 6 value */
#define LM80_TEMP_IN 0x27 /* current Temperature value */
#define LM80_FAN1_IN 0x28 /* current Fan 1 count */
#define LM80_FAN2_IN 0x29 /* current Fan 2 count */
/* limit values */
#define LM80_VT0_HIGH_LIM 0x2a /* high limit val for Voltage 0 */
#define LM80_VT0_LOW_LIM 0x2b /* low limit val for Voltage 0 */
#define LM80_VT1_HIGH_LIM 0x2c /* high limit val for Voltage 1 */
#define LM80_VT1_LOW_LIM 0x2d /* low limit val for Voltage 1 */
#define LM80_VT2_HIGH_LIM 0x2e /* high limit val for Voltage 2 */
#define LM80_VT2_LOW_LIM 0x2f /* low limit val for Voltage 2 */
#define LM80_VT3_HIGH_LIM 0x30 /* high limit val for Voltage 3 */
#define LM80_VT3_LOW_LIM 0x31 /* low limit val for Voltage 3 */
#define LM80_VT4_HIGH_LIM 0x32 /* high limit val for Voltage 4 */
#define LM80_VT4_LOW_LIM 0x33 /* low limit val for Voltage 4 */
#define LM80_VT5_HIGH_LIM 0x34 /* high limit val for Voltage 5 */
#define LM80_VT5_LOW_LIM 0x35 /* low limit val for Voltage 5 */
#define LM80_VT6_HIGH_LIM 0x36 /* high limit val for Voltage 6 */
#define LM80_VT6_LOW_LIM 0x37 /* low limit val for Voltage 6 */
#define LM80_THOT_LIM_UP 0x38 /* hot temperature limit (high) */
#define LM80_THOT_LIM_LO 0x39 /* hot temperature limit (low) */
#define LM80_TOS_LIM_UP 0x3a /* OS temperature limit (high) */
#define LM80_TOS_LIM_LO 0x3b /* OS temperature limit (low) */
#define LM80_FAN1_COUNT_LIM 0x3c /* Fan 1 count limit (high) */
#define LM80_FAN2_COUNT_LIM 0x3d /* Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
/*
* LM80 bit definitions
*/
/* LM80_CFG Configuration Register */
#define LM80_CFG_START (1<<0) /* start monitoring operation */
#define LM80_CFG_INT_ENA (1<<1) /* enables the INT# Interrupt output */
#define LM80_CFG_INT_POL (1<<2) /* INT# pol: 0 act low, 1 act high */
#define LM80_CFG_INT_CLR (1<<3) /* disables INT#/RST_OUT#/OS# outputs */
#define LM80_CFG_RESET (1<<4) /* signals a reset */
#define LM80_CFG_CHASS_CLR (1<<5) /* clears Chassis Intrusion (CI) pin */
#define LM80_CFG_GPO (1<<6) /* drives the GPO# pin */
#define LM80_CFG_INIT (1<<7) /* restore power on defaults */
/* LM80_ISRC_1 Interrupt Status Register 1 */
/* LM80_IMSK_1 Interrupt Mask Register 1 */
#define LM80_IS_VT0 (1<<0) /* limit exceeded for Voltage 0 */
#define LM80_IS_VT1 (1<<1) /* limit exceeded for Voltage 1 */
#define LM80_IS_VT2 (1<<2) /* limit exceeded for Voltage 2 */
#define LM80_IS_VT3 (1<<3) /* limit exceeded for Voltage 3 */
#define LM80_IS_VT4 (1<<4) /* limit exceeded for Voltage 4 */
#define LM80_IS_VT5 (1<<5) /* limit exceeded for Voltage 5 */
#define LM80_IS_VT6 (1<<6) /* limit exceeded for Voltage 6 */
#define LM80_IS_INT_IN (1<<7) /* state of INT_IN# */
/* LM80_ISRC_2 Interrupt Status Register 2 */
/* LM80_IMSK_2 Interrupt Mask Register 2 */
#define LM80_IS_TEMP (1<<0) /* HOT temperature limit exceeded */
#define LM80_IS_BTI (1<<1) /* state of BTI# pin */
#define LM80_IS_FAN1 (1<<2) /* count limit exceeded for Fan 1 */
#define LM80_IS_FAN2 (1<<3) /* count limit exceeded for Fan 2 */
#define LM80_IS_CI (1<<4) /* Chassis Intrusion occured */
#define LM80_IS_OS (1<<5) /* OS temperature limit exceeded */
/* bit 6 and 7 are reserved in LM80_ISRC_2 */
#define LM80_IS_HT_IRQ_MD (1<<6) /* Hot temperature interrupt mode */
#define LM80_IS_OT_IRQ_MD (1<<7) /* OS temperature interrupt mode */
/* LM80_FAN_CTRL Fan Devisor/RST#/OS# Register */
#define LM80_FAN1_MD_SEL (1<<0) /* Fan 1 mode select */
#define LM80_FAN2_MD_SEL (1<<1) /* Fan 2 mode select */
#define LM80_FAN1_PRM_CTL (3<<2) /* Fan 1 speed control */
#define LM80_FAN2_PRM_CTL (3<<4) /* Fan 2 speed control */
#define LM80_FAN_OS_ENA (1<<6) /* enable OS mode on RST_OUT#/OS# pins*/
#define LM80_FAN_RST_ENA (1<<7) /* sets RST_OUT#/OS# pins in RST mode */
/* LM80_TEMP_CTRL OS# Config, Temp Res. Reg */
#define LM80_TEMP_OS_STAT (1<<0) /* mirrors the state of RST_OUT#/OS# */
#define LM80_TEMP_OS_POL (1<<1) /* select OS# polarity */
#define LM80_TEMP_OS_MODE (1<<2) /* selects Interrupt mode */
#define LM80_TEMP_RES (1<<3) /* selects 9 or 11 bit temp resulution*/
#define LM80_TEMP_LSB (0xf<<4)/* 4 LSBs of 11 bit temp data */
#define LM80_TEMP_LSB_9 (1<<7) /* LSB of 9 bit temperature data */
/* 0x07 - 0x1f reserved */
/* LM80_VT0_IN current Voltage 0 value */
/* LM80_VT1_IN current Voltage 1 value */
/* LM80_VT2_IN current Voltage 2 value */
/* LM80_VT3_IN current Voltage 3 value */
/* LM80_VT4_IN current Voltage 4 value */
/* LM80_VT5_IN current Voltage 5 value */
/* LM80_VT6_IN current Voltage 6 value */
/* LM80_TEMP_IN current temperature value */
/* LM80_FAN1_IN current Fan 1 count */
/* LM80_FAN2_IN current Fan 2 count */
/* LM80_VT0_HIGH_LIM high limit val for Voltage 0 */
/* LM80_VT0_LOW_LIM low limit val for Voltage 0 */
/* LM80_VT1_HIGH_LIM high limit val for Voltage 1 */
/* LM80_VT1_LOW_LIM low limit val for Voltage 1 */
/* LM80_VT2_HIGH_LIM high limit val for Voltage 2 */
/* LM80_VT2_LOW_LIM low limit val for Voltage 2 */
/* LM80_VT3_HIGH_LIM high limit val for Voltage 3 */
/* LM80_VT3_LOW_LIM low limit val for Voltage 3 */
/* LM80_VT4_HIGH_LIM high limit val for Voltage 4 */
/* LM80_VT4_LOW_LIM low limit val for Voltage 4 */
/* LM80_VT5_HIGH_LIM high limit val for Voltage 5 */
/* LM80_VT5_LOW_LIM low limit val for Voltage 5 */
/* LM80_VT6_HIGH_LIM high limit val for Voltage 6 */
/* LM80_VT6_LOW_LIM low limit val for Voltage 6 */
/* LM80_THOT_LIM_UP hot temperature limit (high) */
/* LM80_THOT_LIM_LO hot temperature limit (low) */
/* LM80_TOS_LIM_UP OS temperature limit (high) */
/* LM80_TOS_LIM_LO OS temperature limit (low) */
/* LM80_FAN1_COUNT_LIM Fan 1 count limit (high) */
/* LM80_FAN2_COUNT_LIM Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
#define LM80_ADDR 0x28 /* LM80 default addr */
/* typedefs *******************************************************************/
/* function prototypes ********************************************************/
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INC_LM80_H */
/******************************************************************************
*
* Name: skaddr.h
* Project: Gigabit Ethernet Adapters, ADDR-Modul
* Version: $Revision: 1.29 $
* Date: $Date: 2003/05/13 16:57:24 $
* Purpose: Header file for Address Management (MC, UC, Prom).
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This module is intended to manage multicast addresses and promiscuous mode
* on GEnesis adapters.
*
* Include File Hierarchy:
*
* "skdrv1st.h"
* ...
* "sktypes.h"
* "skqueue.h"
* "skaddr.h"
* ...
* "skdrv2nd.h"
*
******************************************************************************/
#ifndef __INC_SKADDR_H
#define __INC_SKADDR_H
#ifdef __cplusplus
extern "C" {
#endif /* cplusplus */
/* defines ********************************************************************/
#define SK_MAC_ADDR_LEN 6 /* Length of MAC address. */
#define SK_MAX_ADDRS 14 /* #Addrs for exact match. */
/* ----- Common return values ----- */
#define SK_ADDR_SUCCESS 0 /* Function returned successfully. */
#define SK_ADDR_ILLEGAL_PORT 100 /* Port number too high. */
#define SK_ADDR_TOO_EARLY 101 /* Function called too early. */
/* ----- Clear/Add flag bits ----- */
#define SK_ADDR_PERMANENT 1 /* RLMT Address */
/* ----- Additional Clear flag bits ----- */
#define SK_MC_SW_ONLY 2 /* Do not update HW when clearing. */
/* ----- Override flag bits ----- */
#define SK_ADDR_LOGICAL_ADDRESS 0
#define SK_ADDR_VIRTUAL_ADDRESS (SK_ADDR_LOGICAL_ADDRESS) /* old */
#define SK_ADDR_PHYSICAL_ADDRESS 1
#define SK_ADDR_CLEAR_LOGICAL 2
#define SK_ADDR_SET_LOGICAL 4
/* ----- Override return values ----- */
#define SK_ADDR_OVERRIDE_SUCCESS (SK_ADDR_SUCCESS)
#define SK_ADDR_DUPLICATE_ADDRESS 1
#define SK_ADDR_MULTICAST_ADDRESS 2
/* ----- Partitioning of excact match table ----- */
#define SK_ADDR_EXACT_MATCHES 16 /* #Exact match entries. */
#define SK_ADDR_FIRST_MATCH_RLMT 1
#define SK_ADDR_LAST_MATCH_RLMT 2
#define SK_ADDR_FIRST_MATCH_DRV 3
#define SK_ADDR_LAST_MATCH_DRV (SK_ADDR_EXACT_MATCHES - 1)
/* ----- SkAddrMcAdd/SkAddrMcUpdate return values ----- */
#define SK_MC_FILTERING_EXACT 0 /* Exact filtering. */
#define SK_MC_FILTERING_INEXACT 1 /* Inexact filtering. */
/* ----- Additional SkAddrMcAdd return values ----- */
#define SK_MC_ILLEGAL_ADDRESS 2 /* Illegal address. */
#define SK_MC_ILLEGAL_PORT 3 /* Illegal port (not the active one). */
#define SK_MC_RLMT_OVERFLOW 4 /* Too many RLMT mc addresses. */
/* Promiscuous mode bits ----- */
#define SK_PROM_MODE_NONE 0 /* Normal receive. */
#define SK_PROM_MODE_LLC 1 /* Receive all LLC frames. */
#define SK_PROM_MODE_ALL_MC 2 /* Receive all multicast frames. */
/* #define SK_PROM_MODE_NON_LLC 4 */ /* Receive all non-LLC frames. */
/* Macros */
#ifdef OLD_STUFF
#ifndef SK_ADDR_EQUAL
/*
* "&" instead of "&&" allows better optimization on IA-64.
* The replacement is safe here, as all bytes exist.
*/
#ifndef SK_ADDR_DWORD_COMPARE
#define SK_ADDR_EQUAL(A1,A2) ( \
(((SK_U8 *)(A1))[5] == ((SK_U8 *)(A2))[5]) & \
(((SK_U8 *)(A1))[4] == ((SK_U8 *)(A2))[4]) & \
(((SK_U8 *)(A1))[3] == ((SK_U8 *)(A2))[3]) & \
(((SK_U8 *)(A1))[2] == ((SK_U8 *)(A2))[2]) & \
(((SK_U8 *)(A1))[1] == ((SK_U8 *)(A2))[1]) & \
(((SK_U8 *)(A1))[0] == ((SK_U8 *)(A2))[0]))
#else /* SK_ADDR_DWORD_COMPARE */
#define SK_ADDR_EQUAL(A1,A2) ( \
(*(SK_U32 *)&(((SK_U8 *)(A1))[2]) == *(SK_U32 *)&(((SK_U8 *)(A2))[2])) & \
(*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
#endif /* 0 */
#ifndef SK_ADDR_EQUAL
#ifndef SK_ADDR_DWORD_COMPARE
#define SK_ADDR_EQUAL(A1,A2) ( \
(((SK_U8 SK_FAR *)(A1))[5] == ((SK_U8 SK_FAR *)(A2))[5]) & \
(((SK_U8 SK_FAR *)(A1))[4] == ((SK_U8 SK_FAR *)(A2))[4]) & \
(((SK_U8 SK_FAR *)(A1))[3] == ((SK_U8 SK_FAR *)(A2))[3]) & \
(((SK_U8 SK_FAR *)(A1))[2] == ((SK_U8 SK_FAR *)(A2))[2]) & \
(((SK_U8 SK_FAR *)(A1))[1] == ((SK_U8 SK_FAR *)(A2))[1]) & \
(((SK_U8 SK_FAR *)(A1))[0] == ((SK_U8 SK_FAR *)(A2))[0]))
#else /* SK_ADDR_DWORD_COMPARE */
#define SK_ADDR_EQUAL(A1,A2) ( \
(*(SK_U16 SK_FAR *)&(((SK_U8 SK_FAR *)(A1))[4]) == \
*(SK_U16 SK_FAR *)&(((SK_U8 SK_FAR *)(A2))[4])) && \
(*(SK_U32 SK_FAR *)&(((SK_U8 SK_FAR *)(A1))[0]) == \
*(SK_U32 SK_FAR *)&(((SK_U8 SK_FAR *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
/* typedefs *******************************************************************/
typedef struct s_MacAddr {
SK_U8 a[SK_MAC_ADDR_LEN];
} SK_MAC_ADDR;
/* SK_FILTER is used to ensure alignment of the filter. */
typedef union s_InexactFilter {
SK_U8 Bytes[8];
SK_U64 Val; /* Dummy entry for alignment only. */
} SK_FILTER64;
typedef struct s_AddrNet SK_ADDR_NET;
typedef struct s_AddrPort {
/* ----- Public part (read-only) ----- */
SK_MAC_ADDR CurrentMacAddress; /* Current physical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Permanent physical MAC Address. */
int PromMode; /* Promiscuous Mode. */
/* ----- Private part ----- */
SK_MAC_ADDR PreviousMacAddress; /* Prev. phys. MAC Address. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U32 FirstExactMatchRlmt;
SK_U32 NextExactMatchRlmt;
SK_U32 FirstExactMatchDrv;
SK_U32 NextExactMatchDrv;
SK_MAC_ADDR Exact[SK_ADDR_EXACT_MATCHES];
SK_FILTER64 InexactFilter; /* For 64-bit hash register. */
SK_FILTER64 InexactRlmtFilter; /* For 64-bit hash register. */
SK_FILTER64 InexactDrvFilter; /* For 64-bit hash register. */
} SK_ADDR_PORT;
struct s_AddrNet {
/* ----- Public part (read-only) ----- */
SK_MAC_ADDR CurrentMacAddress; /* Logical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Logical MAC Address. */
/* ----- Private part ----- */
SK_U32 ActivePort; /* View of module ADDR. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U16 Align02;
};
typedef struct s_Addr {
/* ----- Public part (read-only) ----- */
SK_ADDR_NET Net[SK_MAX_NETS];
SK_ADDR_PORT Port[SK_MAX_MACS];
/* ----- Private part ----- */
} SK_ADDR;
/* function prototypes ********************************************************/
#ifndef SK_KR_PROTO
/* Functions provided by SkAddr */
/* ANSI/C++ compliant function prototypes */
extern int SkAddrInit(
SK_AC *pAC,
SK_IOC IoC,
int Level);
extern int SkAddrMcClear(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int Flags);
extern int SkAddrMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pMc,
int Flags);
extern int SkAddrMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
extern int SkAddrOverride(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR SK_FAR *pNewAddr,
int Flags);
extern int SkAddrPromiscuousChange(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
#ifndef SK_SLIM
extern int SkAddrSwap(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 FromPortNumber,
SK_U32 ToPortNumber);
#endif
#else /* defined(SK_KR_PROTO)) */
/* Non-ANSI/C++ compliant function prototypes */
#error KR-style prototypes are not yet provided.
#endif /* defined(SK_KR_PROTO)) */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INC_SKADDR_H */
/******************************************************************************
*
* Name: skcsum.h
* Project: GEnesis - SysKonnect SK-NET Gigabit Ethernet (SK-98xx)
* Version: $Revision: 1.10 $
* Date: $Date: 2003/08/20 13:59:57 $
* Purpose: Store/verify Internet checksum in send/receive packets.
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2001 SysKonnect GmbH.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* Public header file for the "GEnesis" common module "CSUM".
*
* "GEnesis" is an abbreviation of "Gigabit Ethernet Network System in Silicon"
* and is the code name of this SysKonnect project.
*
* Compilation Options:
*
* SK_USE_CSUM - Define if CSUM is to be used. Otherwise, CSUM will be an
* empty module.
*
* SKCS_OVERWRITE_PROTO - Define to overwrite the default protocol id
* definitions. In this case, all SKCS_PROTO_xxx definitions must be made
* external.
*
* SKCS_OVERWRITE_STATUS - Define to overwrite the default return status
* definitions. In this case, all SKCS_STATUS_xxx definitions must be made
* external.
*
* Include File Hierarchy:
*
* "h/skcsum.h"
* "h/sktypes.h"
* "h/skqueue.h"
*
******************************************************************************/
#ifndef __INC_SKCSUM_H
#define __INC_SKCSUM_H
#include "h/sktypes.h"
#include "h/skqueue.h"
/* defines ********************************************************************/
/*
* Define the default bit flags for 'SKCS_PACKET_INFO.ProtocolFlags' if no user
* overwrite.
*/
#ifndef SKCS_OVERWRITE_PROTO /* User overwrite? */
#define SKCS_PROTO_IP 0x1 /* IP (Internet Protocol version 4) */
#define SKCS_PROTO_TCP 0x2 /* TCP (Transmission Control Protocol) */
#define SKCS_PROTO_UDP 0x4 /* UDP (User Datagram Protocol) */
/* Indices for protocol statistics. */
#define SKCS_PROTO_STATS_IP 0
#define SKCS_PROTO_STATS_UDP 1
#define SKCS_PROTO_STATS_TCP 2
#define SKCS_NUM_PROTOCOLS 3 /* Number of supported protocols. */
#endif /* !SKCS_OVERWRITE_PROTO */
/*
* Define the default SKCS_STATUS type and values if no user overwrite.
*
* SKCS_STATUS_UNKNOWN_IP_VERSION - Not an IP v4 frame.
* SKCS_STATUS_IP_CSUM_ERROR - IP checksum error.
* SKCS_STATUS_IP_CSUM_ERROR_TCP - IP checksum error in TCP frame.
* SKCS_STATUS_IP_CSUM_ERROR_UDP - IP checksum error in UDP frame
* SKCS_STATUS_IP_FRAGMENT - IP fragment (IP checksum ok).
* SKCS_STATUS_IP_CSUM_OK - IP checksum ok (not a TCP or UDP frame).
* SKCS_STATUS_TCP_CSUM_ERROR - TCP checksum error (IP checksum ok).
* SKCS_STATUS_UDP_CSUM_ERROR - UDP checksum error (IP checksum ok).
* SKCS_STATUS_TCP_CSUM_OK - IP and TCP checksum ok.
* SKCS_STATUS_UDP_CSUM_OK - IP and UDP checksum ok.
* SKCS_STATUS_IP_CSUM_OK_NO_UDP - IP checksum OK and no UDP checksum.
*/
#ifndef SKCS_OVERWRITE_STATUS /* User overwrite? */
#define SKCS_STATUS int /* Define status type. */
#define SKCS_STATUS_UNKNOWN_IP_VERSION 1
#define SKCS_STATUS_IP_CSUM_ERROR 2
#define SKCS_STATUS_IP_FRAGMENT 3
#define SKCS_STATUS_IP_CSUM_OK 4
#define SKCS_STATUS_TCP_CSUM_ERROR 5
#define SKCS_STATUS_UDP_CSUM_ERROR 6
#define SKCS_STATUS_TCP_CSUM_OK 7
#define SKCS_STATUS_UDP_CSUM_OK 8
/* needed for Microsoft */
#define SKCS_STATUS_IP_CSUM_ERROR_UDP 9
#define SKCS_STATUS_IP_CSUM_ERROR_TCP 10
/* UDP checksum may be omitted */
#define SKCS_STATUS_IP_CSUM_OK_NO_UDP 11
#endif /* !SKCS_OVERWRITE_STATUS */
/* Clear protocol statistics event. */
#define SK_CSUM_EVENT_CLEAR_PROTO_STATS 1
/*
* Add two values in one's complement.
*
* Note: One of the two input values may be "longer" than 16-bit, but then the
* resulting sum may be 17 bits long. In this case, add zero to the result using
* SKCS_OC_ADD() again.
*
* Result = Value1 + Value2
*/
#define SKCS_OC_ADD(Result, Value1, Value2) { \
unsigned long Sum; \
\
Sum = (unsigned long) (Value1) + (unsigned long) (Value2); \
/* Add-in any carry. */ \
(Result) = (Sum & 0xffff) + (Sum >> 16); \
}
/*
* Subtract two values in one's complement.
*
* Result = Value1 - Value2
*/
#define SKCS_OC_SUB(Result, Value1, Value2) \
SKCS_OC_ADD((Result), (Value1), ~(Value2) & 0xffff)
/* typedefs *******************************************************************/
/*
* SKCS_PROTO_STATS - The CSUM protocol statistics structure.
*
* There is one instance of this structure for each protocol supported.
*/
typedef struct s_CsProtocolStatistics {
SK_U64 RxOkCts; /* Receive checksum ok. */
SK_U64 RxUnableCts; /* Unable to verify receive checksum. */
SK_U64 RxErrCts; /* Receive checksum error. */
SK_U64 TxOkCts; /* Transmit checksum ok. */
SK_U64 TxUnableCts; /* Unable to calculate checksum in hw. */
} SKCS_PROTO_STATS;
/*
* s_Csum - The CSUM module context structure.
*/
typedef struct s_Csum {
/* Enabled receive SK_PROTO_XXX bit flags. */
unsigned ReceiveFlags[SK_MAX_NETS];
#ifdef TX_CSUM
unsigned TransmitFlags[SK_MAX_NETS];
#endif /* TX_CSUM */
/* The protocol statistics structure; one per supported protocol. */
SKCS_PROTO_STATS ProtoStats[SK_MAX_NETS][SKCS_NUM_PROTOCOLS];
} SK_CSUM;
/*
* SKCS_PACKET_INFO - The packet information structure.
*/
typedef struct s_CsPacketInfo {
/* Bit field specifiying the desired/found protocols. */
unsigned ProtocolFlags;
/* Length of complete IP header, including any option fields. */
unsigned IpHeaderLength;
/* IP header checksum. */
unsigned IpHeaderChecksum;
/* TCP/UDP pseudo header checksum. */
unsigned PseudoHeaderChecksum;
} SKCS_PACKET_INFO;
/* function prototypes ********************************************************/
#ifndef SK_CS_CALCULATE_CHECKSUM
extern unsigned SkCsCalculateChecksum(
void *pData,
unsigned Length);
#endif /* SK_CS_CALCULATE_CHECKSUM */
extern int SkCsEvent(
SK_AC *pAc,
SK_IOC Ioc,
SK_U32 Event,
SK_EVPARA Param);
extern SKCS_STATUS SkCsGetReceiveInfo(
SK_AC *pAc,
void *pIpHeader,
unsigned Checksum1,
unsigned Checksum2,
int NetNumber);
extern void SkCsSetReceiveFlags(
SK_AC *pAc,
unsigned ReceiveFlags,
unsigned *pChecksum1Offset,
unsigned *pChecksum2Offset,
int NetNumber);
#endif /* __INC_SKCSUM_H */
/******************************************************************************
*
* Name: skdebug.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.14 $
* Date: $Date: 2003/05/13 17:26:00 $
* Purpose: SK specific DEBUG support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef __INC_SKDEBUG_H
#define __INC_SKDEBUG_H
#ifdef DEBUG
#ifndef SK_DBG_MSG
#define SK_DBG_MSG(pAC,comp,cat,arg) \
if ( ((comp) & SK_DBG_CHKMOD(pAC)) && \
((cat) & SK_DBG_CHKCAT(pAC)) ) { \
SK_DBG_PRINTF arg ; \
}
#endif
#else
#define SK_DBG_MSG(pAC,comp,lev,arg)
#endif
/* PLS NOTE:
* =========
* Due to any restrictions of kernel printf routines do not use other
* format identifiers as: %x %d %c %s .
* Never use any combined format identifiers such as: %lx %ld in your
* printf - argument (arg) because some OS specific kernel printfs may
* only support some basic identifiers.
*/
/* Debug modules */
#define SK_DBGMOD_MERR 0x00000001L /* general module error indication */
#define SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
#define SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
#define SK_DBGMOD_VPD 0x00000008L /* VPD module */
#define SK_DBGMOD_I2C 0x00000010L /* I2C module */
#define SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
#define SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
#define SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
#define SK_DBGMOD_PECP 0x00000100L /* PECP module */
#define SK_DBGMOD_POWM 0x00000200L /* Power Management module */
/* Debug events */
#define SK_DBGCAT_INIT 0x00000001L /* module/driver initialization */
#define SK_DBGCAT_CTRL 0x00000002L /* controlling devices */
#define SK_DBGCAT_ERR 0x00000004L /* error handling paths */
#define SK_DBGCAT_TX 0x00000008L /* transmit path */
#define SK_DBGCAT_RX 0x00000010L /* receive path */
#define SK_DBGCAT_IRQ 0x00000020L /* general IRQ handling */
#define SK_DBGCAT_QUEUE 0x00000040L /* any queue management */
#define SK_DBGCAT_DUMP 0x00000080L /* large data output e.g. hex dump */
#define SK_DBGCAT_FATAL 0x00000100L /* fatal error */
#endif /* __INC_SKDEBUG_H */
/******************************************************************************
*
* Name: skdrv1st.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.4 $
* Date: $Date: 2003/11/12 14:28:14 $
* Purpose: First header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This is the first include file of the driver, which includes all
* neccessary system header files and some of the GEnesis header files.
* It also defines some basic items.
*
* Include File Hierarchy:
*
* see skge.c
*
******************************************************************************/
#ifndef __INC_SKDRV1ST_H
#define __INC_SKDRV1ST_H
typedef struct s_AC SK_AC;
/* Set card versions */
#define SK_FAR
/* override some default functions with optimized linux functions */
#define SK_PNMI_STORE_U16(p,v) memcpy((char*)(p),(char*)&(v),2)
#define SK_PNMI_STORE_U32(p,v) memcpy((char*)(p),(char*)&(v),4)
#define SK_PNMI_STORE_U64(p,v) memcpy((char*)(p),(char*)&(v),8)
#define SK_PNMI_READ_U16(p,v) memcpy((char*)&(v),(char*)(p),2)
#define SK_PNMI_READ_U32(p,v) memcpy((char*)&(v),(char*)(p),4)
#define SK_PNMI_READ_U64(p,v) memcpy((char*)&(v),(char*)(p),8)
#define SK_ADDR_EQUAL(a1,a2) (!memcmp(a1,a2,6))
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/bitops.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/init.h>
#include <asm/uaccess.h>
#include <net/checksum.h>
#define SK_CS_CALCULATE_CHECKSUM
#ifndef CONFIG_X86_64
#define SkCsCalculateChecksum(p,l) ((~ip_compute_csum(p, l)) & 0xffff)
#else
#define SkCsCalculateChecksum(p,l) ((~ip_fast_csum(p, l)) & 0xffff)
#endif
#include "h/sktypes.h"
#include "h/skerror.h"
#include "h/skdebug.h"
#include "h/lm80.h"
#include "h/xmac_ii.h"
#ifdef __LITTLE_ENDIAN
#define SK_LITTLE_ENDIAN
#else
#define SK_BIG_ENDIAN
#endif
#define SK_NET_DEVICE net_device
/* we use gethrtime(), return unit: nanoseconds */
#define SK_TICKS_PER_SEC 100
#define SK_MEM_MAPPED_IO
// #define SK_RLMT_SLOW_LOOKAHEAD
#define SK_MAX_MACS 2
#define SK_MAX_NETS 2
#define SK_IOC char __iomem *
typedef struct s_DrvRlmtMbuf SK_MBUF;
#define SK_CONST64 INT64_C
#define SK_CONSTU64 UINT64_C
#define SK_MEMCPY(dest,src,size) memcpy(dest,src,size)
#define SK_MEMCMP(s1,s2,size) memcmp(s1,s2,size)
#define SK_MEMSET(dest,val,size) memset(dest,val,size)
#define SK_STRLEN(pStr) strlen((char*)(pStr))
#define SK_STRNCPY(pDest,pSrc,size) strncpy((char*)(pDest),(char*)(pSrc),size)
#define SK_STRCMP(pStr1,pStr2) strcmp((char*)(pStr1),(char*)(pStr2))
/* macros to access the adapter */
#define SK_OUT8(b,a,v) writeb((v), ((b)+(a)))
#define SK_OUT16(b,a,v) writew((v), ((b)+(a)))
#define SK_OUT32(b,a,v) writel((v), ((b)+(a)))
#define SK_IN8(b,a,pv) (*(pv) = readb((b)+(a)))
#define SK_IN16(b,a,pv) (*(pv) = readw((b)+(a)))
#define SK_IN32(b,a,pv) (*(pv) = readl((b)+(a)))
#define int8_t char
#define int16_t short
#define int32_t long
#define int64_t long long
#define uint8_t u_char
#define uint16_t u_short
#define uint32_t u_long
#define uint64_t unsigned long long
#define t_scalar_t int
#define t_uscalar_t unsigned int
#define uintptr_t unsigned long
#define __CONCAT__(A,B) A##B
#define INT32_C(a) __CONCAT__(a,L)
#define INT64_C(a) __CONCAT__(a,LL)
#define UINT32_C(a) __CONCAT__(a,UL)
#define UINT64_C(a) __CONCAT__(a,ULL)
#ifdef DEBUG
#define SK_DBG_PRINTF printk
#ifndef SK_DEBUG_CHKMOD
#define SK_DEBUG_CHKMOD 0
#endif
#ifndef SK_DEBUG_CHKCAT
#define SK_DEBUG_CHKCAT 0
#endif
/* those come from the makefile */
#define SK_DBG_CHKMOD(pAC) (SK_DEBUG_CHKMOD)
#define SK_DBG_CHKCAT(pAC) (SK_DEBUG_CHKCAT)
extern void SkDbgPrintf(const char *format,...);
#define SK_DBGMOD_DRV 0x00010000
/**** possible driver debug categories ********************************/
#define SK_DBGCAT_DRV_ENTRY 0x00010000
#define SK_DBGCAT_DRV_SAP 0x00020000
#define SK_DBGCAT_DRV_MCA 0x00040000
#define SK_DBGCAT_DRV_TX_PROGRESS 0x00080000
#define SK_DBGCAT_DRV_RX_PROGRESS 0x00100000
#define SK_DBGCAT_DRV_PROGRESS 0x00200000
#define SK_DBGCAT_DRV_MSG 0x00400000
#define SK_DBGCAT_DRV_PROM 0x00800000
#define SK_DBGCAT_DRV_TX_FRAME 0x01000000
#define SK_DBGCAT_DRV_ERROR 0x02000000
#define SK_DBGCAT_DRV_INT_SRC 0x04000000
#define SK_DBGCAT_DRV_EVENT 0x08000000
#endif
#define SK_ERR_LOG SkErrorLog
extern void SkErrorLog(SK_AC*, int, int, char*);
#endif
/******************************************************************************
*
* Name: skdrv2nd.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.10 $
* Date: $Date: 2003/12/11 16:04:45 $
* Purpose: Second header file for driver and all other modules
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This is the second include file of the driver, which includes all other
* neccessary files and defines all structures and constants used by the
* driver and the common modules.
*
* Include File Hierarchy:
*
* see skge.c
*
******************************************************************************/
#ifndef __INC_SKDRV2ND_H
#define __INC_SKDRV2ND_H
#include "h/skqueue.h"
#include "h/skgehwt.h"
#include "h/sktimer.h"
#include "h/ski2c.h"
#include "h/skgepnmi.h"
#include "h/skvpd.h"
#include "h/skgehw.h"
#include "h/skgeinit.h"
#include "h/skaddr.h"
#include "h/skgesirq.h"
#include "h/skcsum.h"
#include "h/skrlmt.h"
#include "h/skgedrv.h"
extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
extern SK_U64 SkOsGetTime(SK_AC*);
extern int SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
extern int SkPciReadCfgWord(SK_AC*, int, SK_U16*);
extern int SkPciReadCfgByte(SK_AC*, int, SK_U8*);
extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16);
extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8);
extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
#ifdef SK_DIAG_SUPPORT
extern int SkDrvEnterDiagMode(SK_AC *pAc);
extern int SkDrvLeaveDiagMode(SK_AC *pAc);
#endif
struct s_DrvRlmtMbuf {
SK_MBUF *pNext; /* Pointer to next RLMT Mbuf. */
SK_U8 *pData; /* Data buffer (virtually contig.). */
unsigned Size; /* Data buffer size. */
unsigned Length; /* Length of packet (<= Size). */
SK_U32 PortIdx; /* Receiving/transmitting port. */
#ifdef SK_RLMT_MBUF_PRIVATE
SK_RLMT_MBUF Rlmt; /* Private part for RLMT. */
#endif /* SK_RLMT_MBUF_PRIVATE */
struct sk_buff *pOs; /* Pointer to message block */
};
/*
* Time macros
*/
#if SK_TICKS_PER_SEC == 100
#define SK_PNMI_HUNDREDS_SEC(t) (t)
#else
#define SK_PNMI_HUNDREDS_SEC(t) ((((unsigned long)t) * 100) / \
(SK_TICKS_PER_SEC))
#endif
/*
* New SkOsGetTime
*/
#define SkOsGetTimeCurrent(pAC, pUsec) {\
struct timeval t;\
do_gettimeofday(&t);\
*pUsec = ((((t.tv_sec) * 1000000L)+t.tv_usec)/10000);\
}
/*
* ioctl definitions
*/
#define SK_IOCTL_BASE (SIOCDEVPRIVATE)
#define SK_IOCTL_GETMIB (SK_IOCTL_BASE + 0)
#define SK_IOCTL_SETMIB (SK_IOCTL_BASE + 1)
#define SK_IOCTL_PRESETMIB (SK_IOCTL_BASE + 2)
#define SK_IOCTL_GEN (SK_IOCTL_BASE + 3)
#define SK_IOCTL_DIAG (SK_IOCTL_BASE + 4)
typedef struct s_IOCTL SK_GE_IOCTL;
struct s_IOCTL {
char __user * pData;
unsigned int Len;
};
/*
* define sizes of descriptor rings in bytes
*/
#define TX_RING_SIZE (8*1024)
#define RX_RING_SIZE (24*1024)
/*
* Buffer size for ethernet packets
*/
#define ETH_BUF_SIZE 1540
#define ETH_MAX_MTU 1514
#define ETH_MIN_MTU 60
#define ETH_MULTICAST_BIT 0x01
#define SK_JUMBO_MTU 9000
/*
* transmit priority selects the queue: LOW=asynchron, HIGH=synchron
*/
#define TX_PRIO_LOW 0
#define TX_PRIO_HIGH 1
/*
* alignment of rx/tx descriptors
*/
#define DESCR_ALIGN 64
/*
* definitions for pnmi. TODO
*/
#define SK_DRIVER_RESET(pAC, IoC) 0
#define SK_DRIVER_SENDEVENT(pAC, IoC) 0
#define SK_DRIVER_SELFTEST(pAC, IoC) 0
/* For get mtu you must add an own function */
#define SK_DRIVER_GET_MTU(pAc,IoC,i) 0
#define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0
#define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v) 0
/*
** Interim definition of SK_DRV_TIMER placed in this file until
** common modules have been finalized
*/
#define SK_DRV_TIMER 11
#define SK_DRV_MODERATION_TIMER 1
#define SK_DRV_MODERATION_TIMER_LENGTH 1000000 /* 1 second */
#define SK_DRV_RX_CLEANUP_TIMER 2
#define SK_DRV_RX_CLEANUP_TIMER_LENGTH 1000000 /* 100 millisecs */
/*
** Definitions regarding transmitting frames
** any calculating any checksum.
*/
#define C_LEN_ETHERMAC_HEADER_DEST_ADDR 6
#define C_LEN_ETHERMAC_HEADER_SRC_ADDR 6
#define C_LEN_ETHERMAC_HEADER_LENTYPE 2
#define C_LEN_ETHERMAC_HEADER ( (C_LEN_ETHERMAC_HEADER_DEST_ADDR) + \
(C_LEN_ETHERMAC_HEADER_SRC_ADDR) + \
(C_LEN_ETHERMAC_HEADER_LENTYPE) )
#define C_LEN_ETHERMTU_MINSIZE 46
#define C_LEN_ETHERMTU_MAXSIZE_STD 1500
#define C_LEN_ETHERMTU_MAXSIZE_JUMBO 9000
#define C_LEN_ETHERNET_MINSIZE ( (C_LEN_ETHERMAC_HEADER) + \
(C_LEN_ETHERMTU_MINSIZE) )
#define C_OFFSET_IPHEADER C_LEN_ETHERMAC_HEADER
#define C_OFFSET_IPHEADER_IPPROTO 9
#define C_OFFSET_TCPHEADER_TCPCS 16
#define C_OFFSET_UDPHEADER_UDPCS 6
#define C_OFFSET_IPPROTO ( (C_LEN_ETHERMAC_HEADER) + \
(C_OFFSET_IPHEADER_IPPROTO) )
#define C_PROTO_ID_UDP 17 /* refer to RFC 790 or Stevens' */
#define C_PROTO_ID_TCP 6 /* TCP/IP illustrated for details */
/* TX and RX descriptors *****************************************************/
typedef struct s_RxD RXD; /* the receive descriptor */
struct s_RxD {
volatile SK_U32 RBControl; /* Receive Buffer Control */
SK_U32 VNextRxd; /* Next receive descriptor,low dword */
SK_U32 VDataLow; /* Receive buffer Addr, low dword */
SK_U32 VDataHigh; /* Receive buffer Addr, high dword */
SK_U32 FrameStat; /* Receive Frame Status word */
SK_U32 TimeStamp; /* Time stamp from XMAC */
SK_U32 TcpSums; /* TCP Sum 2 / TCP Sum 1 */
SK_U32 TcpSumStarts; /* TCP Sum Start 2 / TCP Sum Start 1 */
RXD *pNextRxd; /* Pointer to next Rxd */
struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
};
typedef struct s_TxD TXD; /* the transmit descriptor */
struct s_TxD {
volatile SK_U32 TBControl; /* Transmit Buffer Control */
SK_U32 VNextTxd; /* Next transmit descriptor,low dword */
SK_U32 VDataLow; /* Transmit Buffer Addr, low dword */
SK_U32 VDataHigh; /* Transmit Buffer Addr, high dword */
SK_U32 FrameStat; /* Transmit Frame Status Word */
SK_U32 TcpSumOfs; /* Reserved / TCP Sum Offset */
SK_U16 TcpSumSt; /* TCP Sum Start */
SK_U16 TcpSumWr; /* TCP Sum Write */
SK_U32 TcpReserved; /* not used */
TXD *pNextTxd; /* Pointer to next Txd */
struct sk_buff *pMBuf; /* Pointer to Linux' socket buffer */
};
/* Used interrupt bits in the interrupts source register *********************/
#define DRIVER_IRQS ((IS_IRQ_SW) | \
(IS_R1_F) |(IS_R2_F) | \
(IS_XS1_F) |(IS_XA1_F) | \
(IS_XS2_F) |(IS_XA2_F))
#define SPECIAL_IRQS ((IS_HW_ERR) |(IS_I2C_READY) | \
(IS_EXT_REG) |(IS_TIMINT) | \
(IS_PA_TO_RX1) |(IS_PA_TO_RX2) | \
(IS_PA_TO_TX1) |(IS_PA_TO_TX2) | \
(IS_MAC1) |(IS_LNK_SYNC_M1)| \
(IS_MAC2) |(IS_LNK_SYNC_M2)| \
(IS_R1_C) |(IS_R2_C) | \
(IS_XS1_C) |(IS_XA1_C) | \
(IS_XS2_C) |(IS_XA2_C))
#define IRQ_MASK ((IS_IRQ_SW) | \
(IS_R1_B) |(IS_R1_F) |(IS_R2_B) |(IS_R2_F) | \
(IS_XS1_B) |(IS_XS1_F) |(IS_XA1_B)|(IS_XA1_F)| \
(IS_XS2_B) |(IS_XS2_F) |(IS_XA2_B)|(IS_XA2_F)| \
(IS_HW_ERR) |(IS_I2C_READY)| \
(IS_EXT_REG) |(IS_TIMINT) | \
(IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \
(IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \
(IS_MAC1) |(IS_MAC2) | \
(IS_R1_C) |(IS_R2_C) | \
(IS_XS1_C) |(IS_XA1_C) | \
(IS_XS2_C) |(IS_XA2_C))
#define IRQ_HWE_MASK (IS_ERR_MSK) /* enable all HW irqs */
typedef struct s_DevNet DEV_NET;
struct s_DevNet {
int PortNr;
int NetNr;
SK_AC *pAC;
};
typedef struct s_TxPort TX_PORT;
struct s_TxPort {
/* the transmit descriptor rings */
caddr_t pTxDescrRing; /* descriptor area memory */
SK_U64 VTxDescrRing; /* descr. area bus virt. addr. */
TXD *pTxdRingHead; /* Head of Tx rings */
TXD *pTxdRingTail; /* Tail of Tx rings */
TXD *pTxdRingPrev; /* descriptor sent previously */
int TxdRingFree; /* # of free entrys */
spinlock_t TxDesRingLock; /* serialize descriptor accesses */
SK_IOC HwAddr; /* bmu registers address */
int PortIndex; /* index number of port (0 or 1) */
};
typedef struct s_RxPort RX_PORT;
struct s_RxPort {
/* the receive descriptor rings */
caddr_t pRxDescrRing; /* descriptor area memory */
SK_U64 VRxDescrRing; /* descr. area bus virt. addr. */
RXD *pRxdRingHead; /* Head of Rx rings */
RXD *pRxdRingTail; /* Tail of Rx rings */
RXD *pRxdRingPrev; /* descriptor given to BMU previously */
int RxdRingFree; /* # of free entrys */
int RxCsum; /* use receive checksum hardware */
spinlock_t RxDesRingLock; /* serialize descriptor accesses */
int RxFillLimit; /* limit for buffers in ring */
SK_IOC HwAddr; /* bmu registers address */
int PortIndex; /* index number of port (0 or 1) */
};
/* Definitions needed for interrupt moderation *******************************/
#define IRQ_EOF_AS_TX ((IS_XA1_F) | (IS_XA2_F))
#define IRQ_EOF_SY_TX ((IS_XS1_F) | (IS_XS2_F))
#define IRQ_MASK_TX_ONLY ((IRQ_EOF_AS_TX)| (IRQ_EOF_SY_TX))
#define IRQ_MASK_RX_ONLY ((IS_R1_F) | (IS_R2_F))
#define IRQ_MASK_SP_ONLY (SPECIAL_IRQS)
#define IRQ_MASK_TX_RX ((IRQ_MASK_TX_ONLY)| (IRQ_MASK_RX_ONLY))
#define IRQ_MASK_SP_RX ((SPECIAL_IRQS) | (IRQ_MASK_RX_ONLY))
#define IRQ_MASK_SP_TX ((SPECIAL_IRQS) | (IRQ_MASK_TX_ONLY))
#define IRQ_MASK_RX_TX_SP ((SPECIAL_IRQS) | (IRQ_MASK_TX_RX))
#define C_INT_MOD_NONE 1
#define C_INT_MOD_STATIC 2
#define C_INT_MOD_DYNAMIC 4
#define C_CLK_FREQ_GENESIS 53215000 /* shorter: 53.125 MHz */
#define C_CLK_FREQ_YUKON 78215000 /* shorter: 78.125 MHz */
#define C_INTS_PER_SEC_DEFAULT 2000
#define C_INT_MOD_ENABLE_PERCENTAGE 50 /* if higher 50% enable */
#define C_INT_MOD_DISABLE_PERCENTAGE 50 /* if lower 50% disable */
#define C_INT_MOD_IPS_LOWER_RANGE 30
#define C_INT_MOD_IPS_UPPER_RANGE 40000
typedef struct s_DynIrqModInfo DIM_INFO;
struct s_DynIrqModInfo {
unsigned long PrevTimeVal;
unsigned int PrevSysLoad;
unsigned int PrevUsedTime;
unsigned int PrevTotalTime;
int PrevUsedDescrRatio;
int NbrProcessedDescr;
SK_U64 PrevPort0RxIntrCts;
SK_U64 PrevPort1RxIntrCts;
SK_U64 PrevPort0TxIntrCts;
SK_U64 PrevPort1TxIntrCts;
SK_BOOL ModJustEnabled; /* Moderation just enabled yes/no */
int MaxModIntsPerSec; /* Moderation Threshold */
int MaxModIntsPerSecUpperLimit; /* Upper limit for DIM */
int MaxModIntsPerSecLowerLimit; /* Lower limit for DIM */
long MaskIrqModeration; /* ModIrqType (eg. 'TxRx') */
SK_BOOL DisplayStats; /* Stats yes/no */
SK_BOOL AutoSizing; /* Resize DIM-timer on/off */
int IntModTypeSelect; /* EnableIntMod (eg. 'dynamic') */
SK_TIMER ModTimer; /* just some timer */
};
typedef struct s_PerStrm PER_STRM;
#define SK_ALLOC_IRQ 0x00000001
#ifdef SK_DIAG_SUPPORT
#define DIAG_ACTIVE 1
#define DIAG_NOTACTIVE 0
#endif
/****************************************************************************
* Per board structure / Adapter Context structure:
* Allocated within attach(9e) and freed within detach(9e).
* Contains all 'per device' necessary handles, flags, locks etc.:
*/
struct s_AC {
SK_GEINIT GIni; /* GE init struct */
SK_PNMI Pnmi; /* PNMI data struct */
SK_VPD vpd; /* vpd data struct */
SK_QUEUE Event; /* Event queue */
SK_HWT Hwt; /* Hardware Timer control struct */
SK_TIMCTRL Tim; /* Software Timer control struct */
SK_I2C I2c; /* I2C relevant data structure */
SK_ADDR Addr; /* for Address module */
SK_CSUM Csum; /* for checksum module */
SK_RLMT Rlmt; /* for rlmt module */
spinlock_t SlowPathLock; /* Normal IRQ lock */
struct timer_list BlinkTimer; /* for LED blinking */
int LedsOn;
SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */
int RlmtMode; /* link check mode to set */
int RlmtNets; /* Number of nets */
SK_IOC IoBase; /* register set of adapter */
int BoardLevel; /* level of active hw init (0-2) */
SK_U32 AllocFlag; /* flag allocation of resources */
struct pci_dev *PciDev; /* for access to pci config space */
struct SK_NET_DEVICE *dev[2]; /* pointer to device struct */
int RxBufSize; /* length of receive buffers */
struct net_device_stats stats; /* linux 'netstat -i' statistics */
int Index; /* internal board index number */
/* adapter RAM sizes for queues of active port */
int RxQueueSize; /* memory used for receive queue */
int TxSQueueSize; /* memory used for sync. tx queue */
int TxAQueueSize; /* memory used for async. tx queue */
int PromiscCount; /* promiscuous mode counter */
int AllMultiCount; /* allmulticast mode counter */
int MulticCount; /* number of different MC */
/* addresses for this board */
/* (may be more than HW can)*/
int HWRevision; /* Hardware revision */
int ActivePort; /* the active XMAC port */
int MaxPorts; /* number of activated ports */
int TxDescrPerRing; /* # of descriptors per tx ring */
int RxDescrPerRing; /* # of descriptors per rx ring */
caddr_t pDescrMem; /* Pointer to the descriptor area */
dma_addr_t pDescrMemDMA; /* PCI DMA address of area */
/* the port structures with descriptor rings */
TX_PORT TxPort[SK_MAX_MACS][2];
RX_PORT RxPort[SK_MAX_MACS];
SK_BOOL CheckQueue; /* check event queue soon */
SK_TIMER DrvCleanupTimer;/* to check for pending descriptors */
DIM_INFO DynIrqModInfo; /* all data related to DIM */
/* Only for tests */
int PortDown;
int ChipsetType; /* Chipset family type
* 0 == Genesis family support
* 1 == Yukon family support
*/
#ifdef SK_DIAG_SUPPORT
SK_U32 DiagModeActive; /* is diag active? */
SK_BOOL DiagFlowCtrl; /* for control purposes */
SK_PNMI_STRUCT_DATA PnmiBackup; /* backup structure for all Pnmi-Data */
SK_BOOL WasIfUp[SK_MAX_MACS]; /* for OpenClose while
* DIAG is busy with NIC
*/
#endif
};
#endif /* __INC_SKDRV2ND_H */
/******************************************************************************
*
* Name: skerror.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.7 $
* Date: $Date: 2003/05/13 17:25:13 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef _INC_SKERROR_H_
#define _INC_SKERROR_H_
/*
* Define Error Classes
*/
#define SK_ERRCL_OTHER (0) /* Other error */
#define SK_ERRCL_CONFIG (1L<<0) /* Configuration error */
#define SK_ERRCL_INIT (1L<<1) /* Initialization error */
#define SK_ERRCL_NORES (1L<<2) /* Out of Resources error */
#define SK_ERRCL_SW (1L<<3) /* Internal Software error */
#define SK_ERRCL_HW (1L<<4) /* Hardware Failure */
#define SK_ERRCL_COMM (1L<<5) /* Communication error */
/*
* Define Error Code Bases
*/
#define SK_ERRBASE_RLMT 100 /* Base Error number for RLMT */
#define SK_ERRBASE_HWINIT 200 /* Base Error number for HWInit */
#define SK_ERRBASE_VPD 300 /* Base Error number for VPD */
#define SK_ERRBASE_PNMI 400 /* Base Error number for PNMI */
#define SK_ERRBASE_CSUM 500 /* Base Error number for Checksum */
#define SK_ERRBASE_SIRQ 600 /* Base Error number for Special IRQ */
#define SK_ERRBASE_I2C 700 /* Base Error number for I2C module */
#define SK_ERRBASE_QUEUE 800 /* Base Error number for Scheduler */
#define SK_ERRBASE_ADDR 900 /* Base Error number for Address module */
#define SK_ERRBASE_PECP 1000 /* Base Error number for PECP */
#define SK_ERRBASE_DRV 1100 /* Base Error number for Driver */
#endif /* _INC_SKERROR_H_ */
/******************************************************************************
*
* Name: skgedrv.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.10 $
* Date: $Date: 2003/07/04 12:25:01 $
* Purpose: Interface with the driver
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef __INC_SKGEDRV_H_
#define __INC_SKGEDRV_H_
/* defines ********************************************************************/
/*
* Define the driver events.
* Usually the events are defined by the destination module.
* In case of the driver we put the definition of the events here.
*/
#define SK_DRV_PORT_RESET 1 /* The port needs to be reset */
#define SK_DRV_NET_UP 2 /* The net is operational */
#define SK_DRV_NET_DOWN 3 /* The net is down */
#define SK_DRV_SWITCH_SOFT 4 /* Ports switch with both links connected */
#define SK_DRV_SWITCH_HARD 5 /* Port switch due to link failure */
#define SK_DRV_RLMT_SEND 6 /* Send a RLMT packet */
#define SK_DRV_ADAP_FAIL 7 /* The whole adapter fails */
#define SK_DRV_PORT_FAIL 8 /* One port fails */
#define SK_DRV_SWITCH_INTERN 9 /* Port switch by the driver itself */
#define SK_DRV_POWER_DOWN 10 /* Power down mode */
#define SK_DRV_TIMER 11 /* Timer for free use */
#ifdef SK_NO_RLMT
#define SK_DRV_LINK_UP 12 /* Link Up event for driver */
#define SK_DRV_LINK_DOWN 13 /* Link Down event for driver */
#endif
#define SK_DRV_DOWNSHIFT_DET 14 /* Downshift 4-Pair / 2-Pair (YUKON only) */
#endif /* __INC_SKGEDRV_H_ */
此差异已折叠。
/******************************************************************************
*
* Name: skhwt.h
* Project: Gigabit Ethernet Adapters, Event Scheduler Module
* Version: $Revision: 1.7 $
* Date: $Date: 2003/09/16 12:55:08 $
* Purpose: Defines for the hardware timer functions
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/*
* SKGEHWT.H contains all defines and types for the timer functions
*/
#ifndef _SKGEHWT_H_
#define _SKGEHWT_H_
/*
* SK Hardware Timer
* - needed wherever the HWT module is used
* - use in Adapters context name pAC->Hwt
*/
typedef struct s_Hwt {
SK_U32 TStart; /* HWT start */
SK_U32 TStop; /* HWT stop */
int TActive; /* HWT: flag : active/inactive */
} SK_HWT;
extern void SkHwtInit(SK_AC *pAC, SK_IOC Ioc);
extern void SkHwtStart(SK_AC *pAC, SK_IOC Ioc, SK_U32 Time);
extern void SkHwtStop(SK_AC *pAC, SK_IOC Ioc);
extern SK_U32 SkHwtRead(SK_AC *pAC, SK_IOC Ioc);
extern void SkHwtIsr(SK_AC *pAC, SK_IOC Ioc);
#endif /* _SKGEHWT_H_ */
/******************************************************************************
*
* Name: skgei2c.h
* Project: Gigabit Ethernet Adapters, TWSI-Module
* Version: $Revision: 1.25 $
* Date: $Date: 2003/10/20 09:06:05 $
* Purpose: Special defines for TWSI
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/*
* SKGEI2C.H contains all SK-98xx specific defines for the TWSI handling
*/
#ifndef _INC_SKGEI2C_H_
#define _INC_SKGEI2C_H_
/*
* Macros to access the B2_I2C_CTRL
*/
#define SK_I2C_CTL(IoC, flag, dev, dev_size, reg, burst) \
SK_OUT32(IoC, B2_I2C_CTRL,\
(flag ? 0x80000000UL : 0x0L) | \
(((SK_U32)reg << 16) & I2C_ADDR) | \
(((SK_U32)dev << 9) & I2C_DEV_SEL) | \
(dev_size & I2C_DEV_SIZE) | \
((burst << 4) & I2C_BURST_LEN))
#define SK_I2C_STOP(IoC) { \
SK_U32 I2cCtrl; \
SK_IN32(IoC, B2_I2C_CTRL, &I2cCtrl); \
SK_OUT32(IoC, B2_I2C_CTRL, I2cCtrl | I2C_STOP); \
}
#define SK_I2C_GET_CTL(IoC, pI2cCtrl) SK_IN32(IoC, B2_I2C_CTRL, pI2cCtrl)
/*
* Macros to access the TWSI SW Registers
*/
#define SK_I2C_SET_BIT(IoC, SetBits) { \
SK_U8 OrgBits; \
SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SK_U8)(SetBits)); \
}
#define SK_I2C_CLR_BIT(IoC, ClrBits) { \
SK_U8 OrgBits; \
SK_IN8(IoC, B2_I2C_SW, &OrgBits); \
SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~((SK_U8)(ClrBits))); \
}
#define SK_I2C_GET_SW(IoC, pI2cSw) SK_IN8(IoC, B2_I2C_SW, pI2cSw)
/*
* define the possible sensor states
*/
#define SK_SEN_IDLE 0 /* Idle: sensor not read */
#define SK_SEN_VALUE 1 /* Value Read cycle */
#define SK_SEN_VALEXT 2 /* Extended Value Read cycle */
/*
* Conversion factor to convert read Voltage sensor to milli Volt
* Conversion factor to convert read Temperature sensor to 10th degree Celsius
*/
#define SK_LM80_VT_LSB 22 /* 22mV LSB resolution */
#define SK_LM80_TEMP_LSB 10 /* 1 degree LSB resolution */
#define SK_LM80_TEMPEXT_LSB 5 /* 0.5 degree LSB resolution for ext. val. */
/*
* formula: counter = (22500*60)/(rpm * divisor * pulses/2)
* assuming: 6500rpm, 4 pulses, divisor 1
*/
#define SK_LM80_FAN_FAKTOR ((22500L*60)/(1*2))
/*
* Define sensor management data
* Maximum is reached on Genesis copper dual port and Yukon-64
* Board specific maximum is in pAC->I2c.MaxSens
*/
#define SK_MAX_SENSORS 8 /* maximal no. of installed sensors */
#define SK_MIN_SENSORS 5 /* minimal no. of installed sensors */
/*
* To watch the state machine (SM) use the timer in two ways
* instead of one as hitherto
*/
#define SK_TIMER_WATCH_SM 0 /* Watch the SM to finish in a spec. time */
#define SK_TIMER_NEW_GAUGING 1 /* Start a new gauging when timer expires */
/*
* Defines for the individual thresholds
*/
/* Temperature sensor */
#define SK_SEN_TEMP_HIGH_ERR 800 /* Temperature High Err Threshold */
#define SK_SEN_TEMP_HIGH_WARN 700 /* Temperature High Warn Threshold */
#define SK_SEN_TEMP_LOW_WARN 100 /* Temperature Low Warn Threshold */
#define SK_SEN_TEMP_LOW_ERR 0 /* Temperature Low Err Threshold */
/* VCC which should be 5 V */
#define SK_SEN_PCI_5V_HIGH_ERR 5588 /* Voltage PCI High Err Threshold */
#define SK_SEN_PCI_5V_HIGH_WARN 5346 /* Voltage PCI High Warn Threshold */
#define SK_SEN_PCI_5V_LOW_WARN 4664 /* Voltage PCI Low Warn Threshold */
#define SK_SEN_PCI_5V_LOW_ERR 4422 /* Voltage PCI Low Err Threshold */
/*
* VIO may be 5 V or 3.3 V. Initialization takes two parts:
* 1. Initialize lowest lower limit and highest higher limit.
* 2. After the first value is read correct the upper or the lower limit to
* the appropriate C constant.
*
* Warning limits are +-5% of the exepected voltage.
* Error limits are +-10% of the expected voltage.
*/
/* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
#define SK_SEN_PCI_IO_5V_HIGH_ERR 5566 /* + 10% V PCI-IO High Err Threshold */
#define SK_SEN_PCI_IO_5V_HIGH_WARN 5324 /* + 5% V PCI-IO High Warn Threshold */
/* 5000 mVolt */
#define SK_SEN_PCI_IO_5V_LOW_WARN 4686 /* - 5% V PCI-IO Low Warn Threshold */
#define SK_SEN_PCI_IO_5V_LOW_ERR 4444 /* - 10% V PCI-IO Low Err Threshold */
#define SK_SEN_PCI_IO_RANGE_LIMITER 4000 /* 4000 mV range delimiter */
/* correction values for the second pass */
#define SK_SEN_PCI_IO_3V3_HIGH_ERR 3850 /* + 15% V PCI-IO High Err Threshold */
#define SK_SEN_PCI_IO_3V3_HIGH_WARN 3674 /* + 10% V PCI-IO High Warn Threshold */
/* 3300 mVolt */
#define SK_SEN_PCI_IO_3V3_LOW_WARN 2926 /* - 10% V PCI-IO Low Warn Threshold */
#define SK_SEN_PCI_IO_3V3_LOW_ERR 2772 /* - 15% V PCI-IO Low Err Threshold */
/*
* VDD voltage
*/
#define SK_SEN_VDD_HIGH_ERR 3630 /* Voltage ASIC High Err Threshold */
#define SK_SEN_VDD_HIGH_WARN 3476 /* Voltage ASIC High Warn Threshold */
#define SK_SEN_VDD_LOW_WARN 3146 /* Voltage ASIC Low Warn Threshold */
#define SK_SEN_VDD_LOW_ERR 2970 /* Voltage ASIC Low Err Threshold */
/*
* PHY PLL 3V3 voltage
*/
#define SK_SEN_PLL_3V3_HIGH_ERR 3630 /* Voltage PMA High Err Threshold */
#define SK_SEN_PLL_3V3_HIGH_WARN 3476 /* Voltage PMA High Warn Threshold */
#define SK_SEN_PLL_3V3_LOW_WARN 3146 /* Voltage PMA Low Warn Threshold */
#define SK_SEN_PLL_3V3_LOW_ERR 2970 /* Voltage PMA Low Err Threshold */
/*
* VAUX (YUKON only)
*/
#define SK_SEN_VAUX_3V3_HIGH_ERR 3630 /* Voltage VAUX High Err Threshold */
#define SK_SEN_VAUX_3V3_HIGH_WARN 3476 /* Voltage VAUX High Warn Threshold */
#define SK_SEN_VAUX_3V3_LOW_WARN 3146 /* Voltage VAUX Low Warn Threshold */
#define SK_SEN_VAUX_3V3_LOW_ERR 2970 /* Voltage VAUX Low Err Threshold */
#define SK_SEN_VAUX_0V_WARN_ERR 0 /* if VAUX not present */
#define SK_SEN_VAUX_RANGE_LIMITER 1000 /* 1000 mV range delimiter */
/*
* PHY 2V5 voltage
*/
#define SK_SEN_PHY_2V5_HIGH_ERR 2750 /* Voltage PHY High Err Threshold */
#define SK_SEN_PHY_2V5_HIGH_WARN 2640 /* Voltage PHY High Warn Threshold */
#define SK_SEN_PHY_2V5_LOW_WARN 2376 /* Voltage PHY Low Warn Threshold */
#define SK_SEN_PHY_2V5_LOW_ERR 2222 /* Voltage PHY Low Err Threshold */
/*
* ASIC Core 1V5 voltage (YUKON only)
*/
#define SK_SEN_CORE_1V5_HIGH_ERR 1650 /* Voltage ASIC Core High Err Threshold */
#define SK_SEN_CORE_1V5_HIGH_WARN 1575 /* Voltage ASIC Core High Warn Threshold */
#define SK_SEN_CORE_1V5_LOW_WARN 1425 /* Voltage ASIC Core Low Warn Threshold */
#define SK_SEN_CORE_1V5_LOW_ERR 1350 /* Voltage ASIC Core Low Err Threshold */
/*
* FAN 1 speed
*/
/* assuming: 6500rpm +-15%, 4 pulses,
* warning at: 80 %
* error at: 70 %
* no upper limit
*/
#define SK_SEN_FAN_HIGH_ERR 20000 /* FAN Speed High Err Threshold */
#define SK_SEN_FAN_HIGH_WARN 20000 /* FAN Speed High Warn Threshold */
#define SK_SEN_FAN_LOW_WARN 5200 /* FAN Speed Low Warn Threshold */
#define SK_SEN_FAN_LOW_ERR 4550 /* FAN Speed Low Err Threshold */
/*
* Some Voltages need dynamic thresholds
*/
#define SK_SEN_DYN_INIT_NONE 0 /* No dynamic init of thresholds */
#define SK_SEN_DYN_INIT_PCI_IO 10 /* Init PCI-IO with new thresholds */
#define SK_SEN_DYN_INIT_VAUX 11 /* Init VAUX with new thresholds */
extern int SkLm80ReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
#endif /* n_INC_SKGEI2C_H */
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/******************************************************************************
*
* Name: skgesirq.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.30 $
* Date: $Date: 2003/07/04 12:34:13 $
* Purpose: SK specific Gigabit Ethernet special IRQ functions
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef _INC_SKGESIRQ_H_
#define _INC_SKGESIRQ_H_
/* Define return codes of SkGePortCheckUp and CheckShort */
#define SK_HW_PS_NONE 0 /* No action needed */
#define SK_HW_PS_RESTART 1 /* Restart needed */
#define SK_HW_PS_LINK 2 /* Link Up actions needed */
/*
* Define the Event the special IRQ/INI module can handle
*/
#define SK_HWEV_WATIM 1 /* Timeout for WA Errata #2 XMAC */
#define SK_HWEV_PORT_START 2 /* Port Start Event by RLMT */
#define SK_HWEV_PORT_STOP 3 /* Port Stop Event by RLMT */
#define SK_HWEV_CLEAR_STAT 4 /* Clear Statistics by PNMI */
#define SK_HWEV_UPDATE_STAT 5 /* Update Statistics by PNMI */
#define SK_HWEV_SET_LMODE 6 /* Set Link Mode by PNMI */
#define SK_HWEV_SET_FLOWMODE 7 /* Set Flow Control Mode by PNMI */
#define SK_HWEV_SET_ROLE 8 /* Set Master/Slave (Role) by PNMI */
#define SK_HWEV_SET_SPEED 9 /* Set Link Speed by PNMI */
#define SK_HWEV_HALFDUP_CHK 10 /* Half Duplex Hangup Workaround */
#define SK_WA_ACT_TIME (5000000UL) /* 5 sec */
#define SK_WA_INA_TIME (100000UL) /* 100 msec */
#define SK_HALFDUP_CHK_TIME (10000UL) /* 10 msec */
/*
* Define the error numbers and messages
*/
#define SKERR_SIRQ_E001 (SK_ERRBASE_SIRQ+0)
#define SKERR_SIRQ_E001MSG "Unknown event"
#define SKERR_SIRQ_E002 (SKERR_SIRQ_E001+1)
#define SKERR_SIRQ_E002MSG "Packet timeout RX1"
#define SKERR_SIRQ_E003 (SKERR_SIRQ_E002+1)
#define SKERR_SIRQ_E003MSG "Packet timeout RX2"
#define SKERR_SIRQ_E004 (SKERR_SIRQ_E003+1)
#define SKERR_SIRQ_E004MSG "MAC 1 not correctly initialized"
#define SKERR_SIRQ_E005 (SKERR_SIRQ_E004+1)
#define SKERR_SIRQ_E005MSG "MAC 2 not correctly initialized"
#define SKERR_SIRQ_E006 (SKERR_SIRQ_E005+1)
#define SKERR_SIRQ_E006MSG "CHECK failure R1"
#define SKERR_SIRQ_E007 (SKERR_SIRQ_E006+1)
#define SKERR_SIRQ_E007MSG "CHECK failure R2"
#define SKERR_SIRQ_E008 (SKERR_SIRQ_E007+1)
#define SKERR_SIRQ_E008MSG "CHECK failure XS1"
#define SKERR_SIRQ_E009 (SKERR_SIRQ_E008+1)
#define SKERR_SIRQ_E009MSG "CHECK failure XA1"
#define SKERR_SIRQ_E010 (SKERR_SIRQ_E009+1)
#define SKERR_SIRQ_E010MSG "CHECK failure XS2"
#define SKERR_SIRQ_E011 (SKERR_SIRQ_E010+1)
#define SKERR_SIRQ_E011MSG "CHECK failure XA2"
#define SKERR_SIRQ_E012 (SKERR_SIRQ_E011+1)
#define SKERR_SIRQ_E012MSG "unexpected IRQ Master error"
#define SKERR_SIRQ_E013 (SKERR_SIRQ_E012+1)
#define SKERR_SIRQ_E013MSG "unexpected IRQ Status error"
#define SKERR_SIRQ_E014 (SKERR_SIRQ_E013+1)
#define SKERR_SIRQ_E014MSG "Parity error on RAM (read)"
#define SKERR_SIRQ_E015 (SKERR_SIRQ_E014+1)
#define SKERR_SIRQ_E015MSG "Parity error on RAM (write)"
#define SKERR_SIRQ_E016 (SKERR_SIRQ_E015+1)
#define SKERR_SIRQ_E016MSG "Parity error MAC 1"
#define SKERR_SIRQ_E017 (SKERR_SIRQ_E016+1)
#define SKERR_SIRQ_E017MSG "Parity error MAC 2"
#define SKERR_SIRQ_E018 (SKERR_SIRQ_E017+1)
#define SKERR_SIRQ_E018MSG "Parity error RX 1"
#define SKERR_SIRQ_E019 (SKERR_SIRQ_E018+1)
#define SKERR_SIRQ_E019MSG "Parity error RX 2"
#define SKERR_SIRQ_E020 (SKERR_SIRQ_E019+1)
#define SKERR_SIRQ_E020MSG "MAC transmit FIFO underrun"
#define SKERR_SIRQ_E021 (SKERR_SIRQ_E020+1)
#define SKERR_SIRQ_E021MSG "Spurious TWSI interrupt"
#define SKERR_SIRQ_E022 (SKERR_SIRQ_E021+1)
#define SKERR_SIRQ_E022MSG "Cable pair swap error"
#define SKERR_SIRQ_E023 (SKERR_SIRQ_E022+1)
#define SKERR_SIRQ_E023MSG "Auto-negotiation error"
#define SKERR_SIRQ_E024 (SKERR_SIRQ_E023+1)
#define SKERR_SIRQ_E024MSG "FIFO overflow error"
#define SKERR_SIRQ_E025 (SKERR_SIRQ_E024+1)
#define SKERR_SIRQ_E025MSG "2 Pair Downshift detected"
extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
#endif /* _INC_SKGESIRQ_H_ */
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/******************************************************************************
*
* Name: version.h
* Project: GEnesis, PCI Gigabit Ethernet Adapter
* Version: $Revision: 1.5 $
* Date: $Date: 2003/10/07 08:16:51 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifdef lint
static const char SysKonnectFileId[] = "@(#) (C) SysKonnect GmbH.";
static const char SysKonnectBuildNumber[] =
"@(#)SK-BUILD: 6.23 PL: 01";
#endif /* !defined(lint) */
#define BOOT_STRING "sk98lin: Network Device Driver v6.23\n" \
"(C)Copyright 1999-2004 Marvell(R)."
#define VER_STRING "6.23"
#define DRIVER_FILE_NAME "sk98lin"
#define DRIVER_REL_DATE "Feb-13-2004"
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......@@ -2148,7 +2148,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) {
if (ugeth->tx_skbuff[i][j]) {
dma_unmap_single(NULL,
((qe_bd_t *)bd)->buf,
((struct qe_bd *)bd)->buf,
(in_be32((u32 *)bd) &
BD_LENGTH_MASK),
DMA_TO_DEVICE);
......
......@@ -122,7 +122,7 @@ void bcm43xx_wireless_core_reset(struct bcm43xx_private *bcm, int connect_phy);
void bcm43xx_mac_suspend(struct bcm43xx_private *bcm);
void bcm43xx_mac_enable(struct bcm43xx_private *bcm);
void bcm43xx_periodic_tasks_delete(struct bcm43xx_private *bcm);
void bcm43xx_cancel_work(struct bcm43xx_private *bcm);
void bcm43xx_periodic_tasks_setup(struct bcm43xx_private *bcm);
void bcm43xx_controller_restart(struct bcm43xx_private *bcm, const char *reason);
......
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