amdgpu/pp: use array_size to size the pwrvirus tables.

This avoids fragile hardcoding of array size.
Signed-off-by: NDave Airlie <airlied@redhat.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/powerplay/inc/fiji_pwrvirus.h

@@ -35,8 +35,7 @@ struct PWR_Command_Table
 };
 typedef struct PWR_Command_Table PWR_Command_Table;
 
-#define PWR_VIRUS_TABLE_SIZE  10243
-static const PWR_Command_Table PwrVirusTable[PWR_VIRUS_TABLE_SIZE] =
+static const PWR_Command_Table PwrVirusTable[] =
 {
     { 0x100100b6, mmPCIE_INDEX                               },
     { 0x00000000, mmPCIE_DATA                                },

drivers/gpu/drm/amd/powerplay/inc/polaris10_pwrvirus.h

@@ -36,10 +36,7 @@ struct PWR_Command_Table {
 
 typedef struct PWR_Command_Table PWR_Command_Table;
 
-
-#define PWR_VIRUS_TABLE_SIZE  10031
-
-static const PWR_Command_Table pwr_virus_table[PWR_VIRUS_TABLE_SIZE] = {
+static const PWR_Command_Table pwr_virus_table[] = {
 	{ 0x00000000, mmRLC_CNTL                                 },
 	{ 0x00000002, mmRLC_SRM_CNTL                             },
 	{ 0x15000000, mmCP_ME_CNTL                               },

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

@@ -167,7 +167,7 @@ static int fiji_setup_pwr_virus(struct pp_hwmgr *hwmgr)
 
 	const PWR_Command_Table *pvirus = PwrVirusTable;
 
-	for (i = 0; i < PWR_VIRUS_TABLE_SIZE; i++) {
+	for (i = 0; i < ARRAY_SIZE(PwrVirusTable); i++) {
 		reg  = pvirus->reg;
 		data = pvirus->data;
 		if (reg != 0xffffffff)

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

@@ -68,7 +68,7 @@ static int polaris10_setup_pwr_virus(struct pp_hwmgr *hwmgr)
 
 	const PWR_Command_Table *pvirus = pwr_virus_table;
 
-	for (i = 0; i < PWR_VIRUS_TABLE_SIZE; i++) {
+	for (i = 0; i < ARRAY_SIZE(pwr_virus_table); i++) {
 		reg  = pvirus->reg;
 		data = pvirus->data;
 		if (reg != 0xffffffff) {