提交 cdcc520d 编写于 作者: C Chris Snook 提交者: David S. Miller

atl1: explain 32-bit DMA restriction

Document the fact that atl1 uses a single shared register for the high 32
bits of 64-bit DMA addresses, making 64-bit DMA more trouble than it's worth.
Signed-off-by: NChris Snook <csnook@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
上级 01faccbf
...@@ -2209,8 +2209,14 @@ static int __devinit atl1_probe(struct pci_dev *pdev, ...@@ -2209,8 +2209,14 @@ static int __devinit atl1_probe(struct pci_dev *pdev,
return err; return err;
/* /*
* 64-bit DMA currently has data corruption problems, so let's just * The atl1 chip can DMA to 64-bit addresses, but it uses a single
* use 32-bit DMA for now. This is a big hack that is probably wrong. * shared register for the high 32 bits, so only a single, aligned,
* 4 GB physical address range can be used at a time.
*
* Supporting 64-bit DMA on this hardware is more trouble than it's
* worth. It is far easier to limit to 32-bit DMA than update
* various kernel subsystems to support the mechanics required by a
* fixed-high-32-bit system.
*/ */
err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (err) { if (err) {
......
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