未验证 提交 ccfb9299 编写于 作者: M Michael Walle 提交者: Tudor Ambarus

mtd: spi-nor: Add support for at25sl321

This was tested in single, dual and quad mode on a custom board with the
NXP FlexSPI controller.
Signed-off-by: NMichael Walle <michael@walle.cc>
Signed-off-by: NTudor Ambarus <tudor.ambarus@microchip.com>
上级 f3418718
...@@ -2323,6 +2323,9 @@ static const struct flash_info spi_nor_ids[] = { ...@@ -2323,6 +2323,9 @@ static const struct flash_info spi_nor_ids[] = {
{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) }, { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
{ "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) }, { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
{ "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) },
{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) }, { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
{ "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) }, { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
......
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