drm/tegra: sor - Remove pixel clock rounding
The code currently rounds up the clock to the next MHZ, which is rounding up a 69.5MHz clock to 70MHz on my machine. This in turn prevents the display from syncing. Removing this rounding fixes eDP for me. Signed-off-by: NStéphane Marchesin <marcheu@chromium.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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