提交 c946feaa 编写于 作者: D Dinh Nguyen

ARM: dts: arria10: Add EMAC OCP reset property

Add the EMAC's OCP reset property on Arria10. The OCP reset bits are
also needed to correctly bring the EMACs out of reset correctly.
Signed-off-by: NDinh Nguyen <dinguyen@kernel.org>
上级 d9b9f805
......@@ -431,8 +431,8 @@
rx-fifo-depth = <16384>;
clocks = <&l4_mp_clk>;
clock-names = "stmmaceth";
resets = <&rst EMAC0_RESET>;
reset-names = "stmmaceth";
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
reset-names = "stmmaceth", "stmmaceth-ocp";
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
......@@ -451,8 +451,8 @@
rx-fifo-depth = <16384>;
clocks = <&l4_mp_clk>;
clock-names = "stmmaceth";
resets = <&rst EMAC1_RESET>;
reset-names = "stmmaceth";
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth", "stmmaceth-ocp";
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
......@@ -470,8 +470,9 @@
tx-fifo-depth = <4096>;
rx-fifo-depth = <16384>;
clocks = <&l4_mp_clk>;
resets = <&rst EMAC2_RESET>;
clock-names = "stmmaceth";
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth", "stmmaceth-ocp";
snps,axi-config = <&socfpga_axi_setup>;
status = "disabled";
};
......
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