提交 c87ce658 编写于 作者: L Linus Torvalds

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Move serial_dev_init to device_initcall()
  [POWERPC] Enable GENERIC_ISA_DMA if FSL_ULI1575 to fix compile issue
  [POWERPC] cpm2: Fix off-by-one error in setbrg().
  [PPC] 8xx: Fix r3 trashing due to 8MB TLB page instantiation
  [POWERPC] 8{5,6}xx: Fix build issue with !CONFIG_PCI
......@@ -493,7 +493,7 @@ static int __init serial_dev_init(void)
return platform_device_register(&serial_device);
}
arch_initcall(serial_dev_init);
device_initcall(serial_dev_init);
/*
......
......@@ -178,7 +178,9 @@ define_machine(mpc8544_ds) {
.probe = mpc8544_ds_probe,
.setup_arch = mpc8544_ds_setup_arch,
.init_IRQ = mpc8544_ds_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
.get_irq = mpic_get_irq,
.restart = mpc85xx_restart,
.calibrate_decr = generic_calibrate_decr,
......
......@@ -351,10 +351,10 @@ define_machine(mpc85xx_cds) {
.get_irq = mpic_get_irq,
#ifdef CONFIG_PCI
.restart = mpc85xx_cds_restart,
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#else
.restart = mpc85xx_restart,
#endif
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
};
......@@ -207,5 +207,7 @@ define_machine(mpc85xx_mds) {
.restart = mpc85xx_restart,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
};
......@@ -250,5 +250,7 @@ define_machine(mpc86xx_hpcn) {
.time_init = mpc86xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
};
......@@ -285,6 +285,7 @@ config AXON_RAM
config FSL_ULI1575
bool
default n
select GENERIC_ISA_DMA
help
Supports for the ULI1575 PCIe south bridge that exists on some
Freescale reference boards. The boards all use the ULI in pretty
......
......@@ -102,7 +102,7 @@ cpm_setbrg(uint brg, uint rate)
brg -= 4;
}
bp += brg;
*bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
out_be32(bp, (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN);
cpm2_unmap(bp);
}
......
......@@ -495,9 +495,7 @@ LoadLargeDTLB:
lwz r11, 4(r0)
lwz r12, 16(r0)
#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
#endif
rfi
/* This is the data TLB error on the MPC8xx. This could be due to
......
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