提交 c3e838a2 编写于 作者: C Chris Dearman 提交者: Ralf Baechle

[MIPS] Fix timer/performance interrupt detection

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 6fb88ce0
......@@ -1372,12 +1372,12 @@ void __init per_cpu_trap_init(void)
*/
if (cpu_has_mips_r2) {
cp0_compare_irq = (read_c0_intctl () >> 29) & 7;
cp0_perfcount_irq = -1;
} else {
cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7;
if (cp0_perfcount_irq != cp0_compare_irq)
if (cp0_perfcount_irq == cp0_compare_irq)
cp0_perfcount_irq = -1;
} else {
cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
cp0_perfcount_irq = -1;
}
#ifdef CONFIG_MIPS_MT_SMTC
......
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