提交 bf92a407 编写于 作者: C Cory Maccarrone 提交者: Tony Lindgren

omap1: I2C mux and clocks for omap7xx

This change adds MUX pin configuration and clocks for I2C support
to OMAP 730 and 850-based devices.
Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
上级 106997c1
...@@ -655,9 +655,9 @@ static struct omap_clk omap_clks[] = { ...@@ -655,9 +655,9 @@ static struct omap_clk omap_clks[] = {
CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX),
/* Virtual clocks */ /* Virtual clocks */
CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310),
CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310), CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX),
CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310), CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX),
CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
......
...@@ -21,13 +21,19 @@ ...@@ -21,13 +21,19 @@
#include <plat/i2c.h> #include <plat/i2c.h>
#include <plat/mux.h> #include <plat/mux.h>
#include <plat/cpu.h>
int __init omap_register_i2c_bus(int bus_id, u32 clkrate, int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
struct i2c_board_info const *info, struct i2c_board_info const *info,
unsigned len) unsigned len)
{ {
omap_cfg_reg(I2C_SDA); if (cpu_is_omap7xx()) {
omap_cfg_reg(I2C_SCL); omap_cfg_reg(I2C_7XX_SDA);
omap_cfg_reg(I2C_7XX_SCL);
} else {
omap_cfg_reg(I2C_SDA);
omap_cfg_reg(I2C_SCL);
}
return omap_plat_register_i2c_bus(bus_id, clkrate, info, len); return omap_plat_register_i2c_bus(bus_id, clkrate, info, len);
} }
...@@ -58,6 +58,10 @@ MUX_CFG_7XX("W19_7XX_USB_DCRST", 3, 7, 1, 6, 0, 0) ...@@ -58,6 +58,10 @@ MUX_CFG_7XX("W19_7XX_USB_DCRST", 3, 7, 1, 6, 0, 0)
MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0) MUX_CFG_7XX("MMC_7XX_CMD", 2, 9, 0, 8, 1, 0)
MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0) MUX_CFG_7XX("MMC_7XX_CLK", 2, 13, 0, 12, 1, 0)
MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0) MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0)
/* I2C interface */
MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0)
MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0)
}; };
#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins)
#else #else
......
...@@ -179,6 +179,10 @@ enum omap7xx_index { ...@@ -179,6 +179,10 @@ enum omap7xx_index {
MMC_7XX_CMD, MMC_7XX_CMD,
MMC_7XX_CLK, MMC_7XX_CLK,
MMC_7XX_DAT0, MMC_7XX_DAT0,
/* I2C */
I2C_7XX_SCL,
I2C_7XX_SDA,
}; };
enum omap1xxx_index { enum omap1xxx_index {
......
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