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Kernel
提交 bf34e683 编写于 作者: L Luciano Coelho
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Merge branch 'wl12xx-next' into for-linville

上级 2eb278e0 3e3947ff
展开全部 隐藏空白更改
内联 并排
Showing with 4818 addition and 956 deletion
drivers/net/wireless/ti/Kconfig
浏览文件 @ bf34e683
......@@ -8,6 +8,7 @@ menuconfig WL_TI
if WL_TI
source "drivers/net/wireless/ti/wl1251/Kconfig"
source "drivers/net/wireless/ti/wl12xx/Kconfig"
source "drivers/net/wireless/ti/wl18xx/Kconfig"
# keep last for automatic dependencies
source "drivers/net/wireless/ti/wlcore/Kconfig"
......
drivers/net/wireless/ti/Makefile
浏览文件 @ bf34e683
......@@ -2,3 +2,4 @@ obj-$(CONFIG_WLCORE) += wlcore/
obj-$(CONFIG_WL12XX) += wl12xx/
obj-$(CONFIG_WL12XX_PLATFORM_DATA) += wlcore/
obj-$(CONFIG_WL1251) += wl1251/
obj-$(CONFIG_WL18XX) += wl18xx/
drivers/net/wireless/ti/wl12xx/Makefile
浏览文件 @ bf34e683
wl12xx-objs = main.o cmd.o acx.o
wl12xx-objs = main.o cmd.o acx.o debugfs.o
obj-$(CONFIG_WL12XX) += wl12xx.o
drivers/net/wireless/ti/wl12xx/acx.h
浏览文件 @ bf34e683
......@@ -24,6 +24,21 @@
#define __WL12XX_ACX_H__
#include "../wlcore/wlcore.h"
#include "../wlcore/acx.h"
#define WL12XX_ACX_ALL_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_INIT_COMPLETE | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_CMD_COMPLETE | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA)
#define WL12XX_INTR_MASK (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA)
struct wl1271_acx_host_config_bitmap {
struct acx_header header;
......@@ -31,6 +46,228 @@ struct wl1271_acx_host_config_bitmap {
__le32 host_cfg_bitmap;
} __packed;
struct wl12xx_acx_tx_statistics {
__le32 internal_desc_overflow;
} __packed;
struct wl12xx_acx_rx_statistics {
__le32 out_of_mem;
__le32 hdr_overflow;
__le32 hw_stuck;
__le32 dropped;
__le32 fcs_err;
__le32 xfr_hint_trig;
__le32 path_reset;
__le32 reset_counter;
} __packed;
struct wl12xx_acx_dma_statistics {
__le32 rx_requested;
__le32 rx_errors;
__le32 tx_requested;
__le32 tx_errors;
} __packed;
struct wl12xx_acx_isr_statistics {
/* host command complete */
__le32 cmd_cmplt;
/* fiqisr() */
__le32 fiqs;
/* (INT_STS_ND & INT_TRIG_RX_HEADER) */
__le32 rx_headers;
/* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
__le32 rx_completes;
/* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
__le32 rx_mem_overflow;
/* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
__le32 rx_rdys;
/* irqisr() */
__le32 irqs;
/* (INT_STS_ND & INT_TRIG_TX_PROC) */
__le32 tx_procs;
/* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
__le32 decrypt_done;
/* (INT_STS_ND & INT_TRIG_DMA0) */
__le32 dma0_done;
/* (INT_STS_ND & INT_TRIG_DMA1) */
__le32 dma1_done;
/* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
__le32 tx_exch_complete;
/* (INT_STS_ND & INT_TRIG_COMMAND) */
__le32 commands;
/* (INT_STS_ND & INT_TRIG_RX_PROC) */
__le32 rx_procs;
/* (INT_STS_ND & INT_TRIG_PM_802) */
__le32 hw_pm_mode_changes;
/* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
__le32 host_acknowledges;
/* (INT_STS_ND & INT_TRIG_PM_PCI) */
__le32 pci_pm;
/* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
__le32 wakeups;
/* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
__le32 low_rssi;
} __packed;
struct wl12xx_acx_wep_statistics {
/* WEP address keys configured */
__le32 addr_key_count;
/* default keys configured */
__le32 default_key_count;
__le32 reserved;
/* number of times that WEP key not found on lookup */
__le32 key_not_found;
/* number of times that WEP key decryption failed */
__le32 decrypt_fail;
/* WEP packets decrypted */
__le32 packets;
/* WEP decrypt interrupts */
__le32 interrupt;
} __packed;
#define ACX_MISSED_BEACONS_SPREAD 10
struct wl12xx_acx_pwr_statistics {
/* the amount of enters into power save mode (both PD & ELP) */
__le32 ps_enter;
/* the amount of enters into ELP mode */
__le32 elp_enter;
/* the amount of missing beacon interrupts to the host */
__le32 missing_bcns;
/* the amount of wake on host-access times */
__le32 wake_on_host;
/* the amount of wake on timer-expire */
__le32 wake_on_timer_exp;
/* the number of packets that were transmitted with PS bit set */
__le32 tx_with_ps;
/* the number of packets that were transmitted with PS bit clear */
__le32 tx_without_ps;
/* the number of received beacons */
__le32 rcvd_beacons;
/* the number of entering into PowerOn (power save off) */
__le32 power_save_off;
/* the number of entries into power save mode */
__le16 enable_ps;
/*
* the number of exits from power save, not including failed PS
* transitions
*/
__le16 disable_ps;
/*
* the number of times the TSF counter was adjusted because
* of drift
*/
__le32 fix_tsf_ps;
/* Gives statistics about the spread continuous missed beacons.
* The 16 LSB are dedicated for the PS mode.
* The 16 MSB are dedicated for the PS mode.
* cont_miss_bcns_spread[0] - single missed beacon.
* cont_miss_bcns_spread[1] - two continuous missed beacons.
* cont_miss_bcns_spread[2] - three continuous missed beacons.
* ...
* cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
*/
__le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
/* the number of beacons in awake mode */
__le32 rcvd_awake_beacons;
} __packed;
struct wl12xx_acx_mic_statistics {
__le32 rx_pkts;
__le32 calc_failure;
} __packed;
struct wl12xx_acx_aes_statistics {
__le32 encrypt_fail;
__le32 decrypt_fail;
__le32 encrypt_packets;
__le32 decrypt_packets;
__le32 encrypt_interrupt;
__le32 decrypt_interrupt;
} __packed;
struct wl12xx_acx_event_statistics {
__le32 heart_beat;
__le32 calibration;
__le32 rx_mismatch;
__le32 rx_mem_empty;
__le32 rx_pool;
__le32 oom_late;
__le32 phy_transmit_error;
__le32 tx_stuck;
} __packed;
struct wl12xx_acx_ps_statistics {
__le32 pspoll_timeouts;
__le32 upsd_timeouts;
__le32 upsd_max_sptime;
__le32 upsd_max_apturn;
__le32 pspoll_max_apturn;
__le32 pspoll_utilization;
__le32 upsd_utilization;
} __packed;
struct wl12xx_acx_rxpipe_statistics {
__le32 rx_prep_beacon_drop;
__le32 descr_host_int_trig_rx_data;
__le32 beacon_buffer_thres_host_int_trig_rx_data;
__le32 missed_beacon_host_int_trig_rx_data;
__le32 tx_xfr_host_int_trig_rx_data;
} __packed;
struct wl12xx_acx_statistics {
struct acx_header header;
struct wl12xx_acx_tx_statistics tx;
struct wl12xx_acx_rx_statistics rx;
struct wl12xx_acx_dma_statistics dma;
struct wl12xx_acx_isr_statistics isr;
struct wl12xx_acx_wep_statistics wep;
struct wl12xx_acx_pwr_statistics pwr;
struct wl12xx_acx_aes_statistics aes;
struct wl12xx_acx_mic_statistics mic;
struct wl12xx_acx_event_statistics event;
struct wl12xx_acx_ps_statistics ps;
struct wl12xx_acx_rxpipe_statistics rxpipe;
} __packed;
int wl1271_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap);
#endif /* __WL12XX_ACX_H__ */
drivers/net/wireless/ti/wl12xx/cmd.c
浏览文件 @ bf34e683
......@@ -65,6 +65,7 @@ int wl1271_cmd_general_parms(struct wl1271 *wl)
struct wl1271_general_parms_cmd *gen_parms;
struct wl1271_ini_general_params *gp =
&((struct wl1271_nvs_file *)wl->nvs)->general_params;
struct wl12xx_priv *priv = wl->priv;
bool answer = false;
int ret;
......@@ -88,7 +89,7 @@ int wl1271_cmd_general_parms(struct wl1271 *wl)
answer = true;
/* Override the REF CLK from the NVS with the one from platform data */
gen_parms->general_params.ref_clock = wl->ref_clock;
gen_parms->general_params.ref_clock = priv->ref_clock;
ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);
if (ret < 0) {
......@@ -118,6 +119,7 @@ int wl128x_cmd_general_parms(struct wl1271 *wl)
struct wl128x_general_parms_cmd *gen_parms;
struct wl128x_ini_general_params *gp =
&((struct wl128x_nvs_file *)wl->nvs)->general_params;
struct wl12xx_priv *priv = wl->priv;
bool answer = false;
int ret;
......@@ -141,8 +143,8 @@ int wl128x_cmd_general_parms(struct wl1271 *wl)
answer = true;
/* Replace REF and TCXO CLKs with the ones from platform data */
gen_parms->general_params.ref_clock = wl->ref_clock;
gen_parms->general_params.tcxo_ref_clock = wl->tcxo_clock;
gen_parms->general_params.ref_clock = priv->ref_clock;
gen_parms->general_params.tcxo_ref_clock = priv->tcxo_clock;
ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), answer);
if (ret < 0) {
......
drivers/net/wireless/ti/wl12xx/debugfs.c 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl12xx
*
* Copyright (C) 2009 Nokia Corporation
* Copyright (C) 2011-2012 Texas Instruments
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include "../wlcore/debugfs.h"
#include "../wlcore/wlcore.h"
#include "wl12xx.h"
#include "acx.h"
#include "debugfs.h"
#define WL12XX_DEBUGFS_FWSTATS_FILE(a, b, c) \
DEBUGFS_FWSTATS_FILE(a, b, c, wl12xx_acx_statistics)
WL12XX_DEBUGFS_FWSTATS_FILE(tx, internal_desc_overflow, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, out_of_mem, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, hdr_overflow, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, hw_stuck, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, dropped, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, fcs_err, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, xfr_hint_trig, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, path_reset, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rx, reset_counter, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(dma, rx_requested, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(dma, rx_errors, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(dma, tx_requested, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(dma, tx_errors, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, cmd_cmplt, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, fiqs, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, rx_headers, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, rx_mem_overflow, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, rx_rdys, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, irqs, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, tx_procs, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, decrypt_done, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, dma0_done, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, dma1_done, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, tx_exch_complete, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, commands, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, rx_procs, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, hw_pm_mode_changes, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, host_acknowledges, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, pci_pm, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, wakeups, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(isr, low_rssi, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(wep, addr_key_count, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(wep, default_key_count, "%u");
/* skipping wep.reserved */
WL12XX_DEBUGFS_FWSTATS_FILE(wep, key_not_found, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(wep, decrypt_fail, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(wep, packets, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(wep, interrupt, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, ps_enter, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, elp_enter, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, missing_bcns, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, wake_on_host, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, wake_on_timer_exp, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, tx_with_ps, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, tx_without_ps, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, rcvd_beacons, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, power_save_off, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, enable_ps, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, disable_ps, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, fix_tsf_ps, "%u");
/* skipping cont_miss_bcns_spread for now */
WL12XX_DEBUGFS_FWSTATS_FILE(pwr, rcvd_awake_beacons, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(mic, rx_pkts, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(mic, calc_failure, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(aes, encrypt_fail, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(aes, decrypt_fail, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(aes, encrypt_packets, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(aes, decrypt_packets, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(aes, encrypt_interrupt, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(aes, decrypt_interrupt, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, heart_beat, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, calibration, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, rx_mismatch, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, rx_mem_empty, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, rx_pool, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, oom_late, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, phy_transmit_error, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(event, tx_stuck, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, pspoll_timeouts, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, upsd_timeouts, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, upsd_max_sptime, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, upsd_max_apturn, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, pspoll_max_apturn, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, pspoll_utilization, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(ps, upsd_utilization, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rxpipe, rx_prep_beacon_drop, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rxpipe, descr_host_int_trig_rx_data, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rxpipe, beacon_buffer_thres_host_int_trig_rx_data,
"%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rxpipe, missed_beacon_host_int_trig_rx_data, "%u");
WL12XX_DEBUGFS_FWSTATS_FILE(rxpipe, tx_xfr_host_int_trig_rx_data, "%u");
int wl12xx_debugfs_add_files(struct wl1271 *wl,
struct dentry *rootdir)
{
int ret = 0;
struct dentry *entry, *stats, *moddir;
moddir = debugfs_create_dir(KBUILD_MODNAME, rootdir);
if (!moddir || IS_ERR(moddir)) {
entry = moddir;
goto err;
}
stats = debugfs_create_dir("fw_stats", moddir);
if (!stats || IS_ERR(stats)) {
entry = stats;
goto err;
}
DEBUGFS_FWSTATS_ADD(tx, internal_desc_overflow);
DEBUGFS_FWSTATS_ADD(rx, out_of_mem);
DEBUGFS_FWSTATS_ADD(rx, hdr_overflow);
DEBUGFS_FWSTATS_ADD(rx, hw_stuck);
DEBUGFS_FWSTATS_ADD(rx, dropped);
DEBUGFS_FWSTATS_ADD(rx, fcs_err);
DEBUGFS_FWSTATS_ADD(rx, xfr_hint_trig);
DEBUGFS_FWSTATS_ADD(rx, path_reset);
DEBUGFS_FWSTATS_ADD(rx, reset_counter);
DEBUGFS_FWSTATS_ADD(dma, rx_requested);
DEBUGFS_FWSTATS_ADD(dma, rx_errors);
DEBUGFS_FWSTATS_ADD(dma, tx_requested);
DEBUGFS_FWSTATS_ADD(dma, tx_errors);
DEBUGFS_FWSTATS_ADD(isr, cmd_cmplt);
DEBUGFS_FWSTATS_ADD(isr, fiqs);
DEBUGFS_FWSTATS_ADD(isr, rx_headers);
DEBUGFS_FWSTATS_ADD(isr, rx_mem_overflow);
DEBUGFS_FWSTATS_ADD(isr, rx_rdys);
DEBUGFS_FWSTATS_ADD(isr, irqs);
DEBUGFS_FWSTATS_ADD(isr, tx_procs);
DEBUGFS_FWSTATS_ADD(isr, decrypt_done);
DEBUGFS_FWSTATS_ADD(isr, dma0_done);
DEBUGFS_FWSTATS_ADD(isr, dma1_done);
DEBUGFS_FWSTATS_ADD(isr, tx_exch_complete);
DEBUGFS_FWSTATS_ADD(isr, commands);
DEBUGFS_FWSTATS_ADD(isr, rx_procs);
DEBUGFS_FWSTATS_ADD(isr, hw_pm_mode_changes);
DEBUGFS_FWSTATS_ADD(isr, host_acknowledges);
DEBUGFS_FWSTATS_ADD(isr, pci_pm);
DEBUGFS_FWSTATS_ADD(isr, wakeups);
DEBUGFS_FWSTATS_ADD(isr, low_rssi);
DEBUGFS_FWSTATS_ADD(wep, addr_key_count);
DEBUGFS_FWSTATS_ADD(wep, default_key_count);
/* skipping wep.reserved */
DEBUGFS_FWSTATS_ADD(wep, key_not_found);
DEBUGFS_FWSTATS_ADD(wep, decrypt_fail);
DEBUGFS_FWSTATS_ADD(wep, packets);
DEBUGFS_FWSTATS_ADD(wep, interrupt);
DEBUGFS_FWSTATS_ADD(pwr, ps_enter);
DEBUGFS_FWSTATS_ADD(pwr, elp_enter);
DEBUGFS_FWSTATS_ADD(pwr, missing_bcns);
DEBUGFS_FWSTATS_ADD(pwr, wake_on_host);
DEBUGFS_FWSTATS_ADD(pwr, wake_on_timer_exp);
DEBUGFS_FWSTATS_ADD(pwr, tx_with_ps);
DEBUGFS_FWSTATS_ADD(pwr, tx_without_ps);
DEBUGFS_FWSTATS_ADD(pwr, rcvd_beacons);
DEBUGFS_FWSTATS_ADD(pwr, power_save_off);
DEBUGFS_FWSTATS_ADD(pwr, enable_ps);
DEBUGFS_FWSTATS_ADD(pwr, disable_ps);
DEBUGFS_FWSTATS_ADD(pwr, fix_tsf_ps);
/* skipping cont_miss_bcns_spread for now */
DEBUGFS_FWSTATS_ADD(pwr, rcvd_awake_beacons);
DEBUGFS_FWSTATS_ADD(mic, rx_pkts);
DEBUGFS_FWSTATS_ADD(mic, calc_failure);
DEBUGFS_FWSTATS_ADD(aes, encrypt_fail);
DEBUGFS_FWSTATS_ADD(aes, decrypt_fail);
DEBUGFS_FWSTATS_ADD(aes, encrypt_packets);
DEBUGFS_FWSTATS_ADD(aes, decrypt_packets);
DEBUGFS_FWSTATS_ADD(aes, encrypt_interrupt);
DEBUGFS_FWSTATS_ADD(aes, decrypt_interrupt);
DEBUGFS_FWSTATS_ADD(event, heart_beat);
DEBUGFS_FWSTATS_ADD(event, calibration);
DEBUGFS_FWSTATS_ADD(event, rx_mismatch);
DEBUGFS_FWSTATS_ADD(event, rx_mem_empty);
DEBUGFS_FWSTATS_ADD(event, rx_pool);
DEBUGFS_FWSTATS_ADD(event, oom_late);
DEBUGFS_FWSTATS_ADD(event, phy_transmit_error);
DEBUGFS_FWSTATS_ADD(event, tx_stuck);
DEBUGFS_FWSTATS_ADD(ps, pspoll_timeouts);
DEBUGFS_FWSTATS_ADD(ps, upsd_timeouts);
DEBUGFS_FWSTATS_ADD(ps, upsd_max_sptime);
DEBUGFS_FWSTATS_ADD(ps, upsd_max_apturn);
DEBUGFS_FWSTATS_ADD(ps, pspoll_max_apturn);
DEBUGFS_FWSTATS_ADD(ps, pspoll_utilization);
DEBUGFS_FWSTATS_ADD(ps, upsd_utilization);
DEBUGFS_FWSTATS_ADD(rxpipe, rx_prep_beacon_drop);
DEBUGFS_FWSTATS_ADD(rxpipe, descr_host_int_trig_rx_data);
DEBUGFS_FWSTATS_ADD(rxpipe, beacon_buffer_thres_host_int_trig_rx_data);
DEBUGFS_FWSTATS_ADD(rxpipe, missed_beacon_host_int_trig_rx_data);
DEBUGFS_FWSTATS_ADD(rxpipe, tx_xfr_host_int_trig_rx_data);
return 0;
err:
if (IS_ERR(entry))
ret = PTR_ERR(entry);
else
ret = -ENOMEM;
return ret;
}
drivers/net/wireless/ti/wl12xx/debugfs.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl12xx
*
* Copyright (C) 2012 Texas Instruments. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL12XX_DEBUGFS_H__
#define __WL12XX_DEBUGFS_H__
int wl12xx_debugfs_add_files(struct wl1271 *wl,
struct dentry *rootdir);
#endif /* __WL12XX_DEBUGFS_H__ */
drivers/net/wireless/ti/wl12xx/main.c
浏览文件 @ bf34e683
......@@ -39,6 +39,10 @@
#include "reg.h"
#include "cmd.h"
#include "acx.h"
#include "debugfs.h"
static char *fref_param;
static char *tcxo_param;
static struct wlcore_conf wl12xx_conf = {
.sg = {
......@@ -212,7 +216,7 @@ static struct wlcore_conf wl12xx_conf = {
.suspend_wake_up_event = CONF_WAKE_UP_EVENT_N_DTIM,
.suspend_listen_interval = 3,
.bcn_filt_mode = CONF_BCN_FILT_MODE_ENABLED,
.bcn_filt_ie_count = 2,
.bcn_filt_ie_count = 3,
.bcn_filt_ie = {
[0] = {
.ie = WLAN_EID_CHANNEL_SWITCH,
......@@ -222,9 +226,13 @@ static struct wlcore_conf wl12xx_conf = {
.ie = WLAN_EID_HT_OPERATION,
.rule = CONF_BCN_RULE_PASS_ON_CHANGE,
},
[2] = {
.ie = WLAN_EID_ERP_INFO,
.rule = CONF_BCN_RULE_PASS_ON_CHANGE,
},
},
.synch_fail_thold = 10,
.bss_lose_timeout = 100,
.synch_fail_thold = 12,
.bss_lose_timeout = 400,
.beacon_rx_timeout = 10000,
.broadcast_timeout = 20000,
.rx_broadcast_in_ps = 1,
......@@ -234,7 +242,7 @@ static struct wlcore_conf wl12xx_conf = {
.psm_entry_retries = 8,
.psm_exit_retries = 16,
.psm_entry_nullfunc_retries = 3,
.dynamic_ps_timeout = 40,
.dynamic_ps_timeout = 200,
.forced_ps = false,
.keep_alive_interval = 55000,
.max_listen_interval = 20,
......@@ -245,7 +253,7 @@ static struct wlcore_conf wl12xx_conf = {
},
.pm_config = {
.host_clk_settling_time = 5000,
.host_fast_wakeup_support = false
.host_fast_wakeup_support = CONF_FAST_WAKEUP_DISABLE,
},
.roam_trigger = {
.trigger_pacing = 1,
......@@ -305,8 +313,8 @@ static struct wlcore_conf wl12xx_conf = {
.swallow_period = 5,
.n_divider_fref_set_1 = 0xff, /* default */
.n_divider_fref_set_2 = 12,
.m_divider_fref_set_1 = 148,
.m_divider_fref_set_2 = 0xffff, /* default */
.m_divider_fref_set_1 = 0xffff,
.m_divider_fref_set_2 = 148, /* default */
.coex_pll_stabilization_time = 0xffffffff, /* default */
.ldo_stabilization_time = 0xffff, /* default */
.fm_disturbed_band_margin = 0xff, /* default */
......@@ -593,7 +601,7 @@ static void wl127x_prepare_read(struct wl1271 *wl, u32 rx_desc, u32 len)
{
if (wl->chip.id != CHIP_ID_1283_PG20) {
struct wl1271_acx_mem_map *wl_mem_map = wl->target_mem_map;
struct wl1271_rx_mem_pool_addr rx_mem_addr;
struct wl127x_rx_mem_pool_addr rx_mem_addr;
/*
* Choose the block we want to read
......@@ -621,10 +629,8 @@ static int wl12xx_identify_chip(struct wl1271 *wl)
wl1271_warning("chip id 0x%x (1271 PG10) support is obsolete",
wl->chip.id);
/* clear the alignment quirk, since we don't support it */
wl->quirks &= ~WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN;
wl->quirks |= WLCORE_QUIRK_LEGACY_NVS;
wl->quirks |= WLCORE_QUIRK_LEGACY_NVS |
WLCORE_QUIRK_TKIP_HEADER_SPACE;
wl->sr_fw_name = WL127X_FW_NAME_SINGLE;
wl->mr_fw_name = WL127X_FW_NAME_MULTI;
memcpy(&wl->conf.mem, &wl12xx_default_priv_conf.mem_wl127x,
......@@ -639,10 +645,8 @@ static int wl12xx_identify_chip(struct wl1271 *wl)
wl1271_debug(DEBUG_BOOT, "chip id 0x%x (1271 PG20)",
wl->chip.id);
/* clear the alignment quirk, since we don't support it */
wl->quirks &= ~WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN;
wl->quirks |= WLCORE_QUIRK_LEGACY_NVS;
wl->quirks |= WLCORE_QUIRK_LEGACY_NVS |
WLCORE_QUIRK_TKIP_HEADER_SPACE;
wl->plt_fw_name = WL127X_PLT_FW_NAME;
wl->sr_fw_name = WL127X_FW_NAME_SINGLE;
wl->mr_fw_name = WL127X_FW_NAME_MULTI;
......@@ -660,6 +664,11 @@ static int wl12xx_identify_chip(struct wl1271 *wl)
wl->plt_fw_name = WL128X_PLT_FW_NAME;
wl->sr_fw_name = WL128X_FW_NAME_SINGLE;
wl->mr_fw_name = WL128X_FW_NAME_MULTI;
/* wl128x requires TX blocksize alignment */
wl->quirks |= WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN |
WLCORE_QUIRK_TKIP_HEADER_SPACE;
break;
case CHIP_ID_1283_PG10:
default:
......@@ -773,6 +782,7 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
u16 spare_reg;
u16 pll_config;
u8 input_freq;
struct wl12xx_priv *priv = wl->priv;
/* Mask bits [3:1] in the sys_clk_cfg register */
spare_reg = wl12xx_top_reg_read(wl, WL_SPARE_REG);
......@@ -782,8 +792,8 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
wl12xx_top_reg_write(wl, WL_SPARE_REG, spare_reg);
/* Handle special cases of the TCXO clock */
if (wl->tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||
wl->tcxo_clock == WL12XX_TCXOCLOCK_33_6)
if (priv->tcxo_clock == WL12XX_TCXOCLOCK_16_8 ||
priv->tcxo_clock == WL12XX_TCXOCLOCK_33_6)
return wl128x_manually_configure_mcs_pll(wl);
/* Set the input frequency according to the selected clock source */
......@@ -808,11 +818,12 @@ static int wl128x_configure_mcs_pll(struct wl1271 *wl, int clk)
*/
static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
{
struct wl12xx_priv *priv = wl->priv;
u16 sys_clk_cfg;
/* For XTAL-only modes, FREF will be used after switching from TCXO */
if (wl->ref_clock == WL12XX_REFCLOCK_26_XTAL ||
wl->ref_clock == WL12XX_REFCLOCK_38_XTAL) {
if (priv->ref_clock == WL12XX_REFCLOCK_26_XTAL ||
priv->ref_clock == WL12XX_REFCLOCK_38_XTAL) {
if (!wl128x_switch_tcxo_to_fref(wl))
return -EINVAL;
goto fref_clk;
......@@ -826,8 +837,8 @@ static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
goto fref_clk;
/* If TCXO is either 32.736MHz or 16.368MHz, switch to FREF */
if (wl->tcxo_clock == WL12XX_TCXOCLOCK_16_368 ||
wl->tcxo_clock == WL12XX_TCXOCLOCK_32_736) {
if (priv->tcxo_clock == WL12XX_TCXOCLOCK_16_368 ||
priv->tcxo_clock == WL12XX_TCXOCLOCK_32_736) {
if (!wl128x_switch_tcxo_to_fref(wl))
return -EINVAL;
goto fref_clk;
......@@ -836,14 +847,14 @@ static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
/* TCXO clock is selected */
if (!wl128x_is_tcxo_valid(wl))
return -EINVAL;
*selected_clock = wl->tcxo_clock;
*selected_clock = priv->tcxo_clock;
goto config_mcs_pll;
fref_clk:
/* FREF clock is selected */
if (!wl128x_is_fref_valid(wl))
return -EINVAL;
*selected_clock = wl->ref_clock;
*selected_clock = priv->ref_clock;
config_mcs_pll:
return wl128x_configure_mcs_pll(wl, *selected_clock);
......@@ -851,25 +862,27 @@ static int wl128x_boot_clk(struct wl1271 *wl, int *selected_clock)
static int wl127x_boot_clk(struct wl1271 *wl)
{
struct wl12xx_priv *priv = wl->priv;
u32 pause;
u32 clk;
if (WL127X_PG_GET_MAJOR(wl->hw_pg_ver) < 3)
wl->quirks |= WLCORE_QUIRK_END_OF_TRANSACTION;
if (wl->ref_clock == CONF_REF_CLK_19_2_E ||
wl->ref_clock == CONF_REF_CLK_38_4_E ||
wl->ref_clock == CONF_REF_CLK_38_4_M_XTAL)
if (priv->ref_clock == CONF_REF_CLK_19_2_E ||
priv->ref_clock == CONF_REF_CLK_38_4_E ||
priv->ref_clock == CONF_REF_CLK_38_4_M_XTAL)
/* ref clk: 19.2/38.4/38.4-XTAL */
clk = 0x3;
else if (wl->ref_clock == CONF_REF_CLK_26_E ||
wl->ref_clock == CONF_REF_CLK_52_E)
else if (priv->ref_clock == CONF_REF_CLK_26_E ||
priv->ref_clock == CONF_REF_CLK_26_M_XTAL ||
priv->ref_clock == CONF_REF_CLK_52_E)
/* ref clk: 26/52 */
clk = 0x5;
else
return -EINVAL;
if (wl->ref_clock != CONF_REF_CLK_19_2_E) {
if (priv->ref_clock != CONF_REF_CLK_19_2_E) {
u16 val;
/* Set clock type (open drain) */
val = wl12xx_top_reg_read(wl, OCP_REG_CLK_TYPE);
......@@ -939,6 +952,7 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
static int wl12xx_pre_boot(struct wl1271 *wl)
{
struct wl12xx_priv *priv = wl->priv;
int ret = 0;
u32 clk;
int selected_clock = -1;
......@@ -970,7 +984,7 @@ static int wl12xx_pre_boot(struct wl1271 *wl)
if (wl->chip.id == CHIP_ID_1283_PG20)
clk |= ((selected_clock & 0x3) << 1) << 4;
else
clk |= (wl->ref_clock << 1) << 4;
clk |= (priv->ref_clock << 1) << 4;
wl1271_write32(wl, WL12XX_DRPW_SCRATCH_START, clk);
......@@ -989,7 +1003,7 @@ static int wl12xx_pre_boot(struct wl1271 *wl)
static void wl12xx_pre_upload(struct wl1271 *wl)
{
u32 tmp;
u32 tmp, polarity;
/* write firmware's last address (ie. it's length) to
* ACX_EEPROMLESS_IND_REG */
......@@ -1009,23 +1023,23 @@ static void wl12xx_pre_upload(struct wl1271 *wl)
if (wl->chip.id == CHIP_ID_1283_PG20)
wl12xx_top_reg_write(wl, SDIO_IO_DS, HCI_IO_DS_6MA);
}
static void wl12xx_enable_interrupts(struct wl1271 *wl)
{
u32 polarity;
/* polarity must be set before the firmware is loaded */
polarity = wl12xx_top_reg_read(wl, OCP_REG_POLARITY);
/* We use HIGH polarity, so unset the LOW bit */
polarity &= ~POLARITY_LOW;
wl12xx_top_reg_write(wl, OCP_REG_POLARITY, polarity);
wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL1271_ACX_ALL_EVENTS_VECTOR);
}
static void wl12xx_enable_interrupts(struct wl1271 *wl)
{
wlcore_write_reg(wl, REG_INTERRUPT_MASK, WL12XX_ACX_ALL_EVENTS_VECTOR);
wlcore_enable_interrupts(wl);
wlcore_write_reg(wl, REG_INTERRUPT_MASK,
WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK));
WL1271_ACX_INTR_ALL & ~(WL12XX_INTR_MASK));
wl1271_write32(wl, WL12XX_HI_CFG, HI_CFG_DEF_VAL);
}
......@@ -1149,7 +1163,8 @@ static u32 wl12xx_get_rx_packet_len(struct wl1271 *wl, void *rx_data,
static void wl12xx_tx_delayed_compl(struct wl1271 *wl)
{
if (wl->fw_status->tx_results_counter == (wl->tx_results_count & 0xff))
if (wl->fw_status_1->tx_results_counter ==
(wl->tx_results_count & 0xff))
return;
wl1271_tx_complete(wl);
......@@ -1288,10 +1303,90 @@ static void wl12xx_get_mac(struct wl1271 *wl)
wl12xx_get_fuse_mac(wl);
}
static void wl12xx_set_tx_desc_csum(struct wl1271 *wl,
struct wl1271_tx_hw_descr *desc,
struct sk_buff *skb)
{
desc->wl12xx_reserved = 0;
}
static int wl12xx_plt_init(struct wl1271 *wl)
{
int ret;
ret = wl->ops->boot(wl);
if (ret < 0)
goto out;
ret = wl->ops->hw_init(wl);
if (ret < 0)
goto out_irq_disable;
ret = wl1271_acx_init_mem_config(wl);
if (ret < 0)
goto out_irq_disable;
ret = wl12xx_acx_mem_cfg(wl);
if (ret < 0)
goto out_free_memmap;
/* Enable data path */
ret = wl1271_cmd_data_path(wl, 1);
if (ret < 0)
goto out_free_memmap;
/* Configure for CAM power saving (ie. always active) */
ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_CAM);
if (ret < 0)
goto out_free_memmap;
/* configure PM */
ret = wl1271_acx_pm_config(wl);
if (ret < 0)
goto out_free_memmap;
goto out;
out_free_memmap:
kfree(wl->target_mem_map);
wl->target_mem_map = NULL;
out_irq_disable:
mutex_unlock(&wl->mutex);
/* Unlocking the mutex in the middle of handling is
inherently unsafe. In this case we deem it safe to do,
because we need to let any possibly pending IRQ out of
the system (and while we are WL1271_STATE_OFF the IRQ
work function will not do anything.) Also, any other
possible concurrent operations will fail due to the
current state, hence the wl1271 struct should be safe. */
wlcore_disable_interrupts(wl);
mutex_lock(&wl->mutex);
out:
return ret;
}
static int wl12xx_get_spare_blocks(struct wl1271 *wl, bool is_gem)
{
if (is_gem)
return WL12XX_TX_HW_BLOCK_GEM_SPARE;
return WL12XX_TX_HW_BLOCK_SPARE_DEFAULT;
}
static int wl12xx_set_key(struct wl1271 *wl, enum set_key_cmd cmd,
struct ieee80211_vif *vif,
struct ieee80211_sta *sta,
struct ieee80211_key_conf *key_conf)
{
return wlcore_set_key(wl, cmd, vif, sta, key_conf);
}
static struct wlcore_ops wl12xx_ops = {
.identify_chip = wl12xx_identify_chip,
.identify_fw = wl12xx_identify_fw,
.boot = wl12xx_boot,
.plt_init = wl12xx_plt_init,
.trigger_cmd = wl12xx_trigger_cmd,
.ack_event = wl12xx_ack_event,
.calc_tx_blocks = wl12xx_calc_tx_blocks,
......@@ -1306,6 +1401,13 @@ static struct wlcore_ops wl12xx_ops = {
.sta_get_ap_rate_mask = wl12xx_sta_get_ap_rate_mask,
.get_pg_ver = wl12xx_get_pg_ver,
.get_mac = wl12xx_get_mac,
.set_tx_desc_csum = wl12xx_set_tx_desc_csum,
.set_rx_csum = NULL,
.ap_get_mimo_wide_rate_mask = NULL,
.debugfs_init = wl12xx_debugfs_add_files,
.get_spare_blocks = wl12xx_get_spare_blocks,
.set_key = wl12xx_set_key,
.pre_pkt_send = NULL,
};
static struct ieee80211_sta_ht_cap wl12xx_ht_cap = {
......@@ -1323,6 +1425,7 @@ static struct ieee80211_sta_ht_cap wl12xx_ht_cap = {
static int __devinit wl12xx_probe(struct platform_device *pdev)
{
struct wl12xx_platform_data *pdata = pdev->dev.platform_data;
struct wl1271 *wl;
struct ieee80211_hw *hw;
struct wl12xx_priv *priv;
......@@ -1334,19 +1437,65 @@ static int __devinit wl12xx_probe(struct platform_device *pdev)
}
wl = hw->priv;
priv = wl->priv;
wl->ops = &wl12xx_ops;
wl->ptable = wl12xx_ptable;
wl->rtable = wl12xx_rtable;
wl->num_tx_desc = 16;
wl->normal_tx_spare = WL12XX_TX_HW_BLOCK_SPARE_DEFAULT;
wl->gem_tx_spare = WL12XX_TX_HW_BLOCK_GEM_SPARE;
wl->num_rx_desc = 8;
wl->band_rate_to_idx = wl12xx_band_rate_to_idx;
wl->hw_tx_rate_tbl_size = WL12XX_CONF_HW_RXTX_RATE_MAX;
wl->hw_min_ht_rate = WL12XX_CONF_HW_RXTX_RATE_MCS0;
wl->fw_status_priv_len = 0;
memcpy(&wl->ht_cap, &wl12xx_ht_cap, sizeof(wl12xx_ht_cap));
wl->stats.fw_stats_len = sizeof(struct wl12xx_acx_statistics);
memcpy(&wl->ht_cap[IEEE80211_BAND_2GHZ], &wl12xx_ht_cap,
sizeof(wl12xx_ht_cap));
memcpy(&wl->ht_cap[IEEE80211_BAND_5GHZ], &wl12xx_ht_cap,
sizeof(wl12xx_ht_cap));
wl12xx_conf_init(wl);
if (!fref_param) {
priv->ref_clock = pdata->board_ref_clock;
} else {
if (!strcmp(fref_param, "19.2"))
priv->ref_clock = WL12XX_REFCLOCK_19;
else if (!strcmp(fref_param, "26"))
priv->ref_clock = WL12XX_REFCLOCK_26;
else if (!strcmp(fref_param, "26x"))
priv->ref_clock = WL12XX_REFCLOCK_26_XTAL;
else if (!strcmp(fref_param, "38.4"))
priv->ref_clock = WL12XX_REFCLOCK_38;
else if (!strcmp(fref_param, "38.4x"))
priv->ref_clock = WL12XX_REFCLOCK_38_XTAL;
else if (!strcmp(fref_param, "52"))
priv->ref_clock = WL12XX_REFCLOCK_52;
else
wl1271_error("Invalid fref parameter %s", fref_param);
}
if (!tcxo_param) {
priv->tcxo_clock = pdata->board_tcxo_clock;
} else {
if (!strcmp(tcxo_param, "19.2"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_19_2;
else if (!strcmp(tcxo_param, "26"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_26;
else if (!strcmp(tcxo_param, "38.4"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_38_4;
else if (!strcmp(tcxo_param, "52"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_52;
else if (!strcmp(tcxo_param, "16.368"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_16_368;
else if (!strcmp(tcxo_param, "32.736"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_32_736;
else if (!strcmp(tcxo_param, "16.8"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_16_8;
else if (!strcmp(tcxo_param, "33.6"))
priv->tcxo_clock = WL12XX_TCXOCLOCK_33_6;
else
wl1271_error("Invalid tcxo parameter %s", tcxo_param);
}
return wlcore_probe(wl, pdev);
}
......@@ -1378,6 +1527,13 @@ static void __exit wl12xx_exit(void)
}
module_exit(wl12xx_exit);
module_param_named(fref, fref_param, charp, 0);
MODULE_PARM_DESC(fref, "FREF clock: 19.2, 26, 26x, 38.4, 38.4x, 52");
module_param_named(tcxo, tcxo_param, charp, 0);
MODULE_PARM_DESC(tcxo,
"TCXO clock: 19.2, 26, 38.4, 52, 16.368, 32.736, 16.8, 33.6");
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
MODULE_FIRMWARE(WL127X_FW_NAME_SINGLE);
......
drivers/net/wireless/ti/wl12xx/wl12xx.h
浏览文件 @ bf34e683
......@@ -24,8 +24,16 @@
#include "conf.h"
struct wl127x_rx_mem_pool_addr {
u32 addr;
u32 addr_extra;
};
struct wl12xx_priv {
struct wl12xx_priv_conf conf;
int ref_clock;
int tcxo_clock;
};
#endif /* __WL12XX_PRIV_H__ */
drivers/net/wireless/ti/wl18xx/Kconfig 0 → 100644
浏览文件 @ bf34e683
config WL18XX
tristate "TI wl18xx support"
depends on MAC80211
select WLCORE
---help---
This module adds support for wireless adapters based on TI
WiLink 8 chipsets.
drivers/net/wireless/ti/wl18xx/Makefile 0 → 100644
浏览文件 @ bf34e683
wl18xx-objs = main.o acx.o tx.o io.o debugfs.o
obj-$(CONFIG_WL18XX) += wl18xx.o
drivers/net/wireless/ti/wl18xx/acx.c 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include "../wlcore/cmd.h"
#include "../wlcore/debug.h"
#include "../wlcore/acx.h"
#include "acx.h"
int wl18xx_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap,
u32 sdio_blk_size, u32 extra_mem_blks,
u32 len_field_size)
{
struct wl18xx_acx_host_config_bitmap *bitmap_conf;
int ret;
wl1271_debug(DEBUG_ACX, "acx cfg bitmap %d blk %d spare %d field %d",
host_cfg_bitmap, sdio_blk_size, extra_mem_blks,
len_field_size);
bitmap_conf = kzalloc(sizeof(*bitmap_conf), GFP_KERNEL);
if (!bitmap_conf) {
ret = -ENOMEM;
goto out;
}
bitmap_conf->host_cfg_bitmap = cpu_to_le32(host_cfg_bitmap);
bitmap_conf->host_sdio_block_size = cpu_to_le32(sdio_blk_size);
bitmap_conf->extra_mem_blocks = cpu_to_le32(extra_mem_blks);
bitmap_conf->length_field_size = cpu_to_le32(len_field_size);
ret = wl1271_cmd_configure(wl, ACX_HOST_IF_CFG_BITMAP,
bitmap_conf, sizeof(*bitmap_conf));
if (ret < 0) {
wl1271_warning("wl1271 bitmap config opt failed: %d", ret);
goto out;
}
out:
kfree(bitmap_conf);
return ret;
}
int wl18xx_acx_set_checksum_state(struct wl1271 *wl)
{
struct wl18xx_acx_checksum_state *acx;
int ret;
wl1271_debug(DEBUG_ACX, "acx checksum state");
acx = kzalloc(sizeof(*acx), GFP_KERNEL);
if (!acx) {
ret = -ENOMEM;
goto out;
}
acx->checksum_state = CHECKSUM_OFFLOAD_ENABLED;
ret = wl1271_cmd_configure(wl, ACX_CHECKSUM_CONFIG, acx, sizeof(*acx));
if (ret < 0) {
wl1271_warning("failed to set Tx checksum state: %d", ret);
goto out;
}
out:
kfree(acx);
return ret;
}
int wl18xx_acx_clear_statistics(struct wl1271 *wl)
{
struct wl18xx_acx_clear_statistics *acx;
int ret = 0;
wl1271_debug(DEBUG_ACX, "acx clear statistics");
acx = kzalloc(sizeof(*acx), GFP_KERNEL);
if (!acx) {
ret = -ENOMEM;
goto out;
}
ret = wl1271_cmd_configure(wl, ACX_CLEAR_STATISTICS, acx, sizeof(*acx));
if (ret < 0) {
wl1271_warning("failed to clear firmware statistics: %d", ret);
goto out;
}
out:
kfree(acx);
return ret;
}
drivers/net/wireless/ti/wl18xx/acx.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL18XX_ACX_H__
#define __WL18XX_ACX_H__
#include "../wlcore/wlcore.h"
#include "../wlcore/acx.h"
enum {
ACX_CLEAR_STATISTICS = 0x0047,
};
/* numbers of bits the length field takes (add 1 for the actual number) */
#define WL18XX_HOST_IF_LEN_SIZE_FIELD 15
#define WL18XX_ACX_EVENTS_VECTOR_PG1 (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_INIT_COMPLETE | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_CMD_COMPLETE | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA)
#define WL18XX_ACX_EVENTS_VECTOR_PG2 (WL18XX_ACX_EVENTS_VECTOR_PG1 | \
WL1271_ACX_SW_INTR_WATCHDOG)
#define WL18XX_INTR_MASK_PG1 (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA)
#define WL18XX_INTR_MASK_PG2 (WL18XX_INTR_MASK_PG1 | \
WL1271_ACX_SW_INTR_WATCHDOG)
struct wl18xx_acx_host_config_bitmap {
struct acx_header header;
__le32 host_cfg_bitmap;
__le32 host_sdio_block_size;
/* extra mem blocks per frame in TX. */
__le32 extra_mem_blocks;
/*
* number of bits of the length field in the first TX word
* (up to 15 - for using the entire 16 bits).
*/
__le32 length_field_size;
} __packed;
enum {
CHECKSUM_OFFLOAD_DISABLED = 0,
CHECKSUM_OFFLOAD_ENABLED = 1,
CHECKSUM_OFFLOAD_FAKE_RX = 2,
CHECKSUM_OFFLOAD_INVALID = 0xFF
};
struct wl18xx_acx_checksum_state {
struct acx_header header;
/* enum acx_checksum_state */
u8 checksum_state;
u8 pad[3];
} __packed;
struct wl18xx_acx_error_stats {
u32 error_frame;
u32 error_null_Frame_tx_start;
u32 error_numll_frame_cts_start;
u32 error_bar_retry;
u32 error_frame_cts_nul_flid;
} __packed;
struct wl18xx_acx_debug_stats {
u32 debug1;
u32 debug2;
u32 debug3;
u32 debug4;
u32 debug5;
u32 debug6;
} __packed;
struct wl18xx_acx_ring_stats {
u32 prepared_descs;
u32 tx_cmplt;
} __packed;
struct wl18xx_acx_tx_stats {
u32 tx_prepared_descs;
u32 tx_cmplt;
u32 tx_template_prepared;
u32 tx_data_prepared;
u32 tx_template_programmed;
u32 tx_data_programmed;
u32 tx_burst_programmed;
u32 tx_starts;
u32 tx_imm_resp;
u32 tx_start_templates;
u32 tx_start_int_templates;
u32 tx_start_fw_gen;
u32 tx_start_data;
u32 tx_start_null_frame;
u32 tx_exch;
u32 tx_retry_template;
u32 tx_retry_data;
u32 tx_exch_pending;
u32 tx_exch_expiry;
u32 tx_done_template;
u32 tx_done_data;
u32 tx_done_int_template;
u32 tx_frame_checksum;
u32 tx_checksum_result;
u32 frag_called;
u32 frag_mpdu_alloc_failed;
u32 frag_init_called;
u32 frag_in_process_called;
u32 frag_tkip_called;
u32 frag_key_not_found;
u32 frag_need_fragmentation;
u32 frag_bad_mblk_num;
u32 frag_failed;
u32 frag_cache_hit;
u32 frag_cache_miss;
} __packed;
struct wl18xx_acx_rx_stats {
u32 rx_beacon_early_term;
u32 rx_out_of_mpdu_nodes;
u32 rx_hdr_overflow;
u32 rx_dropped_frame;
u32 rx_done_stage;
u32 rx_done;
u32 rx_defrag;
u32 rx_defrag_end;
u32 rx_cmplt;
u32 rx_pre_complt;
u32 rx_cmplt_task;
u32 rx_phy_hdr;
u32 rx_timeout;
u32 rx_timeout_wa;
u32 rx_wa_density_dropped_frame;
u32 rx_wa_ba_not_expected;
u32 rx_frame_checksum;
u32 rx_checksum_result;
u32 defrag_called;
u32 defrag_init_called;
u32 defrag_in_process_called;
u32 defrag_tkip_called;
u32 defrag_need_defrag;
u32 defrag_decrypt_failed;
u32 decrypt_key_not_found;
u32 defrag_need_decrypt;
u32 rx_tkip_replays;
} __packed;
struct wl18xx_acx_isr_stats {
u32 irqs;
} __packed;
#define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10
struct wl18xx_acx_pwr_stats {
u32 missing_bcns_cnt;
u32 rcvd_bcns_cnt;
u32 connection_out_of_sync;
u32 cont_miss_bcns_spread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD];
u32 rcvd_awake_bcns_cnt;
} __packed;
struct wl18xx_acx_event_stats {
u32 calibration;
u32 rx_mismatch;
u32 rx_mem_empty;
} __packed;
struct wl18xx_acx_ps_poll_stats {
u32 ps_poll_timeouts;
u32 upsd_timeouts;
u32 upsd_max_ap_turn;
u32 ps_poll_max_ap_turn;
u32 ps_poll_utilization;
u32 upsd_utilization;
} __packed;
struct wl18xx_acx_rx_filter_stats {
u32 beacon_filter;
u32 arp_filter;
u32 mc_filter;
u32 dup_filter;
u32 data_filter;
u32 ibss_filter;
u32 protection_filter;
u32 accum_arp_pend_requests;
u32 max_arp_queue_dep;
} __packed;
struct wl18xx_acx_rx_rate_stats {
u32 rx_frames_per_rates[50];
} __packed;
#define AGGR_STATS_TX_AGG 16
#define AGGR_STATS_TX_RATE 16
#define AGGR_STATS_RX_SIZE_LEN 16
struct wl18xx_acx_aggr_stats {
u32 tx_agg_vs_rate[AGGR_STATS_TX_AGG * AGGR_STATS_TX_RATE];
u32 rx_size[AGGR_STATS_RX_SIZE_LEN];
} __packed;
#define PIPE_STATS_HW_FIFO 11
struct wl18xx_acx_pipeline_stats {
u32 hs_tx_stat_fifo_int;
u32 hs_rx_stat_fifo_int;
u32 tcp_tx_stat_fifo_int;
u32 tcp_rx_stat_fifo_int;
u32 enc_tx_stat_fifo_int;
u32 enc_rx_stat_fifo_int;
u32 rx_complete_stat_fifo_int;
u32 pre_proc_swi;
u32 post_proc_swi;
u32 sec_frag_swi;
u32 pre_to_defrag_swi;
u32 defrag_to_csum_swi;
u32 csum_to_rx_xfer_swi;
u32 dec_packet_in;
u32 dec_packet_in_fifo_full;
u32 dec_packet_out;
u32 cs_rx_packet_in;
u32 cs_rx_packet_out;
u16 pipeline_fifo_full[PIPE_STATS_HW_FIFO];
} __packed;
struct wl18xx_acx_mem_stats {
u32 rx_free_mem_blks;
u32 tx_free_mem_blks;
u32 fwlog_free_mem_blks;
u32 fw_gen_free_mem_blks;
} __packed;
struct wl18xx_acx_statistics {
struct acx_header header;
struct wl18xx_acx_error_stats error;
struct wl18xx_acx_debug_stats debug;
struct wl18xx_acx_tx_stats tx;
struct wl18xx_acx_rx_stats rx;
struct wl18xx_acx_isr_stats isr;
struct wl18xx_acx_pwr_stats pwr;
struct wl18xx_acx_ps_poll_stats ps_poll;
struct wl18xx_acx_rx_filter_stats rx_filter;
struct wl18xx_acx_rx_rate_stats rx_rate;
struct wl18xx_acx_aggr_stats aggr_size;
struct wl18xx_acx_pipeline_stats pipeline;
struct wl18xx_acx_mem_stats mem;
} __packed;
struct wl18xx_acx_clear_statistics {
struct acx_header header;
};
int wl18xx_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap,
u32 sdio_blk_size, u32 extra_mem_blks,
u32 len_field_size);
int wl18xx_acx_set_checksum_state(struct wl1271 *wl);
int wl18xx_acx_clear_statistics(struct wl1271 *wl);
#endif /* __WL18XX_ACX_H__ */
drivers/net/wireless/ti/wl18xx/conf.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL18XX_CONF_H__
#define __WL18XX_CONF_H__
#define WL18XX_CONF_MAGIC 0x10e100ca
#define WL18XX_CONF_VERSION (WLCORE_CONF_VERSION | 0x0002)
#define WL18XX_CONF_MASK 0x0000ffff
#define WL18XX_CONF_SIZE (WLCORE_CONF_SIZE + \
sizeof(struct wl18xx_priv_conf))
#define NUM_OF_CHANNELS_11_ABG 150
#define NUM_OF_CHANNELS_11_P 7
#define WL18XX_NUM_OF_SUB_BANDS 9
#define SRF_TABLE_LEN 16
#define PIN_MUXING_SIZE 2
struct wl18xx_mac_and_phy_params {
u8 phy_standalone;
u8 rdl;
u8 enable_clpc;
u8 enable_tx_low_pwr_on_siso_rdl;
u8 auto_detect;
u8 dedicated_fem;
u8 low_band_component;
/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
u8 low_band_component_type;
u8 high_band_component;
/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
u8 high_band_component_type;
u8 number_of_assembled_ant2_4;
u8 number_of_assembled_ant5;
u8 pin_muxing_platform_options[PIN_MUXING_SIZE];
u8 external_pa_dc2dc;
u8 tcxo_ldo_voltage;
u8 xtal_itrim_val;
u8 srf_state;
u8 srf1[SRF_TABLE_LEN];
u8 srf2[SRF_TABLE_LEN];
u8 srf3[SRF_TABLE_LEN];
u8 io_configuration;
u8 sdio_configuration;
u8 settings;
u8 rx_profile;
u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG];
u8 pwr_limit_reference_11_abg;
u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P];
u8 pwr_limit_reference_11p;
u8 per_sub_band_tx_trace_loss[WL18XX_NUM_OF_SUB_BANDS];
u8 per_sub_band_rx_trace_loss[WL18XX_NUM_OF_SUB_BANDS];
u8 primary_clock_setting_time;
u8 clock_valid_on_wake_up;
u8 secondary_clock_setting_time;
u8 board_type;
/* enable point saturation */
u8 psat;
/* low/medium/high Tx power in dBm */
s8 low_power_val;
s8 med_power_val;
s8 high_power_val;
u8 padding[1];
} __packed;
struct wl18xx_priv_conf {
/* this structure is copied wholesale to FW */
struct wl18xx_mac_and_phy_params phy;
} __packed;
#endif /* __WL18XX_CONF_H__ */
drivers/net/wireless/ti/wl18xx/debugfs.c 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2009 Nokia Corporation
* Copyright (C) 2011-2012 Texas Instruments
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include "../wlcore/debugfs.h"
#include "../wlcore/wlcore.h"
#include "wl18xx.h"
#include "acx.h"
#include "debugfs.h"
#define WL18XX_DEBUGFS_FWSTATS_FILE(a, b, c) \
DEBUGFS_FWSTATS_FILE(a, b, c, wl18xx_acx_statistics)
#define WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(a, b, c) \
DEBUGFS_FWSTATS_FILE_ARRAY(a, b, c, wl18xx_acx_statistics)
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug1, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug2, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug3, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug4, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug5, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug6, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(error, error_frame, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(error, error_null_Frame_tx_start, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(error, error_numll_frame_cts_start, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(error, error_bar_retry, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(error, error_frame_cts_nul_flid, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_prepared_descs, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_cmplt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_template_prepared, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_data_prepared, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_template_programmed, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_data_programmed, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_burst_programmed, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_starts, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_imm_resp, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_templates, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_int_templates, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_fw_gen, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_data, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_null_frame, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_retry_template, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_retry_data, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch_pending, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch_expiry, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_done_template, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_done_data, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_done_int_template, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_frame_checksum, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_checksum_result, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_mpdu_alloc_failed, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_init_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_in_process_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_tkip_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_key_not_found, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_need_fragmentation, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_bad_mblk_num, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_failed, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_cache_hit, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(tx, frag_cache_miss, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_beacon_early_term, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_out_of_mpdu_nodes, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_hdr_overflow, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_dropped_frame, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_done, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_defrag, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_defrag_end, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_cmplt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_pre_complt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_cmplt_task, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_phy_hdr, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_timeout, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_timeout_wa, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_wa_density_dropped_frame, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_wa_ba_not_expected, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_frame_checksum, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_checksum_result, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_init_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_in_process_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_tkip_called, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_need_defrag, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_decrypt_failed, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, decrypt_key_not_found, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, defrag_need_decrypt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_tkip_replays, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(isr, irqs, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, missing_bcns_cnt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, rcvd_bcns_cnt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, connection_out_of_sync, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(pwr, cont_miss_bcns_spread,
PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD);
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, rcvd_awake_bcns_cnt, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, ps_poll_timeouts, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, upsd_timeouts, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, upsd_max_ap_turn, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, ps_poll_max_ap_turn, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, ps_poll_utilization, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, upsd_utilization, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, beacon_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, arp_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, mc_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, dup_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, data_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, ibss_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, protection_filter, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, accum_arp_pend_requests, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, max_arp_queue_dep, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(rx_rate, rx_frames_per_rates, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(aggr_size, tx_agg_vs_rate,
AGGR_STATS_TX_AGG*AGGR_STATS_TX_RATE);
WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(aggr_size, rx_size,
AGGR_STATS_RX_SIZE_LEN);
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, hs_tx_stat_fifo_int, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, tcp_tx_stat_fifo_int, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, tcp_rx_stat_fifo_int, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_tx_stat_fifo_int, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_rx_stat_fifo_int, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, rx_complete_stat_fifo_int, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_proc_swi, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, post_proc_swi, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, sec_frag_swi, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_to_defrag_swi, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, defrag_to_csum_swi, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, csum_to_rx_xfer_swi, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, dec_packet_in, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, dec_packet_in_fifo_full, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, dec_packet_out, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, cs_rx_packet_in, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, cs_rx_packet_out, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(pipeline, pipeline_fifo_full,
PIPE_STATS_HW_FIFO);
WL18XX_DEBUGFS_FWSTATS_FILE(mem, rx_free_mem_blks, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(mem, tx_free_mem_blks, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(mem, fwlog_free_mem_blks, "%u");
WL18XX_DEBUGFS_FWSTATS_FILE(mem, fw_gen_free_mem_blks, "%u");
static ssize_t conf_read(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
struct wl1271 *wl = file->private_data;
struct wl18xx_priv *priv = wl->priv;
struct wlcore_conf_header header;
char *buf, *pos;
size_t len;
int ret;
len = WL18XX_CONF_SIZE;
buf = kmalloc(len, GFP_KERNEL);
if (!buf)
return -ENOMEM;
header.magic = cpu_to_le32(WL18XX_CONF_MAGIC);
header.version = cpu_to_le32(WL18XX_CONF_VERSION);
header.checksum = 0;
mutex_lock(&wl->mutex);
pos = buf;
memcpy(pos, &header, sizeof(header));
pos += sizeof(header);
memcpy(pos, &wl->conf, sizeof(wl->conf));
pos += sizeof(wl->conf);
memcpy(pos, &priv->conf, sizeof(priv->conf));
mutex_unlock(&wl->mutex);
ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
kfree(buf);
return ret;
}
static const struct file_operations conf_ops = {
.read = conf_read,
.open = simple_open,
.llseek = default_llseek,
};
static ssize_t clear_fw_stats_write(struct file *file,
const char __user *user_buf,
size_t count, loff_t *ppos)
{
struct wl1271 *wl = file->private_data;
int ret;
mutex_lock(&wl->mutex);
if (wl->state == WL1271_STATE_OFF)
goto out;
ret = wl18xx_acx_clear_statistics(wl);
if (ret < 0) {
count = ret;
goto out;
}
out:
mutex_unlock(&wl->mutex);
return count;
}
static const struct file_operations clear_fw_stats_ops = {
.write = clear_fw_stats_write,
.open = simple_open,
.llseek = default_llseek,
};
int wl18xx_debugfs_add_files(struct wl1271 *wl,
struct dentry *rootdir)
{
int ret = 0;
struct dentry *entry, *stats, *moddir;
moddir = debugfs_create_dir(KBUILD_MODNAME, rootdir);
if (!moddir || IS_ERR(moddir)) {
entry = moddir;
goto err;
}
stats = debugfs_create_dir("fw_stats", moddir);
if (!stats || IS_ERR(stats)) {
entry = stats;
goto err;
}
DEBUGFS_ADD(clear_fw_stats, stats);
DEBUGFS_FWSTATS_ADD(debug, debug1);
DEBUGFS_FWSTATS_ADD(debug, debug2);
DEBUGFS_FWSTATS_ADD(debug, debug3);
DEBUGFS_FWSTATS_ADD(debug, debug4);
DEBUGFS_FWSTATS_ADD(debug, debug5);
DEBUGFS_FWSTATS_ADD(debug, debug6);
DEBUGFS_FWSTATS_ADD(error, error_frame);
DEBUGFS_FWSTATS_ADD(error, error_null_Frame_tx_start);
DEBUGFS_FWSTATS_ADD(error, error_numll_frame_cts_start);
DEBUGFS_FWSTATS_ADD(error, error_bar_retry);
DEBUGFS_FWSTATS_ADD(error, error_frame_cts_nul_flid);
DEBUGFS_FWSTATS_ADD(tx, tx_prepared_descs);
DEBUGFS_FWSTATS_ADD(tx, tx_cmplt);
DEBUGFS_FWSTATS_ADD(tx, tx_template_prepared);
DEBUGFS_FWSTATS_ADD(tx, tx_data_prepared);
DEBUGFS_FWSTATS_ADD(tx, tx_template_programmed);
DEBUGFS_FWSTATS_ADD(tx, tx_data_programmed);
DEBUGFS_FWSTATS_ADD(tx, tx_burst_programmed);
DEBUGFS_FWSTATS_ADD(tx, tx_starts);
DEBUGFS_FWSTATS_ADD(tx, tx_imm_resp);
DEBUGFS_FWSTATS_ADD(tx, tx_start_templates);
DEBUGFS_FWSTATS_ADD(tx, tx_start_int_templates);
DEBUGFS_FWSTATS_ADD(tx, tx_start_fw_gen);
DEBUGFS_FWSTATS_ADD(tx, tx_start_data);
DEBUGFS_FWSTATS_ADD(tx, tx_start_null_frame);
DEBUGFS_FWSTATS_ADD(tx, tx_exch);
DEBUGFS_FWSTATS_ADD(tx, tx_retry_template);
DEBUGFS_FWSTATS_ADD(tx, tx_retry_data);
DEBUGFS_FWSTATS_ADD(tx, tx_exch_pending);
DEBUGFS_FWSTATS_ADD(tx, tx_exch_expiry);
DEBUGFS_FWSTATS_ADD(tx, tx_done_template);
DEBUGFS_FWSTATS_ADD(tx, tx_done_data);
DEBUGFS_FWSTATS_ADD(tx, tx_done_int_template);
DEBUGFS_FWSTATS_ADD(tx, tx_frame_checksum);
DEBUGFS_FWSTATS_ADD(tx, tx_checksum_result);
DEBUGFS_FWSTATS_ADD(tx, frag_called);
DEBUGFS_FWSTATS_ADD(tx, frag_mpdu_alloc_failed);
DEBUGFS_FWSTATS_ADD(tx, frag_init_called);
DEBUGFS_FWSTATS_ADD(tx, frag_in_process_called);
DEBUGFS_FWSTATS_ADD(tx, frag_tkip_called);
DEBUGFS_FWSTATS_ADD(tx, frag_key_not_found);
DEBUGFS_FWSTATS_ADD(tx, frag_need_fragmentation);
DEBUGFS_FWSTATS_ADD(tx, frag_bad_mblk_num);
DEBUGFS_FWSTATS_ADD(tx, frag_failed);
DEBUGFS_FWSTATS_ADD(tx, frag_cache_hit);
DEBUGFS_FWSTATS_ADD(tx, frag_cache_miss);
DEBUGFS_FWSTATS_ADD(rx, rx_beacon_early_term);
DEBUGFS_FWSTATS_ADD(rx, rx_out_of_mpdu_nodes);
DEBUGFS_FWSTATS_ADD(rx, rx_hdr_overflow);
DEBUGFS_FWSTATS_ADD(rx, rx_dropped_frame);
DEBUGFS_FWSTATS_ADD(rx, rx_done);
DEBUGFS_FWSTATS_ADD(rx, rx_defrag);
DEBUGFS_FWSTATS_ADD(rx, rx_defrag_end);
DEBUGFS_FWSTATS_ADD(rx, rx_cmplt);
DEBUGFS_FWSTATS_ADD(rx, rx_pre_complt);
DEBUGFS_FWSTATS_ADD(rx, rx_cmplt_task);
DEBUGFS_FWSTATS_ADD(rx, rx_phy_hdr);
DEBUGFS_FWSTATS_ADD(rx, rx_timeout);
DEBUGFS_FWSTATS_ADD(rx, rx_timeout_wa);
DEBUGFS_FWSTATS_ADD(rx, rx_wa_density_dropped_frame);
DEBUGFS_FWSTATS_ADD(rx, rx_wa_ba_not_expected);
DEBUGFS_FWSTATS_ADD(rx, rx_frame_checksum);
DEBUGFS_FWSTATS_ADD(rx, rx_checksum_result);
DEBUGFS_FWSTATS_ADD(rx, defrag_called);
DEBUGFS_FWSTATS_ADD(rx, defrag_init_called);
DEBUGFS_FWSTATS_ADD(rx, defrag_in_process_called);
DEBUGFS_FWSTATS_ADD(rx, defrag_tkip_called);
DEBUGFS_FWSTATS_ADD(rx, defrag_need_defrag);
DEBUGFS_FWSTATS_ADD(rx, defrag_decrypt_failed);
DEBUGFS_FWSTATS_ADD(rx, decrypt_key_not_found);
DEBUGFS_FWSTATS_ADD(rx, defrag_need_decrypt);
DEBUGFS_FWSTATS_ADD(rx, rx_tkip_replays);
DEBUGFS_FWSTATS_ADD(isr, irqs);
DEBUGFS_FWSTATS_ADD(pwr, missing_bcns_cnt);
DEBUGFS_FWSTATS_ADD(pwr, rcvd_bcns_cnt);
DEBUGFS_FWSTATS_ADD(pwr, connection_out_of_sync);
DEBUGFS_FWSTATS_ADD(pwr, cont_miss_bcns_spread);
DEBUGFS_FWSTATS_ADD(pwr, rcvd_awake_bcns_cnt);
DEBUGFS_FWSTATS_ADD(ps_poll, ps_poll_timeouts);
DEBUGFS_FWSTATS_ADD(ps_poll, upsd_timeouts);
DEBUGFS_FWSTATS_ADD(ps_poll, upsd_max_ap_turn);
DEBUGFS_FWSTATS_ADD(ps_poll, ps_poll_max_ap_turn);
DEBUGFS_FWSTATS_ADD(ps_poll, ps_poll_utilization);
DEBUGFS_FWSTATS_ADD(ps_poll, upsd_utilization);
DEBUGFS_FWSTATS_ADD(rx_filter, beacon_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, arp_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, mc_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, dup_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, data_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, ibss_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, protection_filter);
DEBUGFS_FWSTATS_ADD(rx_filter, accum_arp_pend_requests);
DEBUGFS_FWSTATS_ADD(rx_filter, max_arp_queue_dep);
DEBUGFS_FWSTATS_ADD(rx_rate, rx_frames_per_rates);
DEBUGFS_FWSTATS_ADD(aggr_size, tx_agg_vs_rate);
DEBUGFS_FWSTATS_ADD(aggr_size, rx_size);
DEBUGFS_FWSTATS_ADD(pipeline, hs_tx_stat_fifo_int);
DEBUGFS_FWSTATS_ADD(pipeline, tcp_tx_stat_fifo_int);
DEBUGFS_FWSTATS_ADD(pipeline, tcp_rx_stat_fifo_int);
DEBUGFS_FWSTATS_ADD(pipeline, enc_tx_stat_fifo_int);
DEBUGFS_FWSTATS_ADD(pipeline, enc_rx_stat_fifo_int);
DEBUGFS_FWSTATS_ADD(pipeline, rx_complete_stat_fifo_int);
DEBUGFS_FWSTATS_ADD(pipeline, pre_proc_swi);
DEBUGFS_FWSTATS_ADD(pipeline, post_proc_swi);
DEBUGFS_FWSTATS_ADD(pipeline, sec_frag_swi);
DEBUGFS_FWSTATS_ADD(pipeline, pre_to_defrag_swi);
DEBUGFS_FWSTATS_ADD(pipeline, defrag_to_csum_swi);
DEBUGFS_FWSTATS_ADD(pipeline, csum_to_rx_xfer_swi);
DEBUGFS_FWSTATS_ADD(pipeline, dec_packet_in);
DEBUGFS_FWSTATS_ADD(pipeline, dec_packet_in_fifo_full);
DEBUGFS_FWSTATS_ADD(pipeline, dec_packet_out);
DEBUGFS_FWSTATS_ADD(pipeline, cs_rx_packet_in);
DEBUGFS_FWSTATS_ADD(pipeline, cs_rx_packet_out);
DEBUGFS_FWSTATS_ADD(pipeline, pipeline_fifo_full);
DEBUGFS_FWSTATS_ADD(mem, rx_free_mem_blks);
DEBUGFS_FWSTATS_ADD(mem, tx_free_mem_blks);
DEBUGFS_FWSTATS_ADD(mem, fwlog_free_mem_blks);
DEBUGFS_FWSTATS_ADD(mem, fw_gen_free_mem_blks);
DEBUGFS_ADD(conf, moddir);
return 0;
err:
if (IS_ERR(entry))
ret = PTR_ERR(entry);
else
ret = -ENOMEM;
return ret;
}
drivers/net/wireless/ti/wl18xx/debugfs.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2012 Texas Instruments. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL18XX_DEBUGFS_H__
#define __WL18XX_DEBUGFS_H__
int wl18xx_debugfs_add_files(struct wl1271 *wl,
struct dentry *rootdir);
#endif /* __WL18XX_DEBUGFS_H__ */
drivers/net/wireless/ti/wl18xx/io.c 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include "../wlcore/wlcore.h"
#include "../wlcore/io.h"
#include "io.h"
void wl18xx_top_reg_write(struct wl1271 *wl, int addr, u16 val)
{
u32 tmp;
if (WARN_ON(addr % 2))
return;
if ((addr % 4) == 0) {
tmp = wl1271_read32(wl, addr);
tmp = (tmp & 0xffff0000) | val;
wl1271_write32(wl, addr, tmp);
} else {
tmp = wl1271_read32(wl, addr - 2);
tmp = (tmp & 0xffff) | (val << 16);
wl1271_write32(wl, addr - 2, tmp);
}
}
u16 wl18xx_top_reg_read(struct wl1271 *wl, int addr)
{
u32 val;
if (WARN_ON(addr % 2))
return 0;
if ((addr % 4) == 0) {
/* address is 4-bytes aligned */
val = wl1271_read32(wl, addr);
return val & 0xffff;
} else {
val = wl1271_read32(wl, addr - 2);
return (val & 0xffff0000) >> 16;
}
}
drivers/net/wireless/ti/wl18xx/io.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL18XX_IO_H__
#define __WL18XX_IO_H__
void wl18xx_top_reg_write(struct wl1271 *wl, int addr, u16 val);
u16 wl18xx_top_reg_read(struct wl1271 *wl, int addr);
#endif /* __WL18XX_IO_H__ */
drivers/net/wireless/ti/wl18xx/main.c 0 → 100644
浏览文件 @ bf34e683
此差异已折叠。
drivers/net/wireless/ti/wl18xx/reg.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wlcore
*
* Copyright (C) 2011 Texas Instruments Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __REG_H__
#define __REG_H__
#define WL18XX_REGISTERS_BASE 0x00800000
#define WL18XX_CODE_BASE 0x00000000
#define WL18XX_DATA_BASE 0x00400000
#define WL18XX_DOUBLE_BUFFER_BASE 0x00600000
#define WL18XX_MCU_KEY_SEARCH_BASE 0x00700000
#define WL18XX_PHY_BASE 0x00900000
#define WL18XX_TOP_OCP_BASE 0x00A00000
#define WL18XX_PACKET_RAM_BASE 0x00B00000
#define WL18XX_HOST_BASE 0x00C00000
#define WL18XX_REGISTERS_DOWN_SIZE 0x0000B000
#define WL18XX_REG_BOOT_PART_START 0x00802000
#define WL18XX_REG_BOOT_PART_SIZE 0x00014578
#define WL18XX_PHY_INIT_MEM_ADDR 0x80926000
#define WL18XX_SDIO_WSPI_BASE (WL18XX_REGISTERS_BASE)
#define WL18XX_REG_CONFIG_BASE (WL18XX_REGISTERS_BASE + 0x02000)
#define WL18XX_WGCM_REGS_BASE (WL18XX_REGISTERS_BASE + 0x03000)
#define WL18XX_ENC_BASE (WL18XX_REGISTERS_BASE + 0x04000)
#define WL18XX_INTERRUPT_BASE (WL18XX_REGISTERS_BASE + 0x05000)
#define WL18XX_UART_BASE (WL18XX_REGISTERS_BASE + 0x06000)
#define WL18XX_WELP_BASE (WL18XX_REGISTERS_BASE + 0x07000)
#define WL18XX_TCP_CKSM_BASE (WL18XX_REGISTERS_BASE + 0x08000)
#define WL18XX_FIFO_BASE (WL18XX_REGISTERS_BASE + 0x09000)
#define WL18XX_OCP_BRIDGE_BASE (WL18XX_REGISTERS_BASE + 0x0A000)
#define WL18XX_PMAC_RX_BASE (WL18XX_REGISTERS_BASE + 0x14800)
#define WL18XX_PMAC_ACM_BASE (WL18XX_REGISTERS_BASE + 0x14C00)
#define WL18XX_PMAC_TX_BASE (WL18XX_REGISTERS_BASE + 0x15000)
#define WL18XX_PMAC_CSR_BASE (WL18XX_REGISTERS_BASE + 0x15400)
#define WL18XX_REG_ECPU_CONTROL (WL18XX_REGISTERS_BASE + 0x02004)
#define WL18XX_REG_INTERRUPT_NO_CLEAR (WL18XX_REGISTERS_BASE + 0x050E8)
#define WL18XX_REG_INTERRUPT_ACK (WL18XX_REGISTERS_BASE + 0x050F0)
#define WL18XX_REG_INTERRUPT_TRIG (WL18XX_REGISTERS_BASE + 0x5074)
#define WL18XX_REG_INTERRUPT_TRIG_H (WL18XX_REGISTERS_BASE + 0x5078)
#define WL18XX_REG_INTERRUPT_MASK (WL18XX_REGISTERS_BASE + 0x0050DC)
#define WL18XX_REG_CHIP_ID_B (WL18XX_REGISTERS_BASE + 0x01542C)
#define WL18XX_SLV_MEM_DATA (WL18XX_HOST_BASE + 0x0018)
#define WL18XX_SLV_REG_DATA (WL18XX_HOST_BASE + 0x0008)
/* Scratch Pad registers*/
#define WL18XX_SCR_PAD0 (WL18XX_REGISTERS_BASE + 0x0154EC)
#define WL18XX_SCR_PAD1 (WL18XX_REGISTERS_BASE + 0x0154F0)
#define WL18XX_SCR_PAD2 (WL18XX_REGISTERS_BASE + 0x0154F4)
#define WL18XX_SCR_PAD3 (WL18XX_REGISTERS_BASE + 0x0154F8)
#define WL18XX_SCR_PAD4 (WL18XX_REGISTERS_BASE + 0x0154FC)
#define WL18XX_SCR_PAD4_SET (WL18XX_REGISTERS_BASE + 0x015504)
#define WL18XX_SCR_PAD4_CLR (WL18XX_REGISTERS_BASE + 0x015500)
#define WL18XX_SCR_PAD5 (WL18XX_REGISTERS_BASE + 0x015508)
#define WL18XX_SCR_PAD5_SET (WL18XX_REGISTERS_BASE + 0x015510)
#define WL18XX_SCR_PAD5_CLR (WL18XX_REGISTERS_BASE + 0x01550C)
#define WL18XX_SCR_PAD6 (WL18XX_REGISTERS_BASE + 0x015514)
#define WL18XX_SCR_PAD7 (WL18XX_REGISTERS_BASE + 0x015518)
#define WL18XX_SCR_PAD8 (WL18XX_REGISTERS_BASE + 0x01551C)
#define WL18XX_SCR_PAD9 (WL18XX_REGISTERS_BASE + 0x015520)
/* Spare registers*/
#define WL18XX_SPARE_A1 (WL18XX_REGISTERS_BASE + 0x002194)
#define WL18XX_SPARE_A2 (WL18XX_REGISTERS_BASE + 0x002198)
#define WL18XX_SPARE_A3 (WL18XX_REGISTERS_BASE + 0x00219C)
#define WL18XX_SPARE_A4 (WL18XX_REGISTERS_BASE + 0x0021A0)
#define WL18XX_SPARE_A5 (WL18XX_REGISTERS_BASE + 0x0021A4)
#define WL18XX_SPARE_A6 (WL18XX_REGISTERS_BASE + 0x0021A8)
#define WL18XX_SPARE_A7 (WL18XX_REGISTERS_BASE + 0x0021AC)
#define WL18XX_SPARE_A8 (WL18XX_REGISTERS_BASE + 0x0021B0)
#define WL18XX_SPARE_B1 (WL18XX_REGISTERS_BASE + 0x015524)
#define WL18XX_SPARE_B2 (WL18XX_REGISTERS_BASE + 0x015528)
#define WL18XX_SPARE_B3 (WL18XX_REGISTERS_BASE + 0x01552C)
#define WL18XX_SPARE_B4 (WL18XX_REGISTERS_BASE + 0x015530)
#define WL18XX_SPARE_B5 (WL18XX_REGISTERS_BASE + 0x015534)
#define WL18XX_SPARE_B6 (WL18XX_REGISTERS_BASE + 0x015538)
#define WL18XX_SPARE_B7 (WL18XX_REGISTERS_BASE + 0x01553C)
#define WL18XX_SPARE_B8 (WL18XX_REGISTERS_BASE + 0x015540)
#define WL18XX_REG_COMMAND_MAILBOX_PTR (WL18XX_SCR_PAD0)
#define WL18XX_REG_EVENT_MAILBOX_PTR (WL18XX_SCR_PAD1)
#define WL18XX_EEPROMLESS_IND (WL18XX_SCR_PAD4)
#define WL18XX_WELP_ARM_COMMAND (WL18XX_REGISTERS_BASE + 0x7100)
#define WL18XX_ENABLE (WL18XX_REGISTERS_BASE + 0x01543C)
/* PRCM registers */
#define PLATFORM_DETECTION 0xA0E3E0
#define OCS_EN 0xA02080
#define PRIMARY_CLK_DETECT 0xA020A6
#define PLLSH_WCS_PLL_N 0xA02362
#define PLLSH_WCS_PLL_M 0xA02360
#define PLLSH_WCS_PLL_Q_FACTOR_CFG_1 0xA02364
#define PLLSH_WCS_PLL_Q_FACTOR_CFG_2 0xA02366
#define PLLSH_WCS_PLL_P_FACTOR_CFG_1 0xA02368
#define PLLSH_WCS_PLL_P_FACTOR_CFG_2 0xA0236A
#define PLLSH_WCS_PLL_SWALLOW_EN 0xA0236C
#define PLLSH_WL_PLL_EN 0xA02392
#define PLLSH_WCS_PLL_Q_FACTOR_CFG_1_MASK 0xFFFF
#define PLLSH_WCS_PLL_Q_FACTOR_CFG_2_MASK 0x007F
#define PLLSH_WCS_PLL_P_FACTOR_CFG_1_MASK 0xFFFF
#define PLLSH_WCS_PLL_P_FACTOR_CFG_2_MASK 0x000F
#define PLLSH_WCS_PLL_SWALLOW_EN_VAL1 0x1
#define PLLSH_WCS_PLL_SWALLOW_EN_VAL2 0x12
#define WL18XX_REG_FUSE_DATA_1_3 0xA0260C
#define WL18XX_PG_VER_MASK 0x70
#define WL18XX_PG_VER_OFFSET 4
#define WL18XX_REG_FUSE_BD_ADDR_1 0xA02602
#define WL18XX_REG_FUSE_BD_ADDR_2 0xA02606
#define WL18XX_CMD_MBOX_ADDRESS 0xB007B4
#define WL18XX_FW_STATUS_ADDR 0x50F8
#define CHIP_ID_185x_PG10 (0x06030101)
#define CHIP_ID_185x_PG20 (0x06030111)
/*
* Host Command Interrupt. Setting this bit masks
* the interrupt that the host issues to inform
* the FW that it has sent a command
* to the Wlan hardware Command Mailbox.
*/
#define WL18XX_INTR_TRIG_CMD BIT(28)
/*
* Host Event Acknowlegde Interrupt. The host
* sets this bit to acknowledge that it received
* the unsolicited information from the event
* mailbox.
*/
#define WL18XX_INTR_TRIG_EVENT_ACK BIT(29)
/*
* To boot the firmware in PLT mode we need to write this value in
* SCR_PAD8 before starting.
*/
#define WL18XX_SCR_PAD8_PLT 0xBABABEBE
enum {
COMPONENT_NO_SWITCH = 0x0,
COMPONENT_2_WAY_SWITCH = 0x1,
COMPONENT_3_WAY_SWITCH = 0x2,
COMPONENT_MATCHING = 0x3,
};
enum {
FEM_NONE = 0x0,
FEM_VENDOR_1 = 0x1,
FEM_VENDOR_2 = 0x2,
FEM_VENDOR_3 = 0x3,
};
enum {
BOARD_TYPE_EVB_18XX = 0,
BOARD_TYPE_DVP_18XX = 1,
BOARD_TYPE_HDK_18XX = 2,
BOARD_TYPE_FPGA_18XX = 3,
BOARD_TYPE_COM8_18XX = 4,
NUM_BOARD_TYPES,
};
#endif /* __REG_H__ */
drivers/net/wireless/ti/wl18xx/tx.c 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#include "../wlcore/wlcore.h"
#include "../wlcore/cmd.h"
#include "../wlcore/debug.h"
#include "../wlcore/acx.h"
#include "../wlcore/tx.h"
#include "wl18xx.h"
#include "tx.h"
static void wl18xx_tx_complete_packet(struct wl1271 *wl, u8 tx_stat_byte)
{
struct ieee80211_tx_info *info;
struct sk_buff *skb;
int id = tx_stat_byte & WL18XX_TX_STATUS_DESC_ID_MASK;
bool tx_success;
/* check for id legality */
if (unlikely(id >= wl->num_tx_desc || wl->tx_frames[id] == NULL)) {
wl1271_warning("illegal id in tx completion: %d", id);
return;
}
/* a zero bit indicates Tx success */
tx_success = !(tx_stat_byte & BIT(WL18XX_TX_STATUS_STAT_BIT_IDX));
skb = wl->tx_frames[id];
info = IEEE80211_SKB_CB(skb);
if (wl12xx_is_dummy_packet(wl, skb)) {
wl1271_free_tx_id(wl, id);
return;
}
/* update the TX status info */
if (tx_success && !(info->flags & IEEE80211_TX_CTL_NO_ACK))
info->flags |= IEEE80211_TX_STAT_ACK;
/* no real data about Tx completion */
info->status.rates[0].idx = -1;
info->status.rates[0].count = 0;
info->status.rates[0].flags = 0;
info->status.ack_signal = -1;
if (!tx_success)
wl->stats.retry_count++;
/*
* TODO: update sequence number for encryption? seems to be
* unsupported for now. needed for recovery with encryption.
*/
/* remove private header from packet */
skb_pull(skb, sizeof(struct wl1271_tx_hw_descr));
/* remove TKIP header space if present */
if ((wl->quirks & WLCORE_QUIRK_TKIP_HEADER_SPACE) &&
info->control.hw_key &&
info->control.hw_key->cipher == WLAN_CIPHER_SUITE_TKIP) {
int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
memmove(skb->data + WL1271_EXTRA_SPACE_TKIP, skb->data, hdrlen);
skb_pull(skb, WL1271_EXTRA_SPACE_TKIP);
}
wl1271_debug(DEBUG_TX, "tx status id %u skb 0x%p success %d",
id, skb, tx_success);
/* return the packet to the stack */
skb_queue_tail(&wl->deferred_tx_queue, skb);
queue_work(wl->freezable_wq, &wl->netstack_work);
wl1271_free_tx_id(wl, id);
}
void wl18xx_tx_immediate_complete(struct wl1271 *wl)
{
struct wl18xx_fw_status_priv *status_priv =
(struct wl18xx_fw_status_priv *)wl->fw_status_2->priv;
struct wl18xx_priv *priv = wl->priv;
u8 i;
/* nothing to do here */
if (priv->last_fw_rls_idx == status_priv->fw_release_idx)
return;
/* freed Tx descriptors */
wl1271_debug(DEBUG_TX, "last released desc = %d, current idx = %d",
priv->last_fw_rls_idx, status_priv->fw_release_idx);
if (status_priv->fw_release_idx >= WL18XX_FW_MAX_TX_STATUS_DESC) {
wl1271_error("invalid desc release index %d",
status_priv->fw_release_idx);
WARN_ON(1);
return;
}
for (i = priv->last_fw_rls_idx;
i != status_priv->fw_release_idx;
i = (i + 1) % WL18XX_FW_MAX_TX_STATUS_DESC) {
wl18xx_tx_complete_packet(wl,
status_priv->released_tx_desc[i]);
wl->tx_results_count++;
}
priv->last_fw_rls_idx = status_priv->fw_release_idx;
}
drivers/net/wireless/ti/wl18xx/tx.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments. All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL18XX_TX_H__
#define __WL18XX_TX_H__
#include "../wlcore/wlcore.h"
#define WL18XX_TX_HW_BLOCK_SPARE 1
/* for special cases - namely, TKIP and GEM */
#define WL18XX_TX_HW_EXTRA_BLOCK_SPARE 2
#define WL18XX_TX_HW_BLOCK_SIZE 268
#define WL18XX_TX_STATUS_DESC_ID_MASK 0x7F
#define WL18XX_TX_STATUS_STAT_BIT_IDX 7
/* Indicates this TX HW frame is not padded to SDIO block size */
#define WL18XX_TX_CTRL_NOT_PADDED BIT(7)
/*
* The FW uses a special bit to indicate a wide channel should be used in
* the rate policy.
*/
#define CONF_TX_RATE_USE_WIDE_CHAN BIT(31)
void wl18xx_tx_immediate_complete(struct wl1271 *wl);
#endif /* __WL12XX_TX_H__ */
drivers/net/wireless/ti/wl18xx/wl18xx.h 0 → 100644
浏览文件 @ bf34e683
/*
* This file is part of wl18xx
*
* Copyright (C) 2011 Texas Instruments Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __WL18XX_PRIV_H__
#define __WL18XX_PRIV_H__
#include "conf.h"
#define WL18XX_CMD_MAX_SIZE 740
struct wl18xx_priv {
/* buffer for sending commands to FW */
u8 cmd_buf[WL18XX_CMD_MAX_SIZE];
struct wl18xx_priv_conf conf;
/* Index of last released Tx desc in FW */
u8 last_fw_rls_idx;
/* number of VIFs requiring extra spare mem-blocks */
int extra_spare_vif_count;
};
#define WL18XX_FW_MAX_TX_STATUS_DESC 33
struct wl18xx_fw_status_priv {
/*
* Index in released_tx_desc for first byte that holds
* released tx host desc
*/
u8 fw_release_idx;
/*
* Array of host Tx descriptors, where fw_release_idx
* indicated the first released idx.
*/
u8 released_tx_desc[WL18XX_FW_MAX_TX_STATUS_DESC];
u8 padding[2];
};
#define WL18XX_PHY_VERSION_MAX_LEN 20
struct wl18xx_static_data_priv {
char phy_version[WL18XX_PHY_VERSION_MAX_LEN];
};
struct wl18xx_clk_cfg {
u32 n;
u32 m;
u32 p;
u32 q;
bool swallow;
};
enum {
CLOCK_CONFIG_16_2_M = 1,
CLOCK_CONFIG_16_368_M,
CLOCK_CONFIG_16_8_M,
CLOCK_CONFIG_19_2_M,
CLOCK_CONFIG_26_M,
CLOCK_CONFIG_32_736_M,
CLOCK_CONFIG_33_6_M,
CLOCK_CONFIG_38_468_M,
CLOCK_CONFIG_52_M,
NUM_CLOCK_CONFIGS,
};
#endif /* __WL18XX_PRIV_H__ */
drivers/net/wireless/ti/wlcore/acx.c
浏览文件 @ bf34e683
......@@ -86,6 +86,7 @@ int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth)
kfree(auth);
return ret;
}
EXPORT_SYMBOL_GPL(wl1271_acx_sleep_auth);
int wl1271_acx_tx_power(struct wl1271 *wl, struct wl12xx_vif *wlvif,
int power)
......@@ -708,14 +709,14 @@ int wl1271_acx_cts_protect(struct wl1271 *wl, struct wl12xx_vif *wlvif,
return ret;
}
int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats)
int wl1271_acx_statistics(struct wl1271 *wl, void *stats)
{
int ret;
wl1271_debug(DEBUG_ACX, "acx statistics");
ret = wl1271_cmd_interrogate(wl, ACX_STATISTICS, stats,
sizeof(*stats));
wl->stats.fw_stats_len);
if (ret < 0) {
wl1271_warning("acx statistics failed: %d", ret);
return -ENOMEM;
......@@ -997,6 +998,7 @@ int wl12xx_acx_mem_cfg(struct wl1271 *wl)
kfree(mem_conf);
return ret;
}
EXPORT_SYMBOL_GPL(wl12xx_acx_mem_cfg);
int wl1271_acx_init_mem_config(struct wl1271 *wl)
{
......@@ -1027,6 +1029,7 @@ int wl1271_acx_init_mem_config(struct wl1271 *wl)
return 0;
}
EXPORT_SYMBOL_GPL(wl1271_acx_init_mem_config);
int wl1271_acx_init_rx_interrupt(struct wl1271 *wl)
{
......@@ -1150,6 +1153,7 @@ int wl1271_acx_pm_config(struct wl1271 *wl)
kfree(acx);
return ret;
}
EXPORT_SYMBOL_GPL(wl1271_acx_pm_config);
int wl1271_acx_keep_alive_mode(struct wl1271 *wl, struct wl12xx_vif *wlvif,
bool enable)
......
drivers/net/wireless/ti/wlcore/acx.h
浏览文件 @ bf34e683
......@@ -51,21 +51,18 @@
#define WL1271_ACX_INTR_TRACE_A BIT(7)
/* Trace message on MBOX #B */
#define WL1271_ACX_INTR_TRACE_B BIT(8)
/* SW FW Initiated interrupt Watchdog timer expiration */
#define WL1271_ACX_SW_INTR_WATCHDOG BIT(9)
#define WL1271_ACX_INTR_ALL 0xFFFFFFFF
#define WL1271_ACX_ALL_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_INIT_COMPLETE | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_CMD_COMPLETE | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA)
#define WL1271_INTR_MASK (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA)
#define WL1271_ACX_INTR_ALL 0xFFFFFFFF
/* all possible interrupts - only appropriate ones will be masked in */
#define WLCORE_ALL_INTR_MASK (WL1271_ACX_INTR_WATCHDOG | \
WL1271_ACX_INTR_EVENT_A | \
WL1271_ACX_INTR_EVENT_B | \
WL1271_ACX_INTR_HW_AVAILABLE | \
WL1271_ACX_INTR_DATA | \
WL1271_ACX_SW_INTR_WATCHDOG)
/* Target's information element */
struct acx_header {
......@@ -417,228 +414,6 @@ struct acx_ctsprotect {
u8 padding[2];
} __packed;
struct acx_tx_statistics {
__le32 internal_desc_overflow;
} __packed;
struct acx_rx_statistics {
__le32 out_of_mem;
__le32 hdr_overflow;
__le32 hw_stuck;
__le32 dropped;
__le32 fcs_err;
__le32 xfr_hint_trig;
__le32 path_reset;
__le32 reset_counter;
} __packed;
struct acx_dma_statistics {
__le32 rx_requested;
__le32 rx_errors;
__le32 tx_requested;
__le32 tx_errors;
} __packed;
struct acx_isr_statistics {
/* host command complete */
__le32 cmd_cmplt;
/* fiqisr() */
__le32 fiqs;
/* (INT_STS_ND & INT_TRIG_RX_HEADER) */
__le32 rx_headers;
/* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
__le32 rx_completes;
/* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
__le32 rx_mem_overflow;
/* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
__le32 rx_rdys;
/* irqisr() */
__le32 irqs;
/* (INT_STS_ND & INT_TRIG_TX_PROC) */
__le32 tx_procs;
/* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
__le32 decrypt_done;
/* (INT_STS_ND & INT_TRIG_DMA0) */
__le32 dma0_done;
/* (INT_STS_ND & INT_TRIG_DMA1) */
__le32 dma1_done;
/* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
__le32 tx_exch_complete;
/* (INT_STS_ND & INT_TRIG_COMMAND) */
__le32 commands;
/* (INT_STS_ND & INT_TRIG_RX_PROC) */
__le32 rx_procs;
/* (INT_STS_ND & INT_TRIG_PM_802) */
__le32 hw_pm_mode_changes;
/* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
__le32 host_acknowledges;
/* (INT_STS_ND & INT_TRIG_PM_PCI) */
__le32 pci_pm;
/* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
__le32 wakeups;
/* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
__le32 low_rssi;
} __packed;
struct acx_wep_statistics {
/* WEP address keys configured */
__le32 addr_key_count;
/* default keys configured */
__le32 default_key_count;
__le32 reserved;
/* number of times that WEP key not found on lookup */
__le32 key_not_found;
/* number of times that WEP key decryption failed */
__le32 decrypt_fail;
/* WEP packets decrypted */
__le32 packets;
/* WEP decrypt interrupts */
__le32 interrupt;
} __packed;
#define ACX_MISSED_BEACONS_SPREAD 10
struct acx_pwr_statistics {
/* the amount of enters into power save mode (both PD & ELP) */
__le32 ps_enter;
/* the amount of enters into ELP mode */
__le32 elp_enter;
/* the amount of missing beacon interrupts to the host */
__le32 missing_bcns;
/* the amount of wake on host-access times */
__le32 wake_on_host;
/* the amount of wake on timer-expire */
__le32 wake_on_timer_exp;
/* the number of packets that were transmitted with PS bit set */
__le32 tx_with_ps;
/* the number of packets that were transmitted with PS bit clear */
__le32 tx_without_ps;
/* the number of received beacons */
__le32 rcvd_beacons;
/* the number of entering into PowerOn (power save off) */
__le32 power_save_off;
/* the number of entries into power save mode */
__le16 enable_ps;
/*
* the number of exits from power save, not including failed PS
* transitions
*/
__le16 disable_ps;
/*
* the number of times the TSF counter was adjusted because
* of drift
*/
__le32 fix_tsf_ps;
/* Gives statistics about the spread continuous missed beacons.
* The 16 LSB are dedicated for the PS mode.
* The 16 MSB are dedicated for the PS mode.
* cont_miss_bcns_spread[0] - single missed beacon.
* cont_miss_bcns_spread[1] - two continuous missed beacons.
* cont_miss_bcns_spread[2] - three continuous missed beacons.
* ...
* cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
*/
__le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
/* the number of beacons in awake mode */
__le32 rcvd_awake_beacons;
} __packed;
struct acx_mic_statistics {
__le32 rx_pkts;
__le32 calc_failure;
} __packed;
struct acx_aes_statistics {
__le32 encrypt_fail;
__le32 decrypt_fail;
__le32 encrypt_packets;
__le32 decrypt_packets;
__le32 encrypt_interrupt;
__le32 decrypt_interrupt;
} __packed;
struct acx_event_statistics {
__le32 heart_beat;
__le32 calibration;
__le32 rx_mismatch;
__le32 rx_mem_empty;
__le32 rx_pool;
__le32 oom_late;
__le32 phy_transmit_error;
__le32 tx_stuck;
} __packed;
struct acx_ps_statistics {
__le32 pspoll_timeouts;
__le32 upsd_timeouts;
__le32 upsd_max_sptime;
__le32 upsd_max_apturn;
__le32 pspoll_max_apturn;
__le32 pspoll_utilization;
__le32 upsd_utilization;
} __packed;
struct acx_rxpipe_statistics {
__le32 rx_prep_beacon_drop;
__le32 descr_host_int_trig_rx_data;
__le32 beacon_buffer_thres_host_int_trig_rx_data;
__le32 missed_beacon_host_int_trig_rx_data;
__le32 tx_xfr_host_int_trig_rx_data;
} __packed;
struct acx_statistics {
struct acx_header header;
struct acx_tx_statistics tx;
struct acx_rx_statistics rx;
struct acx_dma_statistics dma;
struct acx_isr_statistics isr;
struct acx_wep_statistics wep;
struct acx_pwr_statistics pwr;
struct acx_aes_statistics aes;
struct acx_mic_statistics mic;
struct acx_event_statistics event;
struct acx_ps_statistics ps;
struct acx_rxpipe_statistics rxpipe;
} __packed;
struct acx_rate_class {
__le32 enabled_rates;
u8 short_retry_limit;
......@@ -828,6 +603,8 @@ struct wl1271_acx_keep_alive_config {
#define HOST_IF_CFG_RX_FIFO_ENABLE BIT(0)
#define HOST_IF_CFG_TX_EXTRA_BLKS_SWAP BIT(1)
#define HOST_IF_CFG_TX_PAD_TO_SDIO_BLK BIT(3)
#define HOST_IF_CFG_RX_PAD_TO_SDIO_BLK BIT(4)
#define HOST_IF_CFG_ADD_RX_ALIGNMENT BIT(6)
enum {
WL1271_ACX_TRIG_TYPE_LEVEL = 0,
......@@ -946,7 +723,7 @@ struct wl1271_acx_ht_information {
u8 padding[2];
} __packed;
#define RX_BA_MAX_SESSIONS 2
#define RX_BA_MAX_SESSIONS 3
struct wl1271_acx_ba_initiator_policy {
struct acx_header header;
......@@ -1243,6 +1020,7 @@ enum {
ACX_CONFIG_HANGOVER = 0x0042,
ACX_FEATURE_CFG = 0x0043,
ACX_PROTECTION_CFG = 0x0044,
ACX_CHECKSUM_CONFIG = 0x0045,
};
......@@ -1281,7 +1059,7 @@ int wl1271_acx_set_preamble(struct wl1271 *wl, struct wl12xx_vif *wlvif,
enum acx_preamble_type preamble);
int wl1271_acx_cts_protect(struct wl1271 *wl, struct wl12xx_vif *wlvif,
enum acx_ctsprotect_type ctsprotect);
int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats);
int wl1271_acx_statistics(struct wl1271 *wl, void *stats);
int wl1271_acx_sta_rate_policies(struct wl1271 *wl, struct wl12xx_vif *wlvif);
int wl1271_acx_ap_rate_policy(struct wl1271 *wl, struct conf_tx_rate_class *c,
u8 idx);
......
drivers/net/wireless/ti/wlcore/boot.c
浏览文件 @ bf34e683
......@@ -45,10 +45,17 @@ static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
}
static int wlcore_parse_fw_ver(struct wl1271 *wl)
static int wlcore_boot_parse_fw_ver(struct wl1271 *wl,
struct wl1271_static_data *static_data)
{
int ret;
strncpy(wl->chip.fw_ver_str, static_data->fw_version,
sizeof(wl->chip.fw_ver_str));
/* make sure the string is NULL-terminated */
wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
&wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
&wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
......@@ -57,43 +64,43 @@ static int wlcore_parse_fw_ver(struct wl1271 *wl)
if (ret != 5) {
wl1271_warning("fw version incorrect value");
memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
return -EINVAL;
ret = -EINVAL;
goto out;
}
ret = wlcore_identify_fw(wl);
if (ret < 0)
return ret;
return 0;
goto out;
out:
return ret;
}
static int wlcore_boot_fw_version(struct wl1271 *wl)
static int wlcore_boot_static_data(struct wl1271 *wl)
{
struct wl1271_static_data *static_data;
size_t len = sizeof(*static_data) + wl->static_data_priv_len;
int ret;
static_data = kmalloc(sizeof(*static_data), GFP_KERNEL | GFP_DMA);
static_data = kmalloc(len, GFP_KERNEL);
if (!static_data) {
wl1271_error("Couldn't allocate memory for static data!");
return -ENOMEM;
ret = -ENOMEM;
goto out;
}
wl1271_read(wl, wl->cmd_box_addr, static_data, sizeof(*static_data),
false);
strncpy(wl->chip.fw_ver_str, static_data->fw_version,
sizeof(wl->chip.fw_ver_str));
kfree(static_data);
wl1271_read(wl, wl->cmd_box_addr, static_data, len, false);
/* make sure the string is NULL-terminated */
wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
ret = wlcore_boot_parse_fw_ver(wl, static_data);
if (ret < 0)
goto out_free;
ret = wlcore_parse_fw_ver(wl);
ret = wlcore_handle_static_data(wl, static_data);
if (ret < 0)
return ret;
goto out_free;
return 0;
out_free:
kfree(static_data);
out:
return ret;
}
static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
......@@ -204,8 +211,10 @@ int wlcore_boot_upload_nvs(struct wl1271 *wl)
u32 dest_addr, val;
u8 *nvs_ptr, *nvs_aligned;
if (wl->nvs == NULL)
if (wl->nvs == NULL) {
wl1271_error("NVS file is needed during boot");
return -ENODEV;
}
if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
struct wl1271_nvs_file *nvs =
......@@ -400,9 +409,9 @@ int wlcore_boot_run_firmware(struct wl1271 *wl)
wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
wl->mbox_ptr[0], wl->mbox_ptr[1]);
ret = wlcore_boot_fw_version(wl);
ret = wlcore_boot_static_data(wl);
if (ret < 0) {
wl1271_error("couldn't boot firmware");
wl1271_error("error getting static data");
return ret;
}
......
drivers/net/wireless/ti/wlcore/boot.h
浏览文件 @ bf34e683
......@@ -40,6 +40,7 @@ struct wl1271_static_data {
u8 fw_version[WL1271_FW_VERSION_MAX_LEN];
u32 hw_version;
u8 tx_power_table[WL1271_NO_SUBBANDS][WL1271_NO_POWER_LEVELS];
u8 priv[0];
};
/* number of times we try to read the INIT interrupt */
......
drivers/net/wireless/ti/wlcore/cmd.c
浏览文件 @ bf34e683
......@@ -36,6 +36,7 @@
#include "cmd.h"
#include "event.h"
#include "tx.h"
#include "hw_ops.h"
#define WL1271_CMD_FAST_POLL_COUNT 50
......@@ -291,6 +292,23 @@ static int wl12xx_get_new_session_id(struct wl1271 *wl,
return wlvif->session_counter;
}
static u8 wlcore_get_native_channel_type(u8 nl_channel_type)
{
switch (nl_channel_type) {
case NL80211_CHAN_NO_HT:
return WLCORE_CHAN_NO_HT;
case NL80211_CHAN_HT20:
return WLCORE_CHAN_HT20;
case NL80211_CHAN_HT40MINUS:
return WLCORE_CHAN_HT40MINUS;
case NL80211_CHAN_HT40PLUS:
return WLCORE_CHAN_HT40PLUS;
default:
WARN_ON(1);
return WLCORE_CHAN_NO_HT;
}
}
static int wl12xx_cmd_role_start_dev(struct wl1271 *wl,
struct wl12xx_vif *wlvif)
{
......@@ -407,6 +425,7 @@ int wl12xx_cmd_role_start_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif)
memcpy(cmd->sta.ssid, wlvif->ssid, wlvif->ssid_len);
memcpy(cmd->sta.bssid, vif->bss_conf.bssid, ETH_ALEN);
cmd->sta.local_rates = cpu_to_le32(wlvif->rate_set);
cmd->channel_type = wlcore_get_native_channel_type(wlvif->channel_type);
if (wlvif->sta.hlid == WL12XX_INVALID_LINK_ID) {
ret = wl12xx_allocate_link(wl, wlvif, &wlvif->sta.hlid);
......@@ -482,6 +501,7 @@ int wl12xx_cmd_role_start_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif)
struct wl12xx_cmd_role_start *cmd;
struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif);
struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
u32 supported_rates;
int ret;
wl1271_debug(DEBUG_CMD, "cmd role start ap %d", wlvif->role_id);
......@@ -519,6 +539,7 @@ int wl12xx_cmd_role_start_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif)
/* FIXME: Change when adding DFS */
cmd->ap.reset_tsf = 1; /* By default reset AP TSF */
cmd->channel = wlvif->channel;
cmd->channel_type = wlcore_get_native_channel_type(wlvif->channel_type);
if (!bss_conf->hidden_ssid) {
/* take the SSID from the beacon for backward compatibility */
......@@ -531,7 +552,13 @@ int wl12xx_cmd_role_start_ap(struct wl1271 *wl, struct wl12xx_vif *wlvif)
memcpy(cmd->ap.ssid, bss_conf->ssid, bss_conf->ssid_len);
}
cmd->ap.local_rates = cpu_to_le32(0xffffffff);
supported_rates = CONF_TX_AP_ENABLED_RATES | CONF_TX_MCS_RATES |
wlcore_hw_ap_get_mimo_wide_rate_mask(wl, wlvif);
wl1271_debug(DEBUG_CMD, "cmd role start ap with supported_rates 0x%08x",
supported_rates);
cmd->ap.local_rates = cpu_to_le32(supported_rates);
switch (wlvif->band) {
case IEEE80211_BAND_2GHZ:
......@@ -797,6 +824,7 @@ int wl1271_cmd_data_path(struct wl1271 *wl, bool enable)
kfree(cmd);
return ret;
}
EXPORT_SYMBOL_GPL(wl1271_cmd_data_path);
int wl1271_cmd_ps_mode(struct wl1271 *wl, struct wl12xx_vif *wlvif,
u8 ps_mode, u16 auto_ps_timeout)
......@@ -1018,7 +1046,7 @@ struct sk_buff *wl1271_cmd_build_ap_probe_req(struct wl1271 *wl,
int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, struct wl12xx_vif *wlvif)
{
int ret, extra;
int ret, extra = 0;
u16 fc;
struct ieee80211_vif *vif = wl12xx_wlvif_to_vif(wlvif);
struct sk_buff *skb;
......@@ -1057,7 +1085,8 @@ int wl1271_cmd_build_arp_rsp(struct wl1271 *wl, struct wl12xx_vif *wlvif)
/* encryption space */
switch (wlvif->encryption_type) {
case KEY_TKIP:
extra = WL1271_EXTRA_SPACE_TKIP;
if (wl->quirks & WLCORE_QUIRK_TKIP_HEADER_SPACE)
extra = WL1271_EXTRA_SPACE_TKIP;
break;
case KEY_AES:
extra = WL1271_EXTRA_SPACE_AES;
......@@ -1346,13 +1375,18 @@ int wl12xx_cmd_add_peer(struct wl1271 *wl, struct wl12xx_vif *wlvif,
for (i = 0; i < NUM_ACCESS_CATEGORIES_COPY; i++)
if (sta->wme && (sta->uapsd_queues & BIT(i)))
cmd->psd_type[i] = WL1271_PSD_UPSD_TRIGGER;
cmd->psd_type[NUM_ACCESS_CATEGORIES_COPY-1-i] =
WL1271_PSD_UPSD_TRIGGER;
else
cmd->psd_type[i] = WL1271_PSD_LEGACY;
cmd->psd_type[NUM_ACCESS_CATEGORIES_COPY-1-i] =
WL1271_PSD_LEGACY;
sta_rates = sta->supp_rates[wlvif->band];
if (sta->ht_cap.ht_supported)
sta_rates |= sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET;
sta_rates |=
(sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET) |
(sta->ht_cap.mcs.rx_mask[1] << HW_MIMO_RATES_OFFSET);
cmd->supported_rates =
cpu_to_le32(wl1271_tx_enabled_rates_get(wl, sta_rates,
......@@ -1573,19 +1607,25 @@ static int wl12xx_cmd_croc(struct wl1271 *wl, u8 role_id)
int wl12xx_roc(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 role_id)
{
int ret = 0;
bool is_first_roc;
if (WARN_ON(test_bit(role_id, wl->roc_map)))
return 0;
is_first_roc = (find_first_bit(wl->roc_map, WL12XX_MAX_ROLES) >=
WL12XX_MAX_ROLES);
ret = wl12xx_cmd_roc(wl, wlvif, role_id);
if (ret < 0)
goto out;
ret = wl1271_cmd_wait_for_event(wl,
REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID);
if (ret < 0) {
wl1271_error("cmd roc event completion error");
goto out;
if (is_first_roc) {
ret = wl1271_cmd_wait_for_event(wl,
REMAIN_ON_CHANNEL_COMPLETE_EVENT_ID);
if (ret < 0) {
wl1271_error("cmd roc event completion error");
goto out;
}
}
__set_bit(role_id, wl->roc_map);
......
drivers/net/wireless/ti/wlcore/cmd.h
浏览文件 @ bf34e683
......@@ -192,7 +192,7 @@ enum cmd_templ {
#define WL1271_COMMAND_TIMEOUT 2000
#define WL1271_CMD_TEMPL_DFLT_SIZE 252
#define WL1271_CMD_TEMPL_MAX_SIZE 512
#define WL1271_EVENT_TIMEOUT 750
#define WL1271_EVENT_TIMEOUT 1000
struct wl1271_cmd_header {
__le16 id;
......@@ -266,13 +266,22 @@ enum wlcore_band {
WLCORE_BAND_MAX_RADIO = 0x7F,
};
enum wlcore_channel_type {
WLCORE_CHAN_NO_HT,
WLCORE_CHAN_HT20,
WLCORE_CHAN_HT40MINUS,
WLCORE_CHAN_HT40PLUS
};
struct wl12xx_cmd_role_start {
struct wl1271_cmd_header header;
u8 role_id;
u8 band;
u8 channel;
u8 padding;
/* enum wlcore_channel_type */
u8 channel_type;
union {
struct {
......
drivers/net/wireless/ti/wlcore/conf.h
浏览文件 @ bf34e683
......@@ -45,7 +45,15 @@ enum {
CONF_HW_BIT_RATE_MCS_4 = BIT(17),
CONF_HW_BIT_RATE_MCS_5 = BIT(18),
CONF_HW_BIT_RATE_MCS_6 = BIT(19),
CONF_HW_BIT_RATE_MCS_7 = BIT(20)
CONF_HW_BIT_RATE_MCS_7 = BIT(20),
CONF_HW_BIT_RATE_MCS_8 = BIT(21),
CONF_HW_BIT_RATE_MCS_9 = BIT(22),
CONF_HW_BIT_RATE_MCS_10 = BIT(23),
CONF_HW_BIT_RATE_MCS_11 = BIT(24),
CONF_HW_BIT_RATE_MCS_12 = BIT(25),
CONF_HW_BIT_RATE_MCS_13 = BIT(26),
CONF_HW_BIT_RATE_MCS_14 = BIT(27),
CONF_HW_BIT_RATE_MCS_15 = BIT(28),
};
enum {
......@@ -310,7 +318,7 @@ enum {
struct conf_sg_settings {
u32 params[CONF_SG_PARAMS_MAX];
u8 state;
};
} __packed;
enum conf_rx_queue_type {
CONF_RX_QUEUE_TYPE_LOW_PRIORITY, /* All except the high priority */
......@@ -394,7 +402,7 @@ struct conf_rx_settings {
* Range: RX_QUEUE_TYPE_RX_LOW_PRIORITY, RX_QUEUE_TYPE_RX_HIGH_PRIORITY,
*/
u8 queue_type;
};
} __packed;
#define CONF_TX_MAX_RATE_CLASSES 10
......@@ -435,6 +443,12 @@ struct conf_rx_settings {
CONF_HW_BIT_RATE_MCS_5 | CONF_HW_BIT_RATE_MCS_6 | \
CONF_HW_BIT_RATE_MCS_7)
#define CONF_TX_MIMO_RATES (CONF_HW_BIT_RATE_MCS_8 | \
CONF_HW_BIT_RATE_MCS_9 | CONF_HW_BIT_RATE_MCS_10 | \
CONF_HW_BIT_RATE_MCS_11 | CONF_HW_BIT_RATE_MCS_12 | \
CONF_HW_BIT_RATE_MCS_13 | CONF_HW_BIT_RATE_MCS_14 | \
CONF_HW_BIT_RATE_MCS_15)
/*
* Default rates for management traffic when operating in AP mode. This
* should be configured according to the basic rate set of the AP
......@@ -487,7 +501,7 @@ struct conf_tx_rate_class {
* the policy (0 - long preamble, 1 - short preamble.
*/
u8 aflags;
};
} __packed;
#define CONF_TX_MAX_AC_COUNT 4
......@@ -504,7 +518,7 @@ enum conf_tx_ac {
CONF_TX_AC_VI = 2, /* video */
CONF_TX_AC_VO = 3, /* voice */
CONF_TX_AC_CTS2SELF = 4, /* fictitious AC, follows AC_VO */
CONF_TX_AC_ANY_TID = 0x1f
CONF_TX_AC_ANY_TID = 0xff
};
struct conf_tx_ac_category {
......@@ -544,7 +558,7 @@ struct conf_tx_ac_category {
* Range: u16
*/
u16 tx_op_limit;
};
} __packed;
#define CONF_TX_MAX_TID_COUNT 8
......@@ -578,7 +592,7 @@ struct conf_tx_tid {
u8 ps_scheme;
u8 ack_policy;
u32 apsd_conf[2];
};
} __packed;
struct conf_tx_settings {
/*
......@@ -664,7 +678,7 @@ struct conf_tx_settings {
/* Time in ms for Tx watchdog timer to expire */
u32 tx_watchdog_timeout;
};
} __packed;
enum {
CONF_WAKE_UP_EVENT_BEACON = 0x01, /* Wake on every Beacon*/
......@@ -711,7 +725,7 @@ struct conf_bcn_filt_rule {
* Version for the vendor specifie IE (221)
*/
u8 version[CONF_BCN_IE_VER_LEN];
};
} __packed;
#define CONF_MAX_RSSI_SNR_TRIGGERS 8
......@@ -762,7 +776,7 @@ struct conf_sig_weights {
* Range: u8
*/
u8 snr_pkt_avg_weight;
};
} __packed;
enum conf_bcn_filt_mode {
CONF_BCN_FILT_MODE_DISABLED = 0,
......@@ -810,7 +824,7 @@ struct conf_conn_settings {
*
* Range: CONF_BCN_FILT_MODE_*
*/
enum conf_bcn_filt_mode bcn_filt_mode;
u8 bcn_filt_mode;
/*
* Configure Beacon filter pass-thru rules.
......@@ -937,7 +951,7 @@ struct conf_conn_settings {
* Range: u16
*/
u8 max_listen_interval;
};
} __packed;
enum {
CONF_REF_CLK_19_2_E,
......@@ -965,6 +979,11 @@ struct conf_itrim_settings {
/* moderation timeout in microsecs from the last TX */
u32 timeout;
} __packed;
enum conf_fast_wakeup {
CONF_FAST_WAKEUP_ENABLE,
CONF_FAST_WAKEUP_DISABLE,
};
struct conf_pm_config_settings {
......@@ -978,10 +997,10 @@ struct conf_pm_config_settings {
/*
* Host fast wakeup support
*
* Range: true, false
* Range: enum conf_fast_wakeup
*/
bool host_fast_wakeup_support;
};
u8 host_fast_wakeup_support;
} __packed;
struct conf_roam_trigger_settings {
/*
......@@ -1018,7 +1037,7 @@ struct conf_roam_trigger_settings {
* Range: 0 - 255
*/
u8 avg_weight_snr_data;
};
} __packed;
struct conf_scan_settings {
/*
......@@ -1064,7 +1083,7 @@ struct conf_scan_settings {
* Range: u32 Microsecs
*/
u32 split_scan_timeout;
};
} __packed;
struct conf_sched_scan_settings {
/*
......@@ -1102,7 +1121,7 @@ struct conf_sched_scan_settings {
/* SNR threshold to be used for filtering */
s8 snr_threshold;
};
} __packed;
struct conf_ht_setting {
u8 rx_ba_win_size;
......@@ -1111,7 +1130,7 @@ struct conf_ht_setting {
/* bitmap of enabled TIDs for TX BA sessions */
u8 tx_ba_tid_bitmap;
};
} __packed;
struct conf_memory_settings {
/* Number of stations supported in IBSS mode */
......@@ -1151,7 +1170,7 @@ struct conf_memory_settings {
* Range: 0-120
*/
u8 tx_min;
};
} __packed;
struct conf_fm_coex {
u8 enable;
......@@ -1164,7 +1183,7 @@ struct conf_fm_coex {
u16 ldo_stabilization_time;
u8 fm_disturbed_band_margin;
u8 swallow_clk_diff;
};
} __packed;
struct conf_rx_streaming_settings {
/*
......@@ -1193,7 +1212,7 @@ struct conf_rx_streaming_settings {
* enable rx streaming also when there is no coex activity
*/
u8 always;
};
} __packed;
struct conf_fwlog {
/* Continuous or on-demand */
......@@ -1217,7 +1236,7 @@ struct conf_fwlog {
/* Regulates the frequency of log messages */
u8 threshold;
};
} __packed;
#define ACX_RATE_MGMT_NUM_OF_RATES 13
struct conf_rate_policy_settings {
......@@ -1236,7 +1255,7 @@ struct conf_rate_policy_settings {
u8 rate_check_up;
u8 rate_check_down;
u8 rate_retry_policy[ACX_RATE_MGMT_NUM_OF_RATES];
};
} __packed;
struct conf_hangover_settings {
u32 recover_time;
......@@ -1250,7 +1269,23 @@ struct conf_hangover_settings {
u8 quiet_time;
u8 increase_time;
u8 window_size;
};
} __packed;
/*
* The conf version consists of 4 bytes. The two MSB are the wlcore
* version, the two LSB are the lower driver's private conf
* version.
*/
#define WLCORE_CONF_VERSION (0x0001 << 16)
#define WLCORE_CONF_MASK 0xffff0000
#define WLCORE_CONF_SIZE (sizeof(struct wlcore_conf_header) + \
sizeof(struct wlcore_conf))
struct wlcore_conf_header {
__le32 magic;
__le32 version;
__le32 checksum;
} __packed;
struct wlcore_conf {
struct conf_sg_settings sg;
......@@ -1269,6 +1304,12 @@ struct wlcore_conf {
struct conf_fwlog fwlog;
struct conf_rate_policy_settings rate;
struct conf_hangover_settings hangover;
};
} __packed;
struct wlcore_conf_file {
struct wlcore_conf_header header;
struct wlcore_conf core;
u8 priv[0];
} __packed;
#endif
drivers/net/wireless/ti/wlcore/debugfs.h
浏览文件 @ bf34e683
......@@ -26,8 +26,95 @@
#include "wlcore.h"
int wl1271_format_buffer(char __user *userbuf, size_t count,
loff_t *ppos, char *fmt, ...);
int wl1271_debugfs_init(struct wl1271 *wl);
void wl1271_debugfs_exit(struct wl1271 *wl);
void wl1271_debugfs_reset(struct wl1271 *wl);
void wl1271_debugfs_update_stats(struct wl1271 *wl);
#define DEBUGFS_FORMAT_BUFFER_SIZE 256
#define DEBUGFS_READONLY_FILE(name, fmt, value...) \
static ssize_t name## _read(struct file *file, char __user *userbuf, \
size_t count, loff_t *ppos) \
{ \
struct wl1271 *wl = file->private_data; \
return wl1271_format_buffer(userbuf, count, ppos, \
fmt "\n", ##value); \
} \
\
static const struct file_operations name## _ops = { \
.read = name## _read, \
.open = simple_open, \
.llseek = generic_file_llseek, \
};
#define DEBUGFS_ADD(name, parent) \
do { \
entry = debugfs_create_file(#name, 0400, parent, \
wl, &name## _ops); \
if (!entry || IS_ERR(entry)) \
goto err; \
} while (0);
#define DEBUGFS_ADD_PREFIX(prefix, name, parent) \
do { \
entry = debugfs_create_file(#name, 0400, parent, \
wl, &prefix## _## name## _ops); \
if (!entry || IS_ERR(entry)) \
goto err; \
} while (0);
#define DEBUGFS_FWSTATS_FILE(sub, name, fmt, struct_type) \
static ssize_t sub## _ ##name## _read(struct file *file, \
char __user *userbuf, \
size_t count, loff_t *ppos) \
{ \
struct wl1271 *wl = file->private_data; \
struct struct_type *stats = wl->stats.fw_stats; \
\
wl1271_debugfs_update_stats(wl); \
\
return wl1271_format_buffer(userbuf, count, ppos, fmt "\n", \
stats->sub.name); \
} \
\
static const struct file_operations sub## _ ##name## _ops = { \
.read = sub## _ ##name## _read, \
.open = simple_open, \
.llseek = generic_file_llseek, \
};
#define DEBUGFS_FWSTATS_FILE_ARRAY(sub, name, len, struct_type) \
static ssize_t sub## _ ##name## _read(struct file *file, \
char __user *userbuf, \
size_t count, loff_t *ppos) \
{ \
struct wl1271 *wl = file->private_data; \
struct struct_type *stats = wl->stats.fw_stats; \
char buf[DEBUGFS_FORMAT_BUFFER_SIZE] = ""; \
int res, i; \
\
wl1271_debugfs_update_stats(wl); \
\
for (i = 0; i < len; i++) \
res = snprintf(buf, sizeof(buf), "%s[%d] = %d\n", \
buf, i, stats->sub.name[i]); \
\
return wl1271_format_buffer(userbuf, count, ppos, "%s", buf); \
} \
\
static const struct file_operations sub## _ ##name## _ops = { \
.read = sub## _ ##name## _read, \
.open = simple_open, \
.llseek = generic_file_llseek, \
};
#define DEBUGFS_FWSTATS_ADD(sub, name) \
DEBUGFS_ADD(sub## _ ##name, stats)
#endif /* WL1271_DEBUGFS_H */
drivers/net/wireless/ti/wlcore/event.c
浏览文件 @ bf34e683
......@@ -148,15 +148,33 @@ static int wl1271_event_process(struct wl1271 *wl)
int delay = wl->conf.conn.synch_fail_thold *
wl->conf.conn.bss_lose_timeout;
wl1271_info("Beacon loss detected.");
cancel_delayed_work_sync(&wl->connection_loss_work);
/*
* if the work is already queued, it should take place. We
* don't want to delay the connection loss indication
* any more.
*/
ieee80211_queue_delayed_work(wl->hw, &wl->connection_loss_work,
msecs_to_jiffies(delay));
msecs_to_jiffies(delay));
wl12xx_for_each_wlvif_sta(wl, wlvif) {
vif = wl12xx_wlvif_to_vif(wlvif);
ieee80211_cqm_rssi_notify(
vif,
NL80211_CQM_RSSI_BEACON_LOSS_EVENT,
GFP_KERNEL);
}
}
if (vector & REGAINED_BSS_EVENT_ID) {
/* TODO: check for multi-role */
wl1271_info("Beacon regained.");
cancel_delayed_work_sync(&wl->connection_loss_work);
cancel_delayed_work(&wl->connection_loss_work);
/* sanity check - we can't lose and gain the beacon together */
WARN(vector & BSS_LOSE_EVENT_ID,
"Concurrent beacon loss and gain from FW");
}
if (vector & RSSI_SNR_TRIGGER_0_EVENT_ID) {
......
drivers/net/wireless/ti/wlcore/init.c
浏览文件 @ bf34e683
......@@ -460,6 +460,9 @@ int wl1271_init_ap_rates(struct wl1271 *wl, struct wl12xx_vif *wlvif)
/* unconditionally enable HT rates */
supported_rates |= CONF_TX_MCS_RATES;
/* get extra MIMO or wide-chan rates where the HW supports it */
supported_rates |= wlcore_hw_ap_get_mimo_wide_rate_mask(wl, wlvif);
/* configure unicast TX rate classes */
for (i = 0; i < wl->conf.tx.ac_conf_count; i++) {
rc.enabled_rates = supported_rates;
......
drivers/net/wireless/ti/wlcore/ps.c
浏览文件 @ bf34e683
此差异已折叠。
drivers/net/wireless/ti/wlcore/rx.c
浏览文件 @ bf34e683
此差异已折叠。
drivers/net/wireless/ti/wlcore/rx.h
浏览文件 @ bf34e683
......@@ -38,8 +38,6 @@
#define RX_DESC_PACKETID_SHIFT 11
#define RX_MAX_PACKET_ID 3
#define NUM_RX_PKT_DESC_MOD_MASK 7
#define RX_DESC_VALID_FCS 0x0001
#define RX_DESC_MATCH_RXADDR1 0x0002
#define RX_DESC_MCAST 0x0004
......@@ -102,6 +100,9 @@
/* If set, the start of IP payload is not 4 bytes aligned */
#define RX_BUF_UNALIGNED_PAYLOAD BIT(20)
/* If set, the buffer was padded by the FW to be 4 bytes aligned */
#define RX_BUF_PADDED_PAYLOAD BIT(30)
/* Describes the alignment state of a Rx buffer */
enum wl_rx_buf_align {
WLCORE_RX_BUF_ALIGNED,
......@@ -136,7 +137,7 @@ struct wl1271_rx_descriptor {
u8 reserved;
} __packed;
void wl12xx_rx(struct wl1271 *wl, struct wl_fw_status *status);
void wl12xx_rx(struct wl1271 *wl, struct wl_fw_status_1 *status);
u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);
int wl1271_rx_filter_enable(struct wl1271 *wl,
int index, bool enable,
......
drivers/net/wireless/ti/wlcore/tx.c
浏览文件 @ bf34e683
此差异已折叠。
drivers/net/wireless/ti/wlcore/tx.h
浏览文件 @ bf34e683
此差异已折叠。
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