RDMA/hns: Fix incorrect vlan enable bit in QPC

mainline inclusion
from mainline-v5.12-rc1
commit e7c07d5e
category: bugfix
bugzilla: 174002
CVE:NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e7c07d5e0750e921d60e63dd181886c479a0ee19

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The QPC_RQ/SQ_VLAN_EN bit in QPC should be enabled, not the QPC mask.

Fixes: f0cb411a ("RDMA/hns: Use new interface to modify QP context")
Link: https://lore.kernel.org/r/1624438201-11915-1-git-send-email-liweihang@huawei.comSigned-off-by: NWeihang Li <liweihang@huawei.com>
Signed-off-by: NJason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Nwangsirong <wangsirong@huawei.com>
Reviewed-by: NChunZhi Hu <huchunzhi@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

@@ -4658,9 +4658,9 @@ static int hns_roce_v2_set_path(struct ib_qp *ibqp,
 	/* Only HIP08 needs to set the vlan_en bits in QPC */
 	if (vlan_id < VLAN_N_VID &&
 	    hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08) {
-		hr_reg_enable(qpc_mask, QPC_RQ_VLAN_EN);
+		hr_reg_enable(context, QPC_RQ_VLAN_EN);
 		hr_reg_clear(qpc_mask, QPC_RQ_VLAN_EN);
-		hr_reg_enable(qpc_mask, QPC_SQ_VLAN_EN);
+		hr_reg_enable(context, QPC_SQ_VLAN_EN);
 		hr_reg_clear(qpc_mask, QPC_SQ_VLAN_EN);
 	}