提交 be1c1521 编写于 作者: J Jiantao Xiao

Revert "net: hns3: support wake on lan configuration and query"

driver inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I7ON9Y
CVE: NA

----------------------------------------------------------------------

This reverts commit c3c5f044.
Signed-off-by: NJiantao Xiao <xiaojiantao1@h-partners.com>
上级 aeb528f9
......@@ -101,7 +101,6 @@ enum HNAE3_DEV_CAP_BITS {
HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,
HNAE3_DEV_SUPPORT_CQ_B,
HNAE3_DEV_SUPPORT_LANE_NUM_B,
HNAE3_DEV_SUPPORT_WOL_B,
HNAE3_DEV_SUPPORT_VF_FAULT_B,
HNAE3_DEV_SUPPORT_NOTIFY_PKT_B,
};
......@@ -169,9 +168,6 @@ enum HNAE3_DEV_CAP_BITS {
#define hnae3_ae_dev_lane_num_supported(ae_dev) \
test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps)
#define hnae3_ae_dev_wol_supported(ae_dev) \
test_bit(HNAE3_DEV_SUPPORT_WOL_B, (ae_dev)->caps)
#define hnae3_ae_dev_vf_fault_supported(ae_dev) \
test_bit(HNAE3_DEV_SUPPORT_VF_FAULT_B, (ae_dev)->caps)
......@@ -582,10 +578,6 @@ struct hnae3_ae_dev {
* Get phc info
* clean_vf_config
* Clean residual vf info after disable sriov
* get_wol
* Get wake on lan info
* set_wol
* Config wake on lan
*/
struct hnae3_ae_ops {
int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
......@@ -783,10 +775,6 @@ struct hnae3_ae_ops {
void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs);
int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp,
u8 *tc_map_mode, u8 *priority);
void (*get_wol)(struct hnae3_handle *handle,
struct ethtool_wolinfo *wol);
int (*set_wol)(struct hnae3_handle *handle,
struct ethtool_wolinfo *wol);
int (*priv_ops)(struct hnae3_handle *handle, int opcode,
void *data, size_t length);
};
......
......@@ -154,7 +154,6 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = {
{HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B},
{HCLGE_COMM_CAP_FD_B, HNAE3_DEV_SUPPORT_FD_B},
{HCLGE_COMM_CAP_LANE_NUM_B, HNAE3_DEV_SUPPORT_LANE_NUM_B},
{HCLGE_COMM_CAP_WOL_B, HNAE3_DEV_SUPPORT_WOL_B},
{HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B},
{HCLGE_COMM_CAP_NOTIFY_PKT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B},
};
......
......@@ -295,8 +295,6 @@ enum hclge_opcode_type {
HCLGE_PPP_CMD0_INT_CMD = 0x2100,
HCLGE_PPP_CMD1_INT_CMD = 0x2101,
HCLGE_MAC_ETHERTYPE_IDX_RD = 0x2105,
HCLGE_OPC_WOL_CFG = 0x2200,
HCLGE_OPC_WOL_GET_SUPPORTED_MODE = 0x2201,
HCLGE_NCSI_INT_EN = 0x2401,
/* ROH MAC commands */
......@@ -348,7 +346,6 @@ enum HCLGE_COMM_CAP_BITS {
HCLGE_COMM_CAP_FD_B = 21,
HCLGE_COMM_CAP_VF_FAULT_B = 26,
HCLGE_COMM_CAP_LANE_NUM_B = 27,
HCLGE_COMM_CAP_WOL_B = 28,
HCLGE_COMM_CAP_NOTIFY_PKT_B = 29,
};
......
......@@ -2042,31 +2042,6 @@ static int hns3_get_link_ext_state(struct net_device *netdev,
return -ENODATA;
}
static void hns3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
{
struct hnae3_handle *handle = hns3_get_handle(netdev);
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->get_wol)
return;
ops->get_wol(handle, wol);
}
static int hns3_set_wol(struct net_device *netdev,
struct ethtool_wolinfo *wol)
{
struct hnae3_handle *handle = hns3_get_handle(netdev);
struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->set_wol)
return -EOPNOTSUPP;
return ops->set_wol(handle, wol);
}
static const struct ethtool_ops hns3vf_ethtool_ops = {
.supported_coalesce_params = HNS3_ETHTOOL_COALESCE,
.supported_ring_params = HNS3_ETHTOOL_RING,
......@@ -2141,8 +2116,6 @@ static const struct ethtool_ops hns3_ethtool_ops = {
.set_tunable = hns3_set_tunable,
.reset = hns3_set_reset,
.get_link_ext_state = hns3_get_link_ext_state,
.get_wol = hns3_get_wol,
.set_wol = hns3_set_wol,
};
void hns3_ethtool_set_ops(struct net_device *netdev)
......
......@@ -898,30 +898,6 @@ struct hclge_phy_reg_cmd {
u8 rsv2[12];
};
enum HCLGE_WOL_MODE {
HCLGE_WOL_PHY = BIT(0),
HCLGE_WOL_UNICAST = BIT(1),
HCLGE_WOL_MULTICAST = BIT(2),
HCLGE_WOL_BROADCAST = BIT(3),
HCLGE_WOL_ARP = BIT(4),
HCLGE_WOL_MAGIC = BIT(5),
HCLGE_WOL_MAGICSECURED = BIT(6),
HCLGE_WOL_FILTER = BIT(7),
HCLGE_WOL_DISABLE = 0,
};
struct hclge_wol_cfg_cmd {
__le32 wake_on_lan_mode;
u8 sopass[SOPASS_MAX];
u8 sopass_size;
u8 rsv[13];
};
struct hclge_query_wol_supported_cmd {
__le32 supported_wake_mode;
u8 rsv[20];
};
struct hclge_hw;
int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num);
enum hclge_comm_cmd_status hclge_cmd_mdio_write(struct hclge_hw *hw,
......
......@@ -12074,199 +12074,6 @@ static void hclge_uninit_rxd_adv_layout(struct hclge_dev *hdev)
hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 0);
}
static __u32 hclge_wol_mode_to_ethtool(u32 mode)
{
__u32 ret = 0;
if (mode & HCLGE_WOL_PHY)
ret |= WAKE_PHY;
if (mode & HCLGE_WOL_UNICAST)
ret |= WAKE_UCAST;
if (mode & HCLGE_WOL_MULTICAST)
ret |= WAKE_MCAST;
if (mode & HCLGE_WOL_BROADCAST)
ret |= WAKE_BCAST;
if (mode & HCLGE_WOL_ARP)
ret |= WAKE_ARP;
if (mode & HCLGE_WOL_MAGIC)
ret |= WAKE_MAGIC;
if (mode & HCLGE_WOL_MAGICSECURED)
ret |= WAKE_MAGICSECURE;
if (mode & HCLGE_WOL_FILTER)
ret |= WAKE_FILTER;
return ret;
}
static u32 hclge_wol_mode_from_ethtool(__u32 mode)
{
u32 ret = HCLGE_WOL_DISABLE;
if (mode & WAKE_PHY)
ret |= HCLGE_WOL_PHY;
if (mode & WAKE_UCAST)
ret |= HCLGE_WOL_UNICAST;
if (mode & WAKE_MCAST)
ret |= HCLGE_WOL_MULTICAST;
if (mode & WAKE_BCAST)
ret |= HCLGE_WOL_BROADCAST;
if (mode & WAKE_ARP)
ret |= HCLGE_WOL_ARP;
if (mode & WAKE_MAGIC)
ret |= HCLGE_WOL_MAGIC;
if (mode & WAKE_MAGICSECURE)
ret |= HCLGE_WOL_MAGICSECURED;
if (mode & WAKE_FILTER)
ret |= HCLGE_WOL_FILTER;
return ret;
}
int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported)
{
struct hclge_query_wol_supported_cmd *wol_supported_cmd;
struct hclge_desc desc;
int ret;
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_GET_SUPPORTED_MODE,
true);
wol_supported_cmd = (struct hclge_query_wol_supported_cmd *)&desc.data;
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to query wol supported, ret = %d\n", ret);
return ret;
}
*wol_supported = le32_to_cpu(wol_supported_cmd->supported_wake_mode);
return 0;
}
int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode)
{
struct hclge_wol_cfg_cmd *wol_cfg_cmd;
struct hclge_desc desc;
int ret;
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, true);
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
if (ret) {
dev_err(&hdev->pdev->dev,
"failed to get wol config, ret = %d\n", ret);
return ret;
}
wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)&desc.data;
*mode = le32_to_cpu(wol_cfg_cmd->wake_on_lan_mode);
return 0;
}
static int hclge_set_wol_cfg(struct hclge_dev *hdev,
struct hclge_wol_info *wol_info)
{
struct hclge_wol_cfg_cmd *wol_cfg_cmd;
struct hclge_desc desc;
int ret;
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_WOL_CFG, false);
wol_cfg_cmd = (struct hclge_wol_cfg_cmd *)&desc.data;
wol_cfg_cmd->wake_on_lan_mode = cpu_to_le32(wol_info->wol_current_mode);
wol_cfg_cmd->sopass_size = wol_info->wol_sopass_size;
memcpy(&wol_cfg_cmd->sopass, wol_info->wol_sopass, SOPASS_MAX);
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
if (ret)
dev_err(&hdev->pdev->dev,
"failed to set wol config, ret = %d\n", ret);
return ret;
}
static int hclge_update_wol(struct hclge_dev *hdev)
{
struct hclge_wol_info *wol_info = &hdev->hw.mac.wol;
if (!hnae3_ae_dev_wol_supported(hdev->ae_dev))
return 0;
return hclge_set_wol_cfg(hdev, wol_info);
}
static int hclge_init_wol(struct hclge_dev *hdev)
{
struct hclge_wol_info *wol_info = &hdev->hw.mac.wol;
int ret;
if (!hnae3_ae_dev_wol_supported(hdev->ae_dev))
return 0;
memset(wol_info, 0, sizeof(struct hclge_wol_info));
ret = hclge_get_wol_supported_mode(hdev,
&wol_info->wol_support_mode);
if (ret) {
wol_info->wol_support_mode = HCLGE_WOL_DISABLE;
return ret;
}
return hclge_update_wol(hdev);
}
static void hclge_get_wol(struct hnae3_handle *handle,
struct ethtool_wolinfo *wol)
{
struct hclge_vport *vport = hclge_get_vport(handle);
struct hclge_dev *hdev = vport->back;
struct hclge_wol_info *wol_info = &hdev->hw.mac.wol;
wol->supported = hclge_wol_mode_to_ethtool(wol_info->wol_support_mode);
wol->wolopts =
hclge_wol_mode_to_ethtool(wol_info->wol_current_mode);
if (wol_info->wol_current_mode & HCLGE_WOL_MAGICSECURED)
memcpy(&wol->sopass, wol_info->wol_sopass, SOPASS_MAX);
}
static int hclge_set_wol(struct hnae3_handle *handle,
struct ethtool_wolinfo *wol)
{
struct hclge_vport *vport = hclge_get_vport(handle);
struct hclge_dev *hdev = vport->back;
struct hclge_wol_info *wol_info = &hdev->hw.mac.wol;
u32 wol_supported;
u32 wol_mode;
wol_supported = hclge_wol_mode_from_ethtool(wol->supported);
wol_mode = hclge_wol_mode_from_ethtool(wol->wolopts);
if (wol_mode & ~wol_supported)
return -EINVAL;
wol_info->wol_current_mode = wol_mode;
if (wol_mode & HCLGE_WOL_MAGICSECURED) {
memcpy(wol_info->wol_sopass, &wol->sopass, SOPASS_MAX);
wol_info->wol_sopass_size = SOPASS_MAX;
} else {
wol_info->wol_sopass_size = 0;
}
return hclge_set_wol_cfg(hdev, wol_info);
}
static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
{
struct pci_dev *pdev = ae_dev->pdev;
......@@ -12469,11 +12276,6 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
/* Enable MISC vector(vector0) */
hclge_enable_vector(&hdev->misc_vector, true);
ret = hclge_init_wol(hdev);
if (ret)
dev_warn(&pdev->dev,
"failed to wake on lan init, ret = %d\n", ret);
hclge_state_init(hdev);
hdev->last_reset_time = jiffies;
......@@ -12856,8 +12658,6 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev)
hclge_init_rxd_adv_layout(hdev);
(void)hclge_update_wol(hdev);
dev_info(&pdev->dev, "Reset done, %s driver initialization finished.\n",
HCLGE_DRIVER_NAME);
......@@ -13904,8 +13704,6 @@ struct hnae3_ae_ops hclge_ops = {
.get_link_diagnosis_info = hclge_get_link_diagnosis_info,
.clean_vf_config = hclge_clean_vport_config,
.get_dscp_prio = hclge_get_dscp_prio,
.get_wol = hclge_get_wol,
.set_wol = hclge_set_wol,
.priv_ops = hclge_ext_ops_handle,
};
......
......@@ -252,13 +252,6 @@ enum HCLGE_MAC_DUPLEX {
#define QUERY_SFP_SPEED 0
#define QUERY_ACTIVE_SPEED 1
struct hclge_wol_info {
u32 wol_support_mode; /* store the wake on lan info */
u32 wol_current_mode;
u8 wol_sopass[SOPASS_MAX];
u8 wol_sopass_size;
};
struct hclge_mac {
u8 mac_id;
u8 phy_addr;
......@@ -278,7 +271,6 @@ struct hclge_mac {
u32 user_fec_mode;
u32 fec_ability;
int link; /* store the link status of mac & phy (if phy exists) */
struct hclge_wol_info wol;
struct phy_device *phydev;
struct mii_bus *mdio_bus;
phy_interface_t phy_if;
......@@ -1156,8 +1148,6 @@ int hclge_register_sysfs(struct hclge_dev *hdev);
void hclge_unregister_sysfs(struct hclge_dev *hdev);
int hclge_cfg_mac_speed_dup_hw(struct hclge_dev *hdev, int speed, u8 duplex,
u8 lane_num);
int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported);
int hclge_get_wol_cfg(struct hclge_dev *hdev, u32 *mode);
struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf);
int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type);
void hclge_reset_task_schedule(struct hclge_dev *hdev);
......
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