irqchip: Add Layerscape SCFG MSI controller support
Some kind of Freescale Layerscape SoC provides a MSI implementation which uses two SCFG registers MSIIR and MSIR to support 32 MSI interrupts for each PCIe controller. The patch is to support it. Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com> Tested-by: NAlexander Stein <alexander.stein@systec-electronic.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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drivers/irqchip/irq-ls-scfg-msi.c
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