提交 b822039b 编写于 作者: M Michal Simek 提交者: Wolfram Sang

i2c: xiic: Fix coding style issues

Most of these stuff are reported by checkpatch.
But fixes are:
- Incorrect indetation
- Missing blank line after variable declaration
- Additional ()
- Missing spaces around +
- Missing parenthesis when if has them
- Newlines
- Remove MODULE_ALIAS - none is really using it
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: NWolfram Sang <wsa@kernel.org>
上级 8fa9c938
...@@ -78,24 +78,23 @@ struct xiic_i2c { ...@@ -78,24 +78,23 @@ struct xiic_i2c {
bool singlemaster; bool singlemaster;
}; };
#define XIIC_MSB_OFFSET 0 #define XIIC_MSB_OFFSET 0
#define XIIC_REG_OFFSET (0x100+XIIC_MSB_OFFSET) #define XIIC_REG_OFFSET (0x100 + XIIC_MSB_OFFSET)
/* /*
* Register offsets in bytes from RegisterBase. Three is added to the * Register offsets in bytes from RegisterBase. Three is added to the
* base offset to access LSB (IBM style) of the word * base offset to access LSB (IBM style) of the word
*/ */
#define XIIC_CR_REG_OFFSET (0x00+XIIC_REG_OFFSET) /* Control Register */ #define XIIC_CR_REG_OFFSET (0x00 + XIIC_REG_OFFSET) /* Control Register */
#define XIIC_SR_REG_OFFSET (0x04+XIIC_REG_OFFSET) /* Status Register */ #define XIIC_SR_REG_OFFSET (0x04 + XIIC_REG_OFFSET) /* Status Register */
#define XIIC_DTR_REG_OFFSET (0x08+XIIC_REG_OFFSET) /* Data Tx Register */ #define XIIC_DTR_REG_OFFSET (0x08 + XIIC_REG_OFFSET) /* Data Tx Register */
#define XIIC_DRR_REG_OFFSET (0x0C+XIIC_REG_OFFSET) /* Data Rx Register */ #define XIIC_DRR_REG_OFFSET (0x0C + XIIC_REG_OFFSET) /* Data Rx Register */
#define XIIC_ADR_REG_OFFSET (0x10+XIIC_REG_OFFSET) /* Address Register */ #define XIIC_ADR_REG_OFFSET (0x10 + XIIC_REG_OFFSET) /* Address Register */
#define XIIC_TFO_REG_OFFSET (0x14+XIIC_REG_OFFSET) /* Tx FIFO Occupancy */ #define XIIC_TFO_REG_OFFSET (0x14 + XIIC_REG_OFFSET) /* Tx FIFO Occupancy */
#define XIIC_RFO_REG_OFFSET (0x18+XIIC_REG_OFFSET) /* Rx FIFO Occupancy */ #define XIIC_RFO_REG_OFFSET (0x18 + XIIC_REG_OFFSET) /* Rx FIFO Occupancy */
#define XIIC_TBA_REG_OFFSET (0x1C+XIIC_REG_OFFSET) /* 10 Bit Address reg */ #define XIIC_TBA_REG_OFFSET (0x1C + XIIC_REG_OFFSET) /* 10 Bit Address reg */
#define XIIC_RFD_REG_OFFSET (0x20+XIIC_REG_OFFSET) /* Rx FIFO Depth reg */ #define XIIC_RFD_REG_OFFSET (0x20 + XIIC_REG_OFFSET) /* Rx FIFO Depth reg */
#define XIIC_GPO_REG_OFFSET (0x24+XIIC_REG_OFFSET) /* Output Register */ #define XIIC_GPO_REG_OFFSET (0x24 + XIIC_REG_OFFSET) /* Output Register */
/* Control Register masks */ /* Control Register masks */
#define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */ #define XIIC_CR_ENABLE_DEVICE_MASK 0x01 /* Device enable = 1 */
...@@ -233,18 +232,21 @@ static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg) ...@@ -233,18 +232,21 @@ static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg)
static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask) static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask)
{ {
u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask); xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask);
} }
static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask) static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask)
{ {
u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET);
xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask); xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask);
} }
static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask) static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask)
{ {
u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET);
xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask);
} }
...@@ -355,7 +357,8 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) ...@@ -355,7 +357,8 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c)
while (len--) { while (len--) {
u16 data = i2c->tx_msg->buf[i2c->tx_pos++]; u16 data = i2c->tx_msg->buf[i2c->tx_pos++];
if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) {
if (!xiic_tx_space(i2c) && i2c->nmsgs == 1) {
/* last message in transfer -> STOP */ /* last message in transfer -> STOP */
data |= XIIC_TX_DYN_STOP_MASK; data |= XIIC_TX_DYN_STOP_MASK;
dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
...@@ -402,8 +405,8 @@ static irqreturn_t xiic_process(int irq, void *dev_id) ...@@ -402,8 +405,8 @@ static irqreturn_t xiic_process(int irq, void *dev_id)
/* Service requesting interrupt */ /* Service requesting interrupt */
if ((pend & XIIC_INTR_ARB_LOST_MASK) || if ((pend & XIIC_INTR_ARB_LOST_MASK) ||
((pend & XIIC_INTR_TX_ERROR_MASK) && ((pend & XIIC_INTR_TX_ERROR_MASK) &&
!(pend & XIIC_INTR_RX_FULL_MASK))) { !(pend & XIIC_INTR_RX_FULL_MASK))) {
/* bus arbritration lost, or... /* bus arbritration lost, or...
* Transmit error _OR_ RX completed * Transmit error _OR_ RX completed
* if this happens when RX_FULL is not set * if this happens when RX_FULL is not set
...@@ -641,6 +644,7 @@ static void xiic_start_send(struct xiic_i2c *i2c) ...@@ -641,6 +644,7 @@ static void xiic_start_send(struct xiic_i2c *i2c)
static void __xiic_start_xfer(struct xiic_i2c *i2c) static void __xiic_start_xfer(struct xiic_i2c *i2c)
{ {
int fifo_space = xiic_tx_fifo_space(i2c); int fifo_space = xiic_tx_fifo_space(i2c);
dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n",
__func__, i2c->tx_msg, fifo_space); __func__, i2c->tx_msg, fifo_space);
...@@ -742,7 +746,6 @@ static const struct i2c_adapter xiic_adapter = { ...@@ -742,7 +746,6 @@ static const struct i2c_adapter xiic_adapter = {
.quirks = &xiic_quirks, .quirks = &xiic_quirks,
}; };
static int xiic_i2c_probe(struct platform_device *pdev) static int xiic_i2c_probe(struct platform_device *pdev)
{ {
struct xiic_i2c *i2c; struct xiic_i2c *i2c;
...@@ -902,6 +905,7 @@ static const struct dev_pm_ops xiic_dev_pm_ops = { ...@@ -902,6 +905,7 @@ static const struct dev_pm_ops xiic_dev_pm_ops = {
SET_RUNTIME_PM_OPS(xiic_i2c_runtime_suspend, SET_RUNTIME_PM_OPS(xiic_i2c_runtime_suspend,
xiic_i2c_runtime_resume, NULL) xiic_i2c_runtime_resume, NULL)
}; };
static struct platform_driver xiic_i2c_driver = { static struct platform_driver xiic_i2c_driver = {
.probe = xiic_i2c_probe, .probe = xiic_i2c_probe,
.remove = xiic_i2c_remove, .remove = xiic_i2c_remove,
...@@ -917,4 +921,3 @@ module_platform_driver(xiic_i2c_driver); ...@@ -917,4 +921,3 @@ module_platform_driver(xiic_i2c_driver);
MODULE_AUTHOR("info@mocean-labs.com"); MODULE_AUTHOR("info@mocean-labs.com");
MODULE_DESCRIPTION("Xilinx I2C bus driver"); MODULE_DESCRIPTION("Xilinx I2C bus driver");
MODULE_LICENSE("GPL v2"); MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:"DRIVER_NAME);
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