提交 b810641a 编写于 作者: A Abel Vesa 提交者: Shawn Guo

arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores

The clocks and their latencies will be used by cpufreq-dt.
Signed-off-by: NAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
上级 f54f7be5
无相关合并请求
......@@ -87,6 +87,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
......@@ -95,6 +97,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
......@@ -103,6 +107,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x2>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
......@@ -111,6 +117,8 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x3>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MQ_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
};
......
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