提交 b27aafed 编写于 作者: M Mark Brown

Merge remote-tracking branch 'asoc/topic/doc' into asoc-next

......@@ -48,10 +48,25 @@ struct snd_compr_stream;
#define SND_SOC_DAIFMT_GATED (0 << 4) /* clock is gated */
/*
* DAI hardware signal inversions.
* DAI hardware signal polarity.
*
* Specifies whether the DAI can also support inverted clocks for the specified
* format.
*
* BCLK:
* - "normal" polarity means signal is available at rising edge of BCLK
* - "inverted" polarity means signal is available at falling edge of BCLK
*
* FSYNC "normal" polarity depends on the frame format:
* - I2S: frame consists of left then right channel data. Left channel starts
* with falling FSYNC edge, right channel starts with rising FSYNC edge.
* - Left/Right Justified: frame consists of left then right channel data.
* Left channel starts with rising FSYNC edge, right channel starts with
* falling FSYNC edge.
* - DSP A/B: Frame starts with rising FSYNC edge.
* - AC97: Frame starts with rising FSYNC edge.
*
* "Negative" FSYNC polarity is the one opposite of "normal" polarity.
*/
#define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bit clock + frame */
#define SND_SOC_DAIFMT_NB_IF (2 << 8) /* normal BCLK + inv FRM */
......
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