提交 b07fed45 编写于 作者: D Dong Aisheng 提交者: Shawn Guo

ARM: mx28evk: set a initial clock rate for saif

Signed-off-by: NDong Aisheng <b29396@freescale.com>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Liam Girdwood <lrg@ti.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
上级 4c0174c5
......@@ -814,6 +814,15 @@ int __init mx28_clocks_init(void)
clk_set_parent(&saif0_clk, &pll0_clk);
clk_set_parent(&saif1_clk, &pll0_clk);
/*
* Set an initial clock rate for the saif internal logic to work
* properly. This is important when working in EXTMASTER mode that
* uses the other saif's BITCLK&LRCLK but it still needs a basic
* clock which should be fast enough for the internal logic.
*/
clk_set_rate(&saif0_clk, 24000000);
clk_set_rate(&saif1_clk, 24000000);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);
......
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