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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM Devicetree updates from Olof Johansson:
 "We continue to see a lot of new material. I've highlighted some of it
  below, but there's been more beyond that as well.

  One of the sweeping changes is that many boards have seen their ARM
  Mali GPU devices added to device trees, since the DRM drivers have now
  been merged.

  So, with the caveat that I have surely missed several great
  contributions, here's a collection of the material this time around:

  New SoCs:

   - Mediatek mt8183 (4x Cortex-A73 + 4x Cortex-A53)

   - TI J721E (2x Cortex-A72 + 3x Cortex-R5F + 3 DSPs + MMA)

   - Amlogic G12B (4x Cortex-A73 + 2x Cortex-A53)

  New Boards / platforms:

   - Aspeed BMC support for a number of new server platforms

   - Kontron SMARC SoM (several i.MX6 versions)

   - Novtech's Meerkat96 (i.MX7)

   - ST Micro Avenger96 board

   - Hardkernel ODROID-N2 (Amlogic G12B)

   - Purism Librem5 devkit (i.MX8MQ)

   - Google Cheza (Qualcomm SDM845)

   - Qualcomm Dragonboard 845c (Qualcomm SDM845)

   - Hugsun X99 TV Box (Rockchip RK3399)

   - Khadas Edge/Edge-V/Captain (Rockchip RK3399)

  Updated / expanded boards and platforms:

   - Renesas r7s9210 has a lot of new peripherals added

   - Fixes and polish for Rockchip-based Chromebooks

   - Amlogic G12A has a lot of peripherals added

   - Nvidia Jetson Nano sees various fixes and improvements, and is now
     at feature parity with TX1"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (586 commits)
  ARM: dts: gemini: Set DIR-685 SPI CS as active low
  ARM: dts: exynos: Adjust buck[78] regulators to supported values on Arndale Octa
  ARM: dts: exynos: Adjust buck[78] regulators to supported values on Odroid XU3 family
  ARM: dts: exynos: Move Mali400 GPU node to "/soc"
  ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210
  arm64: dts: qcom: qcs404: Add missing space for cooling-cells property
  arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphire
  arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs
  arm64: dts: rockchip: enable rk3328 watchdog clock
  ARM: dts: rockchip: add display nodes for rk322x
  ARM: dts: rockchip: fix vop iommu-cells on rk322x
  arm64: dts: rockchip: Add support for Hugsun X99 TV Box
  arm64: dts: rockchip: Define values for the IPA governor for rock960
  arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsi
  arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCs
  arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance.
  Revert "ARM: dts: rockchip: set PWM delay backlight settings for Minnie"
  ARM: dts: rockchip: Configure BT_DEV_WAKE in on rk3288-veyron
  arm64: dts: qcom: sdm845-cheza: add initial cheza dt
  ARM: dts: msm8974-FP2: Add vibration motor
  ...
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Documentation/devicetree/bindings/arm/amlogic.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
Amlogic MesonX device tree bindings
-------------------------------------------
Work in progress statement:
Device tree files and bindings applying to Amlogic SoCs and boards are
considered "unstable". Any Amlogic device tree binding may change at
any time. Be sure to use a device tree binary and a kernel image
generated from the same source tree.
Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
stable binding/ABI.
---------------------------------------------------------------
Boards with the Amlogic Meson6 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson6"
Boards with the Amlogic Meson8 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson8";
Boards with the Amlogic Meson8b SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson8b";
Boards with the Amlogic Meson8m2 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson8m2";
Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson-gxbb";
Boards with the Amlogic Meson GXL S905X SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s905x", "amlogic,meson-gxl";
Boards with the Amlogic Meson GXL S905D SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s905d", "amlogic,meson-gxl";
Boards with the Amlogic Meson GXL S805X SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s805x", "amlogic,meson-gxl";
Boards with the Amlogic Meson GXL S905W SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s905w", "amlogic,meson-gxl";
Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s912", "amlogic,meson-gxm";
Boards with the Amlogic Meson AXG A113D SoC shall have the following properties:
Required root node property:
compatible: "amlogic,a113d", "amlogic,meson-axg";
Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,g12a";
Board compatible values (alphabetically, grouped by SoC):
- "geniatech,atv1200" (Meson6)
- "minix,neo-x8" (Meson8)
- "endless,ec100" (Meson8b)
- "hardkernel,odroid-c1" (Meson8b)
- "tronfy,mxq" (Meson8b)
- "tronsmart,mxiii-plus" (Meson8m2)
- "amlogic,p200" (Meson gxbb)
- "amlogic,p201" (Meson gxbb)
- "friendlyarm,nanopi-k2" (Meson gxbb)
- "hardkernel,odroid-c2" (Meson gxbb)
- "nexbox,a95x" (Meson gxbb or Meson gxl s905x)
- "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb)
- "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb)
- "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb)
- "wetek,hub" (Meson gxbb)
- "wetek,play2" (Meson gxbb)
- "amlogic,p212" (Meson gxl s905x)
- "hwacom,amazetv" (Meson gxl s905x)
- "khadas,vim" (Meson gxl s905x)
- "libretech,cc" (Meson gxl s905x)
- "amlogic,p230" (Meson gxl s905d)
- "amlogic,p231" (Meson gxl s905d)
- "phicomm,n1" (Meson gxl s905d)
- "amlogic,p241" (Meson gxl s805x)
- "libretech,aml-s805x-ac" (Meson gxl s805x)
- "amlogic,p281" (Meson gxl s905w)
- "oranth,tx3-mini" (Meson gxl s905w)
- "amlogic,q200" (Meson gxm s912)
- "amlogic,q201" (Meson gxm s912)
- "khadas,vim2" (Meson gxm s912)
- "kingnovel,r-box-pro" (Meson gxm S912)
- "nexbox,a1" (Meson gxm s912)
- "tronsmart,vega-s96" (Meson gxm s912)
- "amlogic,s400" (Meson axg a113d)
- "amlogic,u200" (Meson g12a s905d2)
- "amediatech,x96-max" (Meson g12a s905x2)
- "seirobotics,sei510" (Meson g12a s905x2)
Amlogic Meson Firmware registers Interface
------------------------------------------
The Meson SoCs have a register bank with status and data shared with the
secure firmware.
Required properties:
- compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
Properties should indentify components of this register interface :
Meson GX SoC Information
------------------------
A firmware register encodes the SoC type, package and revision information on
the Meson GX SoCs.
If present, the following property should be added :
Optional properties:
- amlogic,has-chip-id: If present, the interface gives the current SoC version.
Example
-------
ao-secure@140 {
compatible = "amlogic,meson-gx-ao-secure", "syscon";
reg = <0x0 0x140 0x0 0x140>;
amlogic,has-chip-id;
};
Documentation/devicetree/bindings/arm/amlogic.yaml 0 → 100644
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/amlogic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Amlogic MesonX device tree bindings
maintainers:
- Kevin Hilman <khilman@baylibre.com>
description: |+
Work in progress statement:
Device tree files and bindings applying to Amlogic SoCs and boards are
considered "unstable". Any Amlogic device tree binding may change at
any time. Be sure to use a device tree binary and a kernel image
generated from the same source tree.
Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
stable binding/ABI.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- description: Boards with the Amlogic Meson6 SoC
items:
- enum:
- geniatech,atv1200
- const: amlogic,meson6
- description: Boards with the Amlogic Meson8 SoC
items:
- enum:
- minix,neo-x8
- const: amlogic,meson8
- description: Boards with the Amlogic Meson8m2 SoC
items:
- enum:
- tronsmart,mxiii-plus
- const: amlogic,meson8m2
- description: Boards with the Amlogic Meson8b SoC
items:
- enum:
- endless,ec100
- hardkernel,odroid-c1
- tronfy,mxq
- const: amlogic,meson8b
- description: Boards with the Amlogic Meson GXBaby SoC
items:
- enum:
- amlogic,p200
- amlogic,p201
- friendlyarm,nanopi-k2
- hardkernel,odroid-c2
- nexbox,a95x
- wetek,hub
- wetek,play2
- const: amlogic,meson-gxbb
- description: Tronsmart Vega S95 devices
items:
- enum:
- tronsmart,vega-s95-pro
- tronsmart,vega-s95-meta
- tronsmart,vega-s95-telos
- const: tronsmart,vega-s95
- const: amlogic,meson-gxbb
- description: Boards with the Amlogic Meson GXL S805X SoC
items:
- enum:
- amlogic,p241
- libretech,aml-s805x-ac
- const: amlogic,s805x
- const: amlogic,meson-gxl
- description: Boards with the Amlogic Meson GXL S905W SoC
items:
- enum:
- amlogic,p281
- oranth,tx3-mini
- const: amlogic,s905w
- const: amlogic,meson-gxl
- description: Boards with the Amlogic Meson GXL S905X SoC
items:
- enum:
- amediatech,x96-max
- amlogic,p212
- hwacom,amazetv
- khadas,vim
- libretech,cc
- nexbox,a95x
- seirobotics,sei510
- const: amlogic,s905x
- const: amlogic,meson-gxl
- description: Boards with the Amlogic Meson GXL S905D SoC
items:
- enum:
- amlogic,p230
- amlogic,p231
- phicomm,n1
- const: amlogic,s905d
- const: amlogic,meson-gxl
- description: Boards with the Amlogic Meson GXM S912 SoC
items:
- enum:
- amlogic,q200
- amlogic,q201
- khadas,vim2
- kingnovel,r-box-pro
- nexbox,a1
- tronsmart,vega-s96
- const: amlogic,s912
- const: amlogic,meson-gxm
- description: Boards with the Amlogic Meson AXG A113D SoC
items:
- enum:
- amlogic,s400
- const: amlogic,a113d
- const: amlogic,meson-axg
- description: Boards with the Amlogic Meson G12A S905D2 SoC
items:
- enum:
- amlogic,u200
- const: amlogic,g12a
- description: Boards with the Amlogic Meson G12B S922X SoC
items:
- enum:
- hardkernel,odroid-n2
- const: amlogic,g12b
...
Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt 0 → 100644
浏览文件 @ af6af87d
Amlogic Meson Firmware registers Interface
------------------------------------------
The Meson SoCs have a register bank with status and data shared with the
secure firmware.
Required properties:
- compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
Properties should indentify components of this register interface :
Meson GX SoC Information
------------------------
A firmware register encodes the SoC type, package and revision information on
the Meson GX SoCs.
If present, the following property should be added :
Optional properties:
- amlogic,has-chip-id: If present, the interface gives the current SoC version.
Example
-------
ao-secure@140 {
compatible = "amlogic,meson-gx-ao-secure", "syscon";
reg = <0x0 0x140 0x0 0x140>;
amlogic,has-chip-id;
};
Documentation/devicetree/bindings/arm/atmel-at91.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
Atmel AT91 device tree bindings.
================================
Boards with a SoC of the Atmel AT91 or SMART family shall have the following
properties:
Required root node properties:
compatible: must be one of:
* "atmel,at91rm9200"
* "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
the specific SoC family or compatible:
o "atmel,at91sam9260"
o "atmel,at91sam9261"
o "atmel,at91sam9263"
o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
SoC compatible:
- "atmel,at91sam9g15"
- "atmel,at91sam9g25"
- "atmel,at91sam9g35"
- "atmel,at91sam9x25"
- "atmel,at91sam9x35"
o "atmel,at91sam9g20"
o "atmel,at91sam9g45"
o "atmel,at91sam9n12"
o "atmel,at91sam9rl"
o "atmel,at91sam9xe"
o "microchip,sam9x60"
* "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
SoC family:
o "atmel,sama5d2" shall be extended with the specific SoC compatible:
- "atmel,sama5d27"
o "atmel,sama5d3" shall be extended with the specific SoC compatible:
- "atmel,sama5d31"
- "atmel,sama5d33"
- "atmel,sama5d34"
- "atmel,sama5d35"
- "atmel,sama5d36"
o "atmel,sama5d4" shall be extended with the specific SoC compatible:
- "atmel,sama5d41"
- "atmel,sama5d42"
- "atmel,sama5d43"
- "atmel,sama5d44"
* "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
SoC family:
o "atmel,sams70" shall be extended with the specific MCU compatible:
- "atmel,sams70j19"
- "atmel,sams70j20"
- "atmel,sams70j21"
- "atmel,sams70n19"
- "atmel,sams70n20"
- "atmel,sams70n21"
- "atmel,sams70q19"
- "atmel,sams70q20"
- "atmel,sams70q21"
o "atmel,samv70" shall be extended with the specific MCU compatible:
- "atmel,samv70j19"
- "atmel,samv70j20"
- "atmel,samv70n19"
- "atmel,samv70n20"
- "atmel,samv70q19"
- "atmel,samv70q20"
o "atmel,samv71" shall be extended with the specific MCU compatible:
- "atmel,samv71j19"
- "atmel,samv71j20"
- "atmel,samv71j21"
- "atmel,samv71n19"
- "atmel,samv71n20"
- "atmel,samv71n21"
- "atmel,samv71q19"
- "atmel,samv71q20"
- "atmel,samv71q21"
Documentation/devicetree/bindings/arm/atmel-at91.yaml 0 → 100644
浏览文件 @ af6af87d
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/atmel-at91.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atmel AT91 device tree bindings.
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>
- Ludovic Desroches <ludovic.desroches@microchip.com>
description: |
Boards with a SoC of the Atmel AT91 or SMART family shall have the following
properties:
$nodename:
const: '/'
compatible:
oneOf:
- items:
- const: atmel,at91rm9200
- items:
- enum:
- olimex,sam9-l9260
- enum:
- atmel,at91sam9260
- atmel,at91sam9261
- atmel,at91sam9263
- atmel,at91sam9g20
- atmel,at91sam9g45
- atmel,at91sam9n12
- atmel,at91sam9rl
- atmel,at91sam9xe
- atmel,at91sam9x60
- const: atmel,at91sam9
- items:
- enum:
- atmel,at91sam9g15
- atmel,at91sam9g25
- atmel,at91sam9g35
- atmel,at91sam9x25
- atmel,at91sam9x35
- const: atmel,at91sam9x5
- const: atmel,at91sam9
- items:
- const: atmel,sama5d27
- const: atmel,sama5d2
- const: atmel,sama5
- description: Nattis v2 board with Natte v2 power board
items:
- const: axentia,nattis-2
- const: axentia,natte-2
- const: axentia,linea
- const: atmel,sama5d31
- const: atmel,sama5d3
- const: atmel,sama5
- description: TSE-850 v3 board
items:
- const: axentia,tse850v3
- const: axentia,linea
- const: atmel,sama5d31
- const: atmel,sama5d3
- const: atmel,sama5
- items:
- const: axentia,linea
- const: atmel,sama5d31
- const: atmel,sama5d3
- const: atmel,sama5
- items:
- enum:
- atmel,sama5d31
- atmel,sama5d33
- atmel,sama5d34
- atmel,sama5d35
- atmel,sama5d36
- const: atmel,sama5d3
- const: atmel,sama5
- items:
- enum:
- atmel,sama5d41
- atmel,sama5d42
- atmel,sama5d43
- atmel,sama5d44
- const: atmel,sama5d4
- const: atmel,sama5
- items:
- enum:
- atmel,sams70j19
- atmel,sams70j20
- atmel,sams70j21
- atmel,sams70n19
- atmel,sams70n20
- atmel,sams70n21
- atmel,sams70q19
- atmel,sams70q20
- atmel,sams70q21
- const: atmel,sams70
- const: atmel,samv7
- items:
- enum:
- atmel,samv70j19
- atmel,samv70j20
- atmel,samv70n19
- atmel,samv70n20
- atmel,samv70q19
- atmel,samv70q20
- const: atmel,samv70
- const: atmel,samv7
- items:
- enum:
- atmel,samv71j19
- atmel,samv71j20
- atmel,samv71j21
- atmel,samv71n19
- atmel,samv71n20
- atmel,samv71n21
- atmel,samv71q19
- atmel,samv71q20
- atmel,samv71q21
- const: atmel,samv71
- const: atmel,samv7
...
Documentation/devicetree/bindings/arm/emtrion.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
Emtrion Devicetree Bindings
===========================
emCON Series:
-------------
Required root node properties
- compatible:
- "emtrion,emcon-mx6", "fsl,imx6q"; : emCON-MX6D or emCON-MX6Q SoM
- "emtrion,emcon-mx6-avari", "fsl,imx6q"; : emCON-MX6D or emCON-MX6Q SoM on Avari Base
- "emtrion,emcon-mx6", "fsl,imx6dl"; : emCON-MX6S or emCON-MX6DL SoM
- "emtrion,emcon-mx6-avari", "fsl,imx6dl"; : emCON-MX6S or emCON-MX6DL SoM on Avari Base
Documentation/devicetree/bindings/arm/fsl.yaml
浏览文件 @ af6af87d
......@@ -15,6 +15,13 @@ properties:
const: '/'
compatible:
oneOf:
- description: i.MX1 based Boards
items:
- enum:
- armadeus,imx1-apf9328
- fsl,imx1ads
- const: fsl,imx1
- description: i.MX23 based Boards
items:
- enum:
......@@ -51,6 +58,25 @@ properties:
- const: i2se,duckbill-2
- const: fsl,imx28
- description: i.MX31 based Boards
items:
- enum:
- buglabs,imx31-bug
- logicpd,imx31-lite
- const: fsl,imx31
- description: i.MX35 based Boards
items:
- enum:
- fsl,imx35-pdk
- const: fsl,imx35
- description: i.MX35 Eukrea CPUIMX35 Board
items:
- const: eukrea,mbimxsd35-baseboard
- const: eukrea,cpuimx35
- const: fsl,imx35
- description: i.MX50 based Boards
items:
- enum:
......@@ -80,6 +106,8 @@ properties:
- description: i.MX6Q based Boards
items:
- enum:
- emtrion,emcon-mx6 # emCON-MX6D or emCON-MX6Q SoM
- emtrion,emcon-mx6-avari # emCON-MX6D or emCON-MX6Q SoM on Avari Base
- fsl,imx6q-arm2
- fsl,imx6q-sabreauto
- fsl,imx6q-sabrelite
......@@ -99,6 +127,8 @@ properties:
items:
- enum:
- eckelmann,imx6dl-ci4x10
- emtrion,emcon-mx6 # emCON-MX6S or emCON-MX6DL SoM
- emtrion,emcon-mx6-avari # emCON-MX6S or emCON-MX6DL SoM on Avari Base
- fsl,imx6dl-sabreauto # i.MX6 DualLite/Solo SABRE Automotive Board
- fsl,imx6dl-sabresd # i.MX6 DualLite SABRE Smart Device Board
- technologic,imx6dl-ts4900
......@@ -156,6 +186,7 @@ properties:
items:
- enum:
- fsl,imx7d-sdb # i.MX7 SabreSD Board
- novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board
- tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM
- zii,imx7d-rpu2 # ZII RPU2 Board
- const: fsl,imx7d
......@@ -171,12 +202,25 @@ properties:
- const: compulab,cl-som-imx7
- const: fsl,imx7d
- description: i.MX7ULP based Boards
items:
- enum:
- fsl,imx7ulp-evk # i.MX7ULP Evaluation Kit
- const: fsl,imx7ulp
- description: i.MX8MM based Boards
items:
- enum:
- fsl,imx8mm-evk # i.MX8MM EVK Board
- const: fsl,imx8mm
- description: i.MX8MQ based Boards
items:
- enum:
- fsl,imx8mq-evk # i.MX8MQ EVK Board
- purism,librem5-devkit # Purism Librem5 devkit
- const: fsl,imx8mq
- description: i.MX8QXP based Boards
items:
- enum:
......
Documentation/devicetree/bindings/arm/mediatek.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
MediaTek SoC based Platforms Device Tree Bindings
Boards with a MediaTek SoC shall have the following property:
Required root node property:
compatible: Must contain one of
"mediatek,mt2701"
"mediatek,mt2712"
"mediatek,mt6580"
"mediatek,mt6589"
"mediatek,mt6592"
"mediatek,mt6755"
"mediatek,mt6765"
"mediatek,mt6795"
"mediatek,mt6797"
"mediatek,mt7622"
"mediatek,mt7623"
"mediatek,mt7629"
"mediatek,mt8127"
"mediatek,mt8135"
"mediatek,mt8173"
"mediatek,mt8183"
Supported boards:
- Evaluation board for MT2701:
Required root node properties:
- compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
- Evaluation board for MT2712:
Required root node properties:
- compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
- Evaluation board for MT6580:
Required root node properties:
- compatible = "mediatek,mt6580-evbp1", "mediatek,mt6580";
- bq Aquaris5 smart phone:
Required root node properties:
- compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";
- Evaluation board for MT6592:
Required root node properties:
- compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
- Evaluation phone for MT6755(Helio P10):
Required root node properties:
- compatible = "mediatek,mt6755-evb", "mediatek,mt6755";
- Evaluation board for MT6765(Helio P22):
Required root node properties:
- compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
- Evaluation board for MT6795(Helio X10):
Required root node properties:
- compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
- Evaluation board for MT6797(Helio X20):
Required root node properties:
- compatible = "mediatek,mt6797-evb", "mediatek,mt6797";
- Mediatek X20 Development Board:
Required root node properties:
- compatible = "archermind,mt6797-x20-dev", "mediatek,mt6797";
- Reference board variant 1 for MT7622:
Required root node properties:
- compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
- Bananapi BPI-R64 for MT7622:
Required root node properties:
- compatible = "bananapi,bpi-r64", "mediatek,mt7622";
- Reference board for MT7623a with eMMC:
Required root node properties:
- compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
- Reference board for MT7623a with NAND:
Required root node properties:
- compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
- Reference board for MT7623n with eMMC:
Required root node properties:
- compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
- Bananapi BPI-R2 board:
- compatible = "bananapi,bpi-r2", "mediatek,mt7623";
- Reference board for MT7629:
Required root node properties:
- compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
- MTK mt8127 tablet moose EVB:
Required root node properties:
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
- MTK mt8135 tablet EVB:
Required root node properties:
- compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
- MTK mt8173 tablet EVB:
Required root node properties:
- compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
- Evaluation board for MT8183:
Required root node properties:
- compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
Documentation/devicetree/bindings/arm/mediatek.yaml 0 → 100644
浏览文件 @ af6af87d
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/mediatek.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek SoC based Platforms Device Tree Bindings
maintainers:
- Sean Wang <sean.wang@mediatek.com>
- Matthias Brugger <matthias.bgg@gmail.com>
description: |
Boards with a MediaTek SoC shall have the following properties.
properties:
$nodename:
const: '/'
compatible:
oneOf:
- items:
- enum:
- mediatek,mt2701-evb
- const: mediatek,mt2701
- items:
- enum:
- mediatek,mt2712-evb
- const: mediatek,mt2712
- items:
- enum:
- mediatek,mt6580-evbp1
- const: mediatek,mt6580
- items:
- enum:
- mundoreader,bq-aquaris5
- const: mediatek,mt6589
- items:
- enum:
- mediatek,mt6592-evb
- const: mediatek,mt6592
- items:
- enum:
- mediatek,mt6755-evb
- const: mediatek,mt6755
- items:
- enum:
- mediatek,mt6765-evb
- const: mediatek,mt6765
- items:
- enum:
- mediatek,mt6795-evb
- const: mediatek,mt6795
- items:
- enum:
- archermind,mt6797-x20-dev
- mediatek,mt6797-evb
- const: mediatek,mt6797
- items:
- enum:
- bananapi,bpi-r64
- mediatek,mt7622-rfb1
- const: mediatek,mt7622
- items:
- enum:
- mediatek,mt7623a-rfb-emmc
- mediatek,mt7623a-rfb-nand
- mediatek,mt7623n-rfb-emmc
- bananapi,bpi-r2
- const: mediatek,mt7623
- items:
- enum:
- mediatek,mt7629-rfb
- const: mediatek,mt7629
- items:
- enum:
- mediatek,mt8127-moose
- const: mediatek,mt8127
- items:
- enum:
- mediatek,mt8135-evbp1
- const: mediatek,mt8135
- items:
- enum:
- mediatek,mt8173-evb
- const: mediatek,mt8173
- items:
- enum:
- mediatek,mt8183-evb
- const: mediatek,mt8183
...
Documentation/devicetree/bindings/arm/omap/omap.txt
浏览文件 @ af6af87d
......@@ -160,6 +160,9 @@ Boards:
- AM335X phyCORE-AM335x: Development kit
compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx"
- AM335x phyBOARD-REGOR: Single Board Computer
compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx"
- AM335X UC-8100-ME-T: Communication-centric industrial computing platform
compatible = "moxa,uc-8100-me-t", "ti,am33xx";
......
Documentation/devicetree/bindings/arm/renesas.yaml
浏览文件 @ af6af87d
......@@ -106,6 +106,14 @@ properties:
- description: RZ/G2M (R8A774A1)
items:
- enum:
- hoperun,hihope-rzg2m # HopeRun HiHope RZ/G2M platform
- const: renesas,r8a774a1
- items:
- enum:
- hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms
- const: hoperun,hihope-rzg2m
- const: renesas,r8a774a1
- description: RZ/G2E (R8A774C0)
......
Documentation/devicetree/bindings/arm/rockchip.yaml
浏览文件 @ af6af87d
......@@ -316,6 +316,19 @@ properties:
- const: haoyu,marsboard-rk3066
- const: rockchip,rk3066a
- description: Hugsun X99 TV Box
items:
- const: hugsun,x99
- const: rockchip,rk3399
- description: Khadas Edge series boards
items:
- enum:
- khadas,edge
- khadas,edge-captain
- khadas,edge-v
- const: rockchip,rk3399
- description: mqmaker MiQi
items:
- const: mqmaker,miqi
......
Documentation/devicetree/bindings/arm/stm32/stm32.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
STMicroelectronics STM32 Platforms Device Tree Bindings
Each device tree must specify which STM32 SoC it uses,
using one of the following compatible strings:
st,stm32f429
st,stm32f469
st,stm32f746
st,stm32h743
st,stm32mp157
Documentation/devicetree/bindings/arm/stm32/stm32.yaml 0 → 100644
浏览文件 @ af6af87d
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/stm32/stm32.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Platforms Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
properties:
compatible:
oneOf:
- items:
- const: st,stm32f429
- items:
- const: st,stm32f469
- items:
- const: st,stm32f746
- items:
- const: st,stm32h743
- items:
- enum:
- arrow,stm32mp157a-avenger96 # Avenger96
- const: st,stm32mp157
...
Documentation/devicetree/bindings/arm/sunxi.yaml
浏览文件 @ af6af87d
......@@ -263,7 +263,7 @@ properties:
- description: ICNova A20 SWAC
items:
- const: swac,icnova-a20-swac
- const: incircuit,icnova-a20-swac
- const: incircuit,icnova-a20
- const: allwinner,sun7i-a20
......
Documentation/devicetree/bindings/arm/ti/k3.txt
浏览文件 @ af6af87d
......@@ -13,6 +13,9 @@ architecture it uses, using one of the following compatible values:
- AM654
compatible = "ti,am654";
- J721E
compatible = "ti,j721e";
Boards
------
......
Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml 0 → 100644
浏览文件 @ af6af87d
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/allwinner,sun8i-a23-rsb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A23 RSB Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#address-cells":
const: 1
"#size-cells":
const: 0
compatible:
oneOf:
- const: allwinner,sun8i-a23-rsb
- items:
- const: allwinner,sun8i-a83t-rsb
- const: allwinner,sun8i-a23-rsb
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
clock-frequency:
minimum: 1
maximum: 20000000
patternProperties:
"^.*@[0-9a-fA-F]+$":
properties:
reg:
maxItems: 1
required:
- reg
required:
- compatible
- reg
- interrupts
- clocks
- resets
examples:
- |
rsb@1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <3000000>;
resets = <&apb0_rst 3>;
#address-cells = <1>;
#size-cells = <0>;
pmic@3e3 {
compatible = "...";
reg = <0x3e3>;
/* ... */
};
};
additionalProperties: false
Documentation/devicetree/bindings/bus/sunxi-rsb.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
Allwinner Reduced Serial Bus (RSB) controller
The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire
serial bus with 1 master and up to 15 slaves. It is represented by a node
for the controller itself, and child nodes representing the slave devices.
Required properties :
- reg : Offset and length of the register set for the controller.
- compatible : Shall be "allwinner,sun8i-a23-rsb".
- interrupts : The interrupt line associated to the RSB controller.
- clocks : The gate clk associated to the RSB controller.
- resets : The reset line associated to the RSB controller.
- #address-cells : shall be 1
- #size-cells : shall be 0
Optional properties :
- clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz.
If not set this defaults to 3MHz.
Child nodes:
An RSB controller node can contain zero or more child nodes representing
slave devices on the bus. Child 'reg' properties should contain the slave
device's hardware address. The hardware address is hardwired in the device,
which can normally be found in the datasheet.
Example:
rsb@1f03400 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <3000000>;
resets = <&apb0_rst 3>;
#address-cells = <1>;
#size-cells = <0>;
pmic@3e3 {
compatible = "...";
reg = <0x3e3>;
/* ... */
};
};
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
浏览文件 @ af6af87d
......@@ -12,10 +12,12 @@ following device-specific properties.
Required properties:
- compatible : Shall contain one or more of
- "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
- "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
- "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
- "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
- "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX
- "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible
HDMI TX
When compatible with generic versions, nodes must list the SoC-specific
version corresponding to the platform first, followed by the
......
Documentation/devicetree/bindings/dma/fsl-qdma.txt
浏览文件 @ af6af87d
......@@ -7,6 +7,7 @@ Required properties:
- compatible: Must be one of
"fsl,ls1021a-qdma": for LS1021A Board
"fsl,ls1028a-qdma": for LS1028A Board
"fsl,ls1043a-qdma": for ls1043A Board
"fsl,ls1046a-qdma": for ls1046A Board
- reg: Should contain the register's base address and length.
......
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
浏览文件 @ af6af87d
......@@ -17,6 +17,7 @@ Required properties:
* which must be preceded by one of the following vendor specifics:
+ "allwinner,sun50i-h6-mali"
+ "amlogic,meson-gxm-mali"
+ "samsung,exynos5433-mali"
+ "rockchip,rk3288-mali"
+ "rockchip,rk3399-mali"
......
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
浏览文件 @ af6af87d
......@@ -17,6 +17,7 @@ Required properties:
+ amlogic,meson8b-mali
+ amlogic,meson-gxbb-mali
+ amlogic,meson-gxl-mali
+ samsung,exynos4210-mali
+ rockchip,rk3036-mali
+ rockchip,rk3066-mali
+ rockchip,rk3188-mali
......
Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
浏览文件 @ af6af87d
......@@ -5,6 +5,7 @@ Required properties:
- compatible: should be one of the following string:
"allwinner,sun4i-a10-lradc-keys"
"allwinner,sun8i-a83t-r-lradc"
"allwinner,sun50i-a64-lradc", "allwinner,sun8i-a83t-r-lradc"
- reg: mmio address range of the chip
- interrupts: interrupt to which the chip is connected
- vref-supply: powersupply for the lradc reference voltage
......
Documentation/devicetree/bindings/net/can/rcar_can.txt
浏览文件 @ af6af87d
......@@ -6,6 +6,7 @@ Required properties:
"renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
"renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
"renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
"renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
"renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
"renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
"renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
......@@ -27,13 +28,8 @@ Required properties:
- reg: physical base address and size of the R-Car CAN register map.
- interrupts: interrupt specifier for the sole interrupt.
- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2
devices.
phandles and clock specifiers for 3 CAN clock inputs for every other
SoC.
- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk".
3 clock input name strings for every other SoC: "clkp1", "clkp2",
"can_clk".
- clocks: phandles and clock specifiers for 3 CAN clock inputs.
- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk".
- pinctrl-0: pin control group to be used for this controller.
- pinctrl-names: must be "default".
......@@ -49,8 +45,7 @@ using the below properties:
Optional properties:
- renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
<0x0> (default) : Peripheral clock (clkp1)
<0x1> : Peripheral clock (clkp2) (not supported by
RZ/G2 devices)
<0x1> : Peripheral clock (clkp2)
<0x3> : External input clock
Example
......
Documentation/devicetree/bindings/net/can/rcar_canfd.txt
浏览文件 @ af6af87d
......@@ -3,11 +3,14 @@ Renesas R-Car CAN FD controller Device Tree Bindings
Required properties:
- compatible: Must contain one or more of the following:
- "renesas,rcar-gen3-canfd" for R-Car Gen3 compatible controller.
- "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers.
- "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller.
- "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
- "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller.
- "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller.
- "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller.
- "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller.
- "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller.
When compatible with the generic version, nodes must list the
SoC-specific version corresponding to the platform first, followed by the
......@@ -26,12 +29,13 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each
child node supports the "status" property only, which is used to
enable/disable the respective channel.
Required properties for "renesas,r8a7795-canfd" and "renesas,r8a7796-canfd"
Required properties for "renesas,r8a774c0-canfd", "renesas,r8a7795-canfd",
"renesas,r8a7796-canfd", "renesas,r8a77965-canfd", and "renesas,r8a77990-canfd"
compatible:
In R8A7795 and R8A7796 SoCs, canfd clock is a div6 clock and can be used by both
CAN and CAN FD controller at the same time. It needs to be scaled to maximum
frequency if any of these controllers use it. This is done using the below
properties:
In R8A774C0, R8A7795, R8A7796, R8A77965, and R8A77990 SoCs, canfd clock is a
div6 clock and can be used by both CAN and CAN FD controller at the same time.
It needs to be scaled to maximum frequency if any of these controllers use it.
This is done using the below properties:
- assigned-clocks: phandle of canfd clock.
- assigned-clock-rates: maximum frequency of this clock.
......
Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml 0 → 100644
浏览文件 @ af6af87d
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner A10 PWM Device Tree Bindings
maintainers:
- Chen-Yu Tsai <wens@csie.org>
- Maxime Ripard <maxime.ripard@bootlin.com>
properties:
"#pwm-cells":
const: 3
compatible:
oneOf:
- const: allwinner,sun4i-a10-pwm
- const: allwinner,sun5i-a10s-pwm
- const: allwinner,sun5i-a13-pwm
- const: allwinner,sun7i-a20-pwm
- const: allwinner,sun8i-h3-pwm
- items:
- const: allwinner,sun8i-a83t-pwm
- const: allwinner,sun8i-h3-pwm
- items:
- const: allwinner,sun50i-a64-pwm
- const: allwinner,sun5i-a13-pwm
- items:
- const: allwinner,sun50i-h5-pwm
- const: allwinner,sun5i-a13-pwm
reg:
maxItems: 1
clocks:
maxItems: 1
required:
- "#pwm-cells"
- compatible
- reg
- clocks
additionalProperties: false
examples:
- |
pwm: pwm@1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
};
...
Documentation/devicetree/bindings/pwm/pwm-sun4i.txt 已删除 100644 → 0
浏览文件 @ 8362fd64
Allwinner sun4i and sun7i SoC PWM controller
Required properties:
- compatible: should be one of:
- "allwinner,sun4i-a10-pwm"
- "allwinner,sun5i-a10s-pwm"
- "allwinner,sun5i-a13-pwm"
- "allwinner,sun7i-a20-pwm"
- "allwinner,sun8i-h3-pwm"
- "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm"
- "allwinner,sun50i-h5-pwm", "allwinner,sun5i-a13-pwm"
- reg: physical base address and length of the controller's registers
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
the cells format.
- clocks: From common clock binding, handle to the parent clock.
Example:
pwm: pwm@1c20e00 {
compatible = "allwinner,sun7i-a20-pwm";
reg = <0x01c20e00 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
};
Documentation/devicetree/bindings/serial/omap_serial.txt
浏览文件 @ af6af87d
OMAP UART controller
Required properties:
- compatible : should be "ti,j721e-uart", "ti,am654-uart" for J721E controllers
- compatible : should be "ti,am654-uart" for AM654 controllers
- compatible : should be "ti,omap2-uart" for OMAP2 controllers
- compatible : should be "ti,omap3-uart" for OMAP3 controllers
......
Documentation/devicetree/bindings/timer/renesas,cmt.txt
浏览文件 @ af6af87d
......@@ -42,12 +42,18 @@ Required Properties:
- "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
- "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
- "renesas,r8a7795-cmt0" for the 32-bit CMT0 device included in r8a7795.
- "renesas,r8a7795-cmt1" for the 48-bit CMT1 device included in r8a7795.
- "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796.
- "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796.
- "renesas,r8a77965-cmt0" for the 32-bit CMT0 device included in r8a77965.
- "renesas,r8a77965-cmt1" for the 48-bit CMT1 device included in r8a77965.
- "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.
- "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970.
- "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.
- "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
- "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
- "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2
and RZ/G1.
......
Documentation/devicetree/bindings/vendor-prefixes.yaml
浏览文件 @ af6af87d
......@@ -395,12 +395,16 @@ patternProperties:
description: Holt Integrated Circuits, Inc.
"^honeywell,.*":
description: Honeywell
"^hoperun,.*":
description: Jiangsu HopeRun Software Co., Ltd.
"^hp,.*":
description: Hewlett Packard
"^hsg,.*":
description: HannStar Display Co.
"^holtek,.*":
description: Holtek Semiconductor, Inc.
"^hugsun,.*":
description: Shenzhen Hugsun Technology Co. Ltd.
"^hwacom,.*":
description: HwaCom Systems Inc.
"^hyundai,.*":
......@@ -735,6 +739,8 @@ patternProperties:
description: PROBOX2 (by W2COMP Co., Ltd.)
"^pulsedlight,.*":
description: PulsedLight, Inc
"^purism,.*":
description: Purism, SPC
"^qca,.*":
description: Qualcomm Atheros, Inc.
"^qcom,.*":
......
arch/arm/boot/dts/Makefile
浏览文件 @ af6af87d
......@@ -586,6 +586,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7d-mba7.dtb \
imx7d-meerkat96.dtb \
imx7d-nitrogen7.dtb \
imx7d-pico-hobbit.dtb \
imx7d-pico-pi.dtb \
......@@ -602,6 +603,7 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \
ls1021a-tsn.dtb \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
......@@ -748,6 +750,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pepper.dtb \
am335x-phycore-rdk.dtb \
am335x-pocketbeagle.dtb \
am335x-regor-rdk.dtb \
am335x-sancloud-bbe.dtb \
am335x-shc.dtb \
am335x-sbc-t335.dtb \
......@@ -975,6 +978,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32746g-eval.dtb \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dk1.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
......@@ -1268,10 +1272,16 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-microsoft-olympus.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
aspeed-bmc-opp-swift.dtb \
aspeed-bmc-opp-vesnin.dtb \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
......
arch/arm/boot/dts/am335x-baltos-ir2110.dts
浏览文件 @ af6af87d
......@@ -30,6 +30,12 @@
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
};
&uart1 {
......@@ -65,7 +71,13 @@
};
&cpsw_emac1 {
phy-mode = "rgmii-txid";
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
arch/arm/boot/dts/am335x-baltos-ir3220.dts
浏览文件 @ af6af87d
......@@ -51,6 +51,12 @@
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
};
&uart1 {
......@@ -107,7 +113,13 @@
};
&cpsw_emac1 {
phy-mode = "rgmii-txid";
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};
arch/arm/boot/dts/am335x-baltos-ir5221.dts
浏览文件 @ af6af87d
......@@ -60,6 +60,11 @@
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
};
&uart1 {
......@@ -125,7 +130,7 @@
};
&cpsw_emac1 {
phy-mode = "rgmii-txid";
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
......@@ -136,3 +141,9 @@
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};
arch/arm/boot/dts/am335x-pcm-953.dtsi
浏览文件 @ af6af87d
......@@ -36,15 +36,13 @@
pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>;
green {
label = "green:user";
user-led0 {
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "on";
};
yellow {
label = "yellow:user";
user-led1 {
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
linux,default-trigger = "gpio";
default-state = "on";
......@@ -135,22 +133,6 @@
&davinci_mdio {
phy1: ethernet-phy@2 {
reg = <2>;
/* Register 260 (104h) – RGMII Clock and Control Pad Skew */
rxc-skew-ps = <1400>;
rxdv-skew-ps = <0>;
txc-skew-ps = <1400>;
txen-skew-ps = <0>;
/* Register 261 (105h) – RGMII RX Data Pad Skew */
rxd3-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd0-skew-ps = <0>;
/* Register 262 (106h) – RGMII TX Data Pad Skew */
txd3-skew-ps = <0>;
txd2-skew-ps = <0>;
txd1-skew-ps = <0>;
txd0-skew-ps = <0>;
};
};
......
arch/arm/boot/dts/am335x-phycore-rdk.dts
浏览文件 @ af6af87d
......@@ -10,6 +10,10 @@
#include "am335x-pcm-953.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};
......
arch/arm/boot/dts/am335x-phycore-som.dtsi
浏览文件 @ af6af87d
......@@ -27,17 +27,13 @@
reg = <0x80000000 0x10000000>; /* 256 MB */
};
regulators {
compatible = "simple-bus";
vcc5v: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
vcc5v: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
};
......@@ -50,6 +46,33 @@
status = "okay";
};
/* EMMC */
&am33xx_pinmux {
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_reg>;
bus-width = <8>;
ti,non-removable;
status = "disabled";
};
/* Ethernet */
&am33xx_pinmux {
ethernet0_pins: pinmux_ethernet0 {
......@@ -164,7 +187,7 @@
};
&gpmc {
status = "okay";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */
......
arch/arm/boot/dts/am335x-regor-rdk.dts 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Phytec Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*
*/
/dts-v1/;
#include "am335x-phycore-som.dtsi"
#include "am335x-regor.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};
&serial_flash {
status = "okay";
};
arch/arm/boot/dts/am335x-regor.dtsi 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Phytec Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*
*/
/ {
model = "Phytec AM335x phyBOARD-REGOR";
compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
vcc3v3: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
/* User IO */
user_leds: user_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>;
run_stop-led {
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
error-led {
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
};
};
/* User Leds */
&am33xx_pinmux {
user_leds_pins: pinmux_user_leds {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 */
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
>;
};
};
/* CAN Busses */
&am33xx_pinmux {
dcan1_pins: pinmux_dcan1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
>;
};
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
/* Ethernet */
&am33xx_pinmux {
ethernet1_pins: pinmux_ethernet1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1) /* gpmc_a0.mii2_txen */
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv */
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1) /* gpmc_a2.mii2_txd3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1) /* gpmc_a3.mii2_txd2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1) /* gpmc_a4.mii2_txd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1) /* gpmc_a5.mii2_txd0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a6.mii2_txclk */
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a7.mii2_rxclk */
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_ben1.mii2_col */
>;
};
};
&cpsw_emac1 {
phy-handle = <&phy1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mac {
slaves = <2>;
pinctrl-names = "default";
pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
dual_emac = <1>;
};
/* GPIOs */
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&user_gpios_pins>;
user_gpios_pins: pinmux_user_gpios {
pinctrl-single,pins = <
/* DIGIN 1-4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) /* gpmc_ad11.gpio0_27 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7) /* gpmc_ad8.gpio0_22 */
/* DIGOUT 1-4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad15.gpio1_15 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad14.gpio1_14 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad13.gpio1_13 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad12.gpio1_12 */
>;
};
};
/* MMC */
&am33xx_pinmux {
mmc1_pins: pinmux_mmc1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
>;
};
};
&mmc1 {
vmmc-supply = <&vcc3v3>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
/* RTC */
&i2c_rtc {
status = "okay";
};
/* UARTs */
&am33xx_pinmux {
uart0_pins: pinmux_uart0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
/* RS485 - UART1 */
&am33xx_pinmux {
uart1_rs485_pins: pinmux_uart1_rs485_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_rs485_pins>;
status = "okay";
linux,rs485-enabled-at-boot-time;
};
/* USB */
&cppi41dma {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb0_phy {
status = "okay";
};
arch/arm/boot/dts/am335x-wega-rdk.dts
浏览文件 @ af6af87d
......@@ -10,6 +10,10 @@
#include "am335x-wega.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};
......
arch/arm/boot/dts/am335x-wega.dtsi
浏览文件 @ af6af87d
......@@ -12,16 +12,12 @@
compatible = "ti,da830-evm-audio";
};
regulators {
compatible = "simple-bus";
vcc3v3: fixedregulator1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
vcc3v3: fixedregulator1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
......
arch/arm/boot/dts/arm-realview-eb.dtsi
浏览文件 @ af6af87d
......@@ -119,6 +119,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x40000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
flash1@44000000 {
......@@ -126,6 +129,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x44000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
/* SMSC LAN91C111 ethernet with PHY and EEPROM */
......
arch/arm/boot/dts/arm-realview-pb1176.dts
浏览文件 @ af6af87d
......@@ -120,12 +120,18 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x30000000 0x4000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
fpga_flash@38000000 {
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x38000000 0x800000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
/*
......
arch/arm/boot/dts/arm-realview-pb11mp.dts
浏览文件 @ af6af87d
......@@ -235,6 +235,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x40000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
flash1@44000000 {
......@@ -242,6 +245,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x44000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
bridge {
......
arch/arm/boot/dts/arm-realview-pbx.dtsi
浏览文件 @ af6af87d
......@@ -134,6 +134,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x40000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
flash1@44000000 {
......@@ -141,6 +144,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x44000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
/* SMSC 9118 ethernet with PHY and EEPROM */
......
arch/arm/boot/dts/armada-370-netgear-rn104.dts
浏览文件 @ af6af87d
......@@ -143,6 +143,20 @@
};
};
auxdisplay {
compatible = "hit,hd44780";
data-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>,
<&gpio1 26 GPIO_ACTIVE_HIGH>,
<&gpio1 27 GPIO_ACTIVE_HIGH>,
<&gpio1 29 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
rs-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
rw-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
backlight-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
display-height-chars = <2>;
display-width-chars = <16>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&backup_button_pin
......
arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
浏览文件 @ af6af87d
......@@ -372,3 +372,11 @@
&adc {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
/ {
model = "Facebook YAMP 100 BMC";
compatible = "facebook,yamp-bmc", "aspeed,ast2500";
aliases {
/*
* Override the default uart aliases to avoid breaking
* the legacy applications.
*/
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
/*
* wdt2 is not used by Yamp.
*/
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
i2c-switch@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "FP5280G2 BMC";
compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@9f000000 {
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
coldfire_memory: codefire_memory@9ef00000 {
reg = <0x9ef00000 0x00100000>;
no-map;
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
fsi: gpio-fsi {
compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
memory-region = <&coldfire_memory>;
aspeed,sram = <&sram>;
aspeed,cvic = <&cvic>;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 3)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 0)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
fan0-presence {
label = "fan0-presence";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
linux,code = <1>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
linux,code = <2>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
linux,code = <3>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
linux,code = <4>;
};
fan4-presence {
label = "fan4-presence";
gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan5-presence {
label = "fan5-presence";
gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan6-presence {
label = "fan6-presence";
gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan7-presence {
label = "fan7-presence";
gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
};
leds {
compatible = "gpio-leds";
power {
label = "power";
/* TODO: dummy gpio */
gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 15>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
<&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* Test Point */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart3 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
/* LCD */
status = "okay";
};
&i2c1 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
label = "fru";
};
};
&i2c2 {
status = "okay";
tmp112@48 {
compatible = "ti,tmp112";
reg = <0x48>;
label = "inlet";
};
tmp112@49 {
compatible = "ti,tmp112";
reg = <0x49>;
label = "outlet";
};
i2c-switch@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "psu_inlet";
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "ocp_zone";
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "bmc_zone";
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
tmp112@7c {
compatible = "microchip,emc1413";
reg = <0x7c>;
};
};
};
};
&i2c3 {
/* Riser Card */
status = "okay";
};
&i2c4 {
status = "okay";
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
};
};
&i2c5 {
/* vr */
status = "okay";
};
&i2c6 {
/* bp card */
status = "okay";
};
&i2c7 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adm1278@10 {
compatible = "adi,adm1278";
reg = <0x10>;
};
adm1278@13 {
compatible = "adi,adm1278";
reg = <0x13>;
};
adm1278@50 {
compatible = "adi,adm1278";
reg = <0x50>;
};
adm1278@53 {
compatible = "adi,adm1278";
reg = <0x53>;
};
};
/*pcie riser*/
};
};
&i2c8 {
status = "okay";
pca0: pca9555@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca1: pca9555@21 {
compatible = "nxp,pca9555";
reg = <0x21>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca2: pca9555@22 {
compatible = "nxp,pca9555";
reg = <0x22>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca3: pca9555@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca4: pca9555@24 {
compatible = "nxp,pca9555";
reg = <0x24>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca5: pca9555@25 {
compatible = "nxp,pca9555";
reg = <0x25>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c9 {
/* cpld */
status = "okay";
};
&i2c10 {
/* hdd bp */
status = "okay";
};
&i2c11 {
status = "okay";
power-supply@58 {
compatible = "pmbus";
reg = <0x58>;
};
power-supply@5a {
compatible = "pmbus";
reg = <0x5a>;
};
};
&i2c12 {
/* odcc */
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_b7 {
gpio-hog;
gpios = <ASPEED_GPIO(B,7) GPIO_ACTIVE_LOW>;
output-high;
line-name = "BMC_INIT_OK";
};
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
&pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
&pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
&pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
&pinctrl_adc14_default &pinctrl_adc15_default>;
};
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
};
fan@7 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
};
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for Lenovo Hr630 platform
*
* Copyright (C) 2019-present Lenovo
*/
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "HR630 BMC";
compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
aliases {
i2c14 = &i2c_rbp;
i2c15 = &i2c_fbp1;
i2c16 = &i2c_fbp2;
i2c17 = &i2c_fbp3;
i2c18 = &i2c_riser2;
i2c19 = &i2c_pcie4;
i2c20 = &i2c_riser1;
i2c21 = &i2c_ocp;
};
chosen {
stdout-path = &uart5;
bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x00100000>; /* 1M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
};
fault {
gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>,
<&adc 12>, <&adc 13>, <&adc 14>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default
&pinctrl_nrts2_default
&pinctrl_ndtr2_default
&pinctrl_ndsr2_default
&pinctrl_ncts2_default
&pinctrl_ndcd2_default
&pinctrl_nri2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&ibt {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default
&pinctrl_adc8_default
&pinctrl_adc9_default
&pinctrl_adc10_default
&pinctrl_adc12_default
&pinctrl_adc13_default
&pinctrl_adc14_default>;
};
&i2c0 {
status = "okay";
/* temp1 inlet */
tmp75@4e {
compatible = "national,lm75";
reg = <0x4e>;
};
};
&i2c1 {
status = "okay";
/* temp2 outlet */
tmp75@4d {
compatible = "national,lm75";
reg = <0x4d>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
/* Slot 0,
* Slot 1,
* Slot 2,
* Slot 3
*/
i2c-switch@70 {
compatible = "nxp,pca9545";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect; /* may use mux@70 next. */
i2c_rbp: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_fbp1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_fbp2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_fbp3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c7 {
status = "okay";
/* Slot 0,
* Slot 1,
* Slot 2,
* Slot 3
*/
i2c-switch@76 {
compatible = "nxp,pca9546";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect; /* may use mux@76 next. */
i2c_riser2: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_pcie4: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_riser1: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_ocp: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c8 {
status = "okay";
eeprom@57 {
compatible = "atmel,24c256";
reg = <0x57>;
pagesize = <16>;
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
fan@8 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08>;
};
fan@9 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x09>;
};
fan@10 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
};
fan@11 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
};
fan@12 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
};
fan@13 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
};
};
&gpio {
pin_gpio_b5 {
gpio-hog;
gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "IRQ_BMC_PCH_SMI_LPC_N";
};
pin_gpio_f0 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "IRQ_BMC_PCH_NMI_R";
};
pin_gpio_f3 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_BUS0_RST_OUT_N";
};
pin_gpio_f4 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "FM_SKT0_FAULT_LED";
};
pin_gpio_f5 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "FM_SKT1_FAULT_LED";
};
pin_gpio_g4 {
gpio-hog;
gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "FAN_PWR_CTL_N";
};
pin_gpio_g7 {
gpio-hog;
gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_BMC_PCIE_I2CMUX_N";
};
pin_gpio_h2 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PSU1_FFS_N_R";
};
pin_gpio_h3 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PSU2_FFS_N_R";
};
pin_gpio_i3 {
gpio-hog;
gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_INTRUDED_COVER";
};
pin_gpio_j2 {
gpio-hog;
gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_BIOS_UPDATE_N";
};
pin_gpio_j3 {
gpio-hog;
gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_BMC_HDD_I2CMUX_N";
};
pin_gpio_s2 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_VGA_SW";
};
pin_gpio_s4 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
output;
line-name = "VBAT_EN_N";
};
pin_gpio_s6 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PU_BMC_GPIOS6";
};
pin_gpio_y0 {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_NCSI_MUX_CTL_S0";
};
pin_gpio_y1 {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_NCSI_MUX_CTL_S1";
};
pin_gpio_z0 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_RISER2_INT_N";
};
pin_gpio_z2 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_RISER2_RESET_N";
};
pin_gpio_z3 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "FM_BMC_PCH_SCI_LPC_N";
};
pin_gpio_z7 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_POST_CMPLT_N";
};
pin_gpio_aa0 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "HOST_BMC_USB_SEL";
};
pin_gpio_aa5 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_BUS1_RST_OUT_N";
};
};
arch/arm/boot/dts/aspeed-bmc-microsoft-olympus.dts 0 → 100644
浏览文件 @ af6af87d
//SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Olympus BMC";
compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@40000000 {
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@5f000000 {
no-map;
reg = <0x5f000000 0x01000000>; /* 16M */
};
};
leds {
compatible = "gpio-leds";
bmc_heartbeat {
gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
};
power_green {
gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
};
power_amber {
gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
};
identify {
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
};
fault {
gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
};
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default>;
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <100000>;
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
&i2c7 {
status = "okay";
};
&vuart {
status = "okay";
};
&wdt2 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
};
arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
浏览文件 @ af6af87d
......@@ -322,3 +322,5 @@
&adc {
status = "okay";
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
浏览文件 @ af6af87d
......@@ -347,3 +347,25 @@
line-name = "BMC_TPM_INT_N";
};
};
&fsi {
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
fsi_hub0: hub@3400 {
compatible = "ibm,fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
浏览文件 @ af6af87d
......@@ -42,6 +42,13 @@
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
......@@ -304,3 +311,10 @@
&adc {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-swift.dts 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "Swift BMC";
compatible = "ibm,swift-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
compatible = "gpio-keys";
air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 5)>;
};
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(R, 7)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(N, 0)>;
};
oppanel-presence {
label = "oppanel-presence";
gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(A, 7)>;
};
opencapi-riser-presence {
label = "opencapi-riser-presence";
gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 0)>;
};
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 12>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
scm0-presence {
label = "scm0-presence";
gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
scm1-presence {
label = "scm1-presence";
gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
cpu0vrm-presence {
label = "cpu0vrm-presence";
gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
cpu1vrm-presence {
label = "cpu1vrm-presence";
gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
fan0-presence {
label = "fan0-presence";
gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
fanboost-presence {
label = "fanboost-presence";
gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
};
leds {
compatible = "gpio-leds";
fan0 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
};
fan1 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
};
fan2 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
};
fan3 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
};
fanboost {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
};
front-fault {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
};
front-power {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
};
front-id {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
};
rear-fault {
gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
};
rear-id {
gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
};
};
fsi: gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
};
iio-hwmon-dps310 {
compatible = "iio-hwmon";
io-channels = <&dps 0>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <100000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x7F80000>;
label = "obmc-ubi";
};
};
};
flash@1 {
status = "okay";
label = "alt-bmc";
m25p,fast-read;
spi-max-frequency = <100000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "alt-u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "alt-u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x7F80000>;
label = "alt-obmc-ubi";
};
};
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&i2c2 {
status = "okay";
/* MUX ->
* Samtec 1
* Samtec 2
*/
};
&i2c3 {
status = "okay";
max31785@52 {
compatible = "maxim,max31785a";
reg = <0x52>;
#address-cells = <1>;
#size-cells = <0>;
fan@0 {
compatible = "pmbus-fan";
reg = <0>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@1 {
compatible = "pmbus-fan";
reg = <1>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@2 {
compatible = "pmbus-fan";
reg = <2>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@3 {
compatible = "pmbus-fan";
reg = <3>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@4 {
compatible = "pmbus-fan";
reg = <4>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
};
pca0: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
power-supply@68 {
compatible = "ibm,cffps1";
reg = <0x68>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
power-supply@69 {
compatible = "ibm,cffps1";
reg = <0x69>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c7 {
status = "okay";
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
#io-channel-cells = <0>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
si7021a20@20 {
compatible = "si,si7021a20";
reg = <0x20>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
pca1: pca9551@60 {
compatible = "nxp,pca9551";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c8 {
status = "okay";
pca9552: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
"GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
"P9_SCM0_PRES", "P9_SCM1_PRES",
"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
"PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
ucd90160@64 {
compatible = "ti,ucd90160";
reg = <0x64>;
};
};
&i2c9 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
ir35221@71 {
compatible = "infineon,ir35221";
reg = <0x71>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
pca2: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
};
&i2c10 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
ir35221@71 {
compatible = "infineon,ir35221";
reg = <0x71>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
pca3: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
};
&i2c11 {
/* MUX
* -> PCIe Slot 0
* -> PCIe Slot 1
* -> PCIe Slot 2
* -> PCIe Slot 3
*/
status = "okay";
};
&i2c12 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
};
&i2c13 {
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&wdt2 {
aspeed,alt-boot;
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts 0 → 100644
浏览文件 @ af6af87d
// SPDX-License-Identifier: GPL-2.0+
// Copyright 2019 YADRO
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Vesnin BMC";
compatible = "yadro,vesnin-bmc", "aspeed,ast2400";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory {
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@5f000000 {
no-map;
reg = <0x5f000000 0x01000000>; /* 16MB */
};
flash_memory: region@5c000000 {
no-map;
reg = <0x5c000000 0x02000000>; /* 32M */
};
};
leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
};
power_red {
gpios = <&gpio ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>;
};
id_blue {
gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>;
};
alarm_red {
gpios = <&gpio ASPEED_GPIO(N, 6) GPIO_ACTIVE_LOW>;
};
alarm_yel {
gpios = <&gpio ASPEED_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
button_checkstop {
label = "checkstop";
linux,code = <74>;
gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>;
};
button_identify {
label = "identify";
linux,code = <152>;
gpios = <&gpio ASPEED_GPIO(O, 7) GPIO_ACTIVE_LOW>;
};
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1debug_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
};
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi>;
};
&ibt {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&i2c0 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
pagesize = <64>;
};
};
&i2c1 {
status = "okay";
tmp75@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
occ-hwmon@50 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x50>;
};
};
&i2c5 {
status = "okay";
occ-hwmon@51 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x51>;
};
};
&i2c6 {
status = "okay";
w83795g@2f {
compatible = "nuvoton,w83795g";
reg = <0x2f>;
};
};
&i2c7 {
status = "okay";
occ-hwmon@56 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x56>;
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
occ-hwmon@57 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x57>;
};
};
&i2c12 {
status = "okay";
rtc@68 {
compatible = "maxim,ds3231";
reg = <0x68>;
};
};
&i2c13 {
status = "okay";
};
&vuart {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
浏览文件 @ af6af87d
......@@ -33,6 +33,13 @@
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32MM */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
......@@ -640,3 +647,10 @@
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
浏览文件 @ af6af87d
......@@ -112,6 +112,11 @@
&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
};
&p2a {
status = "okay";
memory-region = <&vga_memory>;
};
&ibt {
status = "okay";
};
......
arch/arm/boot/dts/aspeed-g4.dtsi
浏览文件 @ af6af87d
......@@ -53,7 +53,7 @@
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
fmc: spi@1e620000 {
reg = < 0x1e620000 0x94
0x20000000 0x10000000 >;
#address-cells = <1>;
......@@ -69,7 +69,7 @@
};
};
spi: flash-controller@1e630000 {
spi: spi@1e630000 {
reg = < 0x1e630000 0x18
0x30000000 0x10000000 >;
#address-cells = <1>;
......@@ -165,6 +165,10 @@
compatible = "aspeed,g4-pinctrl";
};
p2a: p2a-control {
compatible = "aspeed,ast2400-p2a-ctrl";
status = "disabled";
};
};
rng: hwrng@1e6e2078 {
......
arch/arm/boot/dts/aspeed-g5.dtsi
浏览文件 @ af6af87d
......@@ -60,7 +60,7 @@
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
fmc: spi@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
#address-cells = <1>;
......@@ -86,7 +86,7 @@
};
};
spi1: flash-controller@1e630000 {
spi1: spi@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x08000000 >;
#address-cells = <1>;
......@@ -106,7 +106,7 @@
};
};
spi2: flash-controller@1e631000 {
spi2: spi@1e631000 {
reg = < 0x1e631000 0xc4
0x38000000 0x08000000 >;
#address-cells = <1>;
......@@ -219,6 +219,11 @@
aspeed,external-nodes = <&gfx &lhc>;
};
p2a: p2a-control {
compatible = "aspeed,ast2500-p2a-ctrl";
status = "disabled";
};
};
rng: hwrng@1e6e2078 {
......
arch/arm/boot/dts/at91-wb50n.dtsi
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arch/arm/boot/dts/at91sam9x5.dtsi
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arch/arm/boot/dts/bcm23550.dtsi
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arch/arm/boot/dts/exynos54xx.dtsi
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arch/arm/boot/dts/hip04.dtsi
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arch/arm/boot/dts/ibm-power9-dual.dtsi 0 → 100644
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arch/arm/boot/dts/imx53-smd.dts
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arch/arm/boot/dts/imx6sx-sdb.dts
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arch/arm/boot/dts/imx6ull.dtsi
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arch/arm/boot/dts/imx7d-meerkat96.dts 0 → 100644
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arch/arm/boot/dts/imx7d-sdb.dts
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arch/arm/boot/dts/imx7s.dtsi
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arch/arm/boot/dts/imx7ulp-evk.dts
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arch/arm/boot/dts/integrator.dtsi
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arch/arm/boot/dts/ls1021a-tsn.dts 0 → 100644
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arch/arm/boot/dts/rk322x.dtsi
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arch/arm/boot/dts/rk3288.dtsi
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arch/arm/boot/dts/sama5d3.dtsi
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arch/arm/boot/dts/sh73a0-kzm9g.dts
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arch/arm/boot/dts/uniphier-ld4.dtsi
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arch/arm/boot/dts/versatile-ab.dts
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arch/arm/boot/dts/vexpress-v2m.dtsi
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arch/arm64/boot/dts/qcom/Makefile
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arch/arm64/boot/dts/renesas/hihope-common.dtsi 0 → 100644
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arch/arm64/boot/dts/rockchip/rk3399pro.dtsi 0 → 100644
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arch/arm64/boot/dts/ti/Makefile
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arch/arm64/boot/dts/ti/k3-am65.dtsi
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arch/arm64/configs/defconfig
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