drm/nouveau/gr/gf100-: expose method to determine current context

MMU will need access to this info.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h

@@ -12,6 +12,7 @@ u64 nvkm_gr_units(struct nvkm_gr *);
 int nvkm_gr_tlb_flush(struct nvkm_gr *);
 int nvkm_gr_ctxsw_pause(struct nvkm_device *);
 int nvkm_gr_ctxsw_resume(struct nvkm_device *);
+u32 nvkm_gr_ctxsw_inst(struct nvkm_device *);
 
 int nv04_gr_new(struct nvkm_device *, int, struct nvkm_gr **);
 int nv10_gr_new(struct nvkm_device *, int, struct nvkm_gr **);

drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c

@@ -25,6 +25,15 @@
 
 #include <engine/fifo.h>
 
+u32
+nvkm_gr_ctxsw_inst(struct nvkm_device *device)
+{
+	struct nvkm_gr *gr = device->gr;
+	if (gr && gr->func->ctxsw.inst)
+		return gr->func->ctxsw.inst(gr);
+	return 0;
+}
+
 int
 nvkm_gr_ctxsw_resume(struct nvkm_device *device)
 {

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

@@ -715,6 +715,12 @@ gf100_gr_pack_mmio[] = {
  * PGRAPH engine/subdev functions
  ******************************************************************************/
 
+static u32
+gf100_gr_ctxsw_inst(struct nvkm_gr *gr)
+{
+	return nvkm_rd32(gr->engine.subdev.device, 0x409b00);
+}
+
 static int
 gf100_gr_fecs_ctrl_ctxsw(struct gf100_gr *gr, u32 mthd)
 {
@@ -2058,6 +2064,7 @@ gf100_gr_ = {
 	.chsw_load = gf100_gr_chsw_load,
 	.ctxsw.pause = gf100_gr_fecs_stop_ctxsw,
 	.ctxsw.resume = gf100_gr_fecs_start_ctxsw,
+	.ctxsw.inst = gf100_gr_ctxsw_inst,
 };
 
 int

drivers/gpu/drm/nouveau/nvkm/engine/gr/priv.h

@@ -30,6 +30,7 @@ struct nvkm_gr_func {
 	struct {
 		int (*pause)(struct nvkm_gr *);
 		int (*resume)(struct nvkm_gr *);
+		u32 (*inst)(struct nvkm_gr *);
 	} ctxsw;
 	struct nvkm_sclass sclass[];
 };