net: hns3: add support detect port wire type

driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6YE0O
CVE: NA

----------------------------------------------------------------------

This patch add support to get port wire type.
Signed-off-by: Nshaojijie <shaojijie@huawei.com>
Signed-off-by: NJiantao Xiao <xiaojiantao1@h-partners.com>

drivers/net/ethernet/hisilicon/hns3/hnae3_ext.h

@@ -46,6 +46,7 @@ enum hnae3_ext_opcode {
 	HNAE3_EXT_OPC_SET_PFC_TIME,
 	HNAE3_EXT_OPC_GET_HILINK_REF_LOS,
 	HNAE3_EXT_OPC_GET_PORT_FAULT_STATUS,
+	HNAE3_EXT_OPC_GET_PORT_TYPE,
 };
 
 struct hnae3_pfc_storm_para {

drivers/net/ethernet/hisilicon/hns3/hns3_ext.c

@@ -461,3 +461,10 @@ int nic_get_port_fault_status(struct net_device *ndev, u32 fault_type, u32 *stat
 	return 0;
 }
 EXPORT_SYMBOL(nic_get_port_fault_status);
+
+int nic_get_port_wire_type(struct net_device *ndev, u32 *wire_type)
+{
+	return nic_invoke_pri_ops(ndev, HNAE3_EXT_OPC_GET_PORT_TYPE,
+				  wire_type, sizeof(*wire_type));
+}
+EXPORT_SYMBOL(nic_get_port_wire_type);

drivers/net/ethernet/hisilicon/hns3/hns3_ext.h

@@ -48,4 +48,5 @@ int nic_get_net_lane_status(struct net_device *ndev, u32 *status);
 int nic_disable_clock(struct net_device *ndev);
 int nic_set_pfc_time_cfg(struct net_device *ndev, u16 time);
 int nic_get_port_fault_status(struct net_device *ndev, u32 fault_type, u32 *status);
+int nic_get_port_wire_type(struct net_device *ndev, u32 *wire_type);
 #endif

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ext.c

@@ -632,6 +632,19 @@ static int hclge_get_port_fault_status(struct hclge_dev *hdev, void *data,
 	return 0;
 }
 
+static int hclge_get_port_wire_type(struct hclge_dev *hdev, void *data,
+				    size_t length)
+{
+	u8 module_type;
+
+	if (length != sizeof(u32))
+		return -EINVAL;
+
+	hclge_get_media_type(&hdev->vport[0].nic, NULL, &module_type);
+	*(u32 *)data = module_type;
+	return 0;
+}
+
 static void hclge_ext_resotre_config(struct hclge_dev *hdev)
 {
 	if (hdev->reset_type != HNAE3_IMP_RESET &&
@@ -801,6 +814,7 @@ static const hclge_priv_ops_fn hclge_ext_func_arr[] = {
 	[HNAE3_EXT_OPC_SET_PFC_TIME] = hclge_set_pause_trans_time,
 	[HNAE3_EXT_OPC_GET_HILINK_REF_LOS] = hclge_get_hilink_ref_los,
 	[HNAE3_EXT_OPC_GET_PORT_FAULT_STATUS] = hclge_get_port_fault_status,
+	[HNAE3_EXT_OPC_GET_PORT_TYPE] = hclge_get_port_wire_type,
 };
 
 int hclge_ext_ops_handle(struct hnae3_handle *handle, int opcode,

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

@@ -11493,8 +11493,8 @@ static void hclge_get_ksettings_an_result(struct hnae3_handle *handle,
 		*auto_neg = hdev->hw.mac.autoneg;
 }
 
-static void hclge_get_media_type(struct hnae3_handle *handle, u8 *media_type,
-				 u8 *module_type)
+void hclge_get_media_type(struct hnae3_handle *handle, u8 *media_type,
+			  u8 *module_type)
 {
 	struct hclge_vport *vport = hclge_get_vport(handle);
 	struct hclge_dev *hdev = vport->back;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

@@ -1167,4 +1167,6 @@ struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf);
 int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type);
 void hclge_reset_task_schedule(struct hclge_dev *hdev);
 void hclge_reset_event(struct pci_dev *pdev, struct hnae3_handle *handle);
+void hclge_get_media_type(struct hnae3_handle *handle, u8 *media_type,
+			  u8 *module_type);
 #endif