提交 a935601e 编写于 作者: B Bhupesh Sharma 提交者: Bjorn Helgaas

PCI: qcom: Add SM8150 SoC support

The PCIe IP (rev 1.5.0) on SM8150 SoC is similar to the one used on
SM8250. Add SM8150 support, reusing the members of ops_1_9_0.

Link: https://lore.kernel.org/r/20220326060810.1797516-3-bhupesh.sharma@linaro.orgSigned-off-by: NBhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: NDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Cc: Vinod Koul <vkoul@kernel.org>
上级 a6e25b39
......@@ -1523,6 +1523,13 @@ static const struct qcom_pcie_cfg sdm845_cfg = {
.has_tbu_clk = true,
};
static const struct qcom_pcie_cfg sm8150_cfg = {
/* sm8150 has qcom IP rev 1.5.0. However 1.5.0 ops are same as
* 1.9.0, so reuse the same.
*/
.ops = &ops_1_9_0,
};
static const struct qcom_pcie_cfg sm8250_cfg = {
.ops = &ops_1_9_0,
.has_tbu_clk = true,
......@@ -1655,6 +1662,7 @@ static const struct of_device_id qcom_pcie_match[] = {
{ .compatible = "qcom,pcie-ipq4019", .data = &ipq4019_cfg },
{ .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },
{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
{ .compatible = "qcom,pcie-sm8150", .data = &sm8150_cfg },
{ .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },
{ .compatible = "qcom,pcie-sc8180x", .data = &sm8250_cfg },
{ .compatible = "qcom,pcie-sm8450-pcie0", .data = &sm8450_pcie0_cfg },
......
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