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体验新版 GitCode,发现更多精彩内容 >>
提交
a7a2cc31
编写于
1月 02, 2006
作者:
D
Dave Airlie
提交者:
Dave Airlie
1月 02, 2006
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
drm: move ioctl flags to a bit field of flags
From: Dave Airlie Signed-off-by:
N
Dave Airlie
<
airlied@linux.ie
>
上级
92514243
变更
11
隐藏空白更改
内联
并排
Showing
11 changed file
with
182 addition
and
177 deletion
+182
-177
drivers/char/drm/drmP.h
drivers/char/drm/drmP.h
+6
-2
drivers/char/drm/drm_drv.c
drivers/char/drm/drm_drv.c
+56
-55
drivers/char/drm/i810_dma.c
drivers/char/drm/i810_dma.c
+15
-15
drivers/char/drm/i830_dma.c
drivers/char/drm/i830_dma.c
+14
-14
drivers/char/drm/i915_dma.c
drivers/char/drm/i915_dma.c
+12
-12
drivers/char/drm/mga_state.c
drivers/char/drm/mga_state.c
+13
-13
drivers/char/drm/r128_state.c
drivers/char/drm/r128_state.c
+17
-17
drivers/char/drm/radeon_state.c
drivers/char/drm/radeon_state.c
+27
-27
drivers/char/drm/savage_bci.c
drivers/char/drm/savage_bci.c
+4
-4
drivers/char/drm/sis_mm.c
drivers/char/drm/sis_mm.c
+6
-6
drivers/char/drm/via_dma.c
drivers/char/drm/via_dma.c
+12
-12
未找到文件。
drivers/char/drm/drmP.h
浏览文件 @
a7a2cc31
...
...
@@ -272,10 +272,13 @@ typedef int drm_ioctl_t(struct inode *inode, struct file *filp,
typedef
int
drm_ioctl_compat_t
(
struct
file
*
filp
,
unsigned
int
cmd
,
unsigned
long
arg
);
#define DRM_AUTH 0x1
#define DRM_MASTER 0x2
#define DRM_ROOT_ONLY 0x4
typedef
struct
drm_ioctl_desc
{
drm_ioctl_t
*
func
;
int
auth_needed
;
int
root_only
;
int
flags
;
}
drm_ioctl_desc_t
;
typedef
struct
drm_devstate
{
...
...
@@ -370,6 +373,7 @@ typedef struct drm_buf_entry {
/** File private data */
typedef
struct
drm_file
{
int
authenticated
;
int
master
;
int
minor
;
pid_t
pid
;
uid_t
uid
;
...
...
drivers/char/drm/drm_drv.c
浏览文件 @
a7a2cc31
...
...
@@ -56,66 +56,66 @@ static int drm_version(struct inode *inode, struct file *filp,
/** Ioctl table */
static
drm_ioctl_desc_t
drm_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_IOCTL_VERSION
)]
=
{
drm_version
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_UNIQUE
)]
=
{
drm_getunique
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_MAGIC
)]
=
{
drm_getmagic
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_IRQ_BUSID
)]
=
{
drm_irq_by_busid
,
0
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_MAP
)]
=
{
drm_getmap
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_CLIENT
)]
=
{
drm_getclient
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_STATS
)]
=
{
drm_getstats
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SET_VERSION
)]
=
{
drm_setversion
,
0
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SET_UNIQUE
)]
=
{
drm_setunique
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_BLOCK
)]
=
{
drm_noop
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_UNBLOCK
)]
=
{
drm_noop
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AUTH_MAGIC
)]
=
{
drm_authmagic
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_MAP
)]
=
{
drm_addmap_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RM_MAP
)]
=
{
drm_rmmap_ioctl
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SET_SAREA_CTX
)]
=
{
drm_setsareactx
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_SAREA_CTX
)]
=
{
drm_getsareactx
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_CTX
)]
=
{
drm_addctx
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RM_CTX
)]
=
{
drm_rmctx
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_MOD_CTX
)]
=
{
drm_modctx
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_CTX
)]
=
{
drm_getctx
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SWITCH_CTX
)]
=
{
drm_switchctx
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_NEW_CTX
)]
=
{
drm_newctx
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RES_CTX
)]
=
{
drm_resctx
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_DRAW
)]
=
{
drm_adddraw
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RM_DRAW
)]
=
{
drm_rmdraw
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_LOCK
)]
=
{
drm_lock
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_UNLOCK
)]
=
{
drm_unlock
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_FINISH
)]
=
{
drm_noop
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_BUFS
)]
=
{
drm_addbufs
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_MARK_BUFS
)]
=
{
drm_markbufs
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_INFO_BUFS
)]
=
{
drm_infobufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_MAP_BUFS
)]
=
{
drm_mapbufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_FREE_BUFS
)]
=
{
drm_freebufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_VERSION
)]
=
{
drm_version
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_UNIQUE
)]
=
{
drm_getunique
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_MAGIC
)]
=
{
drm_getmagic
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_IRQ_BUSID
)]
=
{
drm_irq_by_busid
,
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_MAP
)]
=
{
drm_getmap
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_CLIENT
)]
=
{
drm_getclient
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_STATS
)]
=
{
drm_getstats
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SET_VERSION
)]
=
{
drm_setversion
,
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SET_UNIQUE
)]
=
{
drm_setunique
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_BLOCK
)]
=
{
drm_noop
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_UNBLOCK
)]
=
{
drm_noop
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AUTH_MAGIC
)]
=
{
drm_authmagic
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_MAP
)]
=
{
drm_addmap_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RM_MAP
)]
=
{
drm_rmmap_ioctl
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SET_SAREA_CTX
)]
=
{
drm_setsareactx
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_SAREA_CTX
)]
=
{
drm_getsareactx
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_CTX
)]
=
{
drm_addctx
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RM_CTX
)]
=
{
drm_rmctx
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_MOD_CTX
)]
=
{
drm_modctx
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_GET_CTX
)]
=
{
drm_getctx
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SWITCH_CTX
)]
=
{
drm_switchctx
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_NEW_CTX
)]
=
{
drm_newctx
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RES_CTX
)]
=
{
drm_resctx
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_DRAW
)]
=
{
drm_adddraw
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_RM_DRAW
)]
=
{
drm_rmdraw
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_LOCK
)]
=
{
drm_lock
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_UNLOCK
)]
=
{
drm_unlock
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_FINISH
)]
=
{
drm_noop
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_ADD_BUFS
)]
=
{
drm_addbufs
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_MARK_BUFS
)]
=
{
drm_markbufs
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_INFO_BUFS
)]
=
{
drm_infobufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_MAP_BUFS
)]
=
{
drm_mapbufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_FREE_BUFS
)]
=
{
drm_freebufs
,
DRM_AUTH
},
/* The DRM_IOCTL_DMA ioctl should be defined by the driver. */
[
DRM_IOCTL_NR
(
DRM_IOCTL_DMA
)]
=
{
NULL
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_CONTROL
)]
=
{
drm_control
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_CONTROL
)]
=
{
drm_control
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
#if __OS_HAS_AGP
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_ACQUIRE
)]
=
{
drm_agp_acquire_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_RELEASE
)]
=
{
drm_agp_release_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_ENABLE
)]
=
{
drm_agp_enable_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_INFO
)]
=
{
drm_agp_info_ioctl
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_ALLOC
)]
=
{
drm_agp_alloc_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_FREE
)]
=
{
drm_agp_free_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_BIND
)]
=
{
drm_agp_bind_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_UNBIND
)]
=
{
drm_agp_unbind_ioctl
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_ACQUIRE
)]
=
{
drm_agp_acquire_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_RELEASE
)]
=
{
drm_agp_release_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_ENABLE
)]
=
{
drm_agp_enable_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_INFO
)]
=
{
drm_agp_info_ioctl
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_ALLOC
)]
=
{
drm_agp_alloc_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_FREE
)]
=
{
drm_agp_free_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_BIND
)]
=
{
drm_agp_bind_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_AGP_UNBIND
)]
=
{
drm_agp_unbind_ioctl
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
#endif
[
DRM_IOCTL_NR
(
DRM_IOCTL_SG_ALLOC
)]
=
{
drm_sg_alloc
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SG_FREE
)]
=
{
drm_sg_free
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SG_ALLOC
)]
=
{
drm_sg_alloc
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_SG_FREE
)]
=
{
drm_sg_free
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_WAIT_VBLANK
)]
=
{
drm_wait_vblank
,
0
,
0
},
[
DRM_IOCTL_NR
(
DRM_IOCTL_WAIT_VBLANK
)]
=
{
drm_wait_vblank
,
0
},
};
#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( drm_ioctls )
...
...
@@ -496,8 +496,9 @@ int drm_ioctl(struct inode *inode, struct file *filp,
if
(
!
func
)
{
DRM_DEBUG
(
"no function
\n
"
);
retcode
=
-
EINVAL
;
}
else
if
((
ioctl
->
root_only
&&
!
capable
(
CAP_SYS_ADMIN
))
||
(
ioctl
->
auth_needed
&&
!
priv
->
authenticated
))
{
}
else
if
(((
ioctl
->
flags
&
DRM_ROOT_ONLY
)
&&
!
capable
(
CAP_SYS_ADMIN
))
||
((
ioctl
->
flags
&
DRM_AUTH
)
&&
!
priv
->
authenticated
)
||
((
ioctl
->
flags
&
DRM_MASTER
)
&&
!
priv
->
master
))
{
retcode
=
-
EACCES
;
}
else
{
retcode
=
func
(
inode
,
filp
,
cmd
,
arg
);
...
...
drivers/char/drm/i810_dma.c
浏览文件 @
a7a2cc31
...
...
@@ -1357,21 +1357,21 @@ int i810_driver_dma_quiescent(drm_device_t * dev)
}
drm_ioctl_desc_t
i810_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_I810_INIT
)]
=
{
i810_dma_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_I810_VERTEX
)]
=
{
i810_dma_vertex
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_CLEAR
)]
=
{
i810_clear_bufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_FLUSH
)]
=
{
i810_flush_ioctl
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_GETAGE
)]
=
{
i810_getage
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_GETBUF
)]
=
{
i810_getbuf
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_SWAP
)]
=
{
i810_swap_bufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_COPY
)]
=
{
i810_copybuf
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_DOCOPY
)]
=
{
i810_docopy
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_OV0INFO
)]
=
{
i810_ov0_info
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_FSTATUS
)]
=
{
i810_fstatus
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_OV0FLIP
)]
=
{
i810_ov0_flip
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_MC
)]
=
{
i810_dma_mc
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_I810_RSTATUS
)]
=
{
i810_rstatus
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I810_FLIP
)]
=
{
i810_flip_bufs
,
1
,
0
}
[
DRM_IOCTL_NR
(
DRM_I810_INIT
)]
=
{
i810_dma_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_I810_VERTEX
)]
=
{
i810_dma_vertex
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_CLEAR
)]
=
{
i810_clear_bufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_FLUSH
)]
=
{
i810_flush_ioctl
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_GETAGE
)]
=
{
i810_getage
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_GETBUF
)]
=
{
i810_getbuf
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_SWAP
)]
=
{
i810_swap_bufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_COPY
)]
=
{
i810_copybuf
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_DOCOPY
)]
=
{
i810_docopy
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_OV0INFO
)]
=
{
i810_ov0_info
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_FSTATUS
)]
=
{
i810_fstatus
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_OV0FLIP
)]
=
{
i810_ov0_flip
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_MC
)]
=
{
i810_dma_mc
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_I810_RSTATUS
)]
=
{
i810_rstatus
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I810_FLIP
)]
=
{
i810_flip_bufs
,
DRM_AUTH
}
};
int
i810_max_ioctl
=
DRM_ARRAY_SIZE
(
i810_ioctls
);
...
...
drivers/char/drm/i830_dma.c
浏览文件 @
a7a2cc31
...
...
@@ -1555,20 +1555,20 @@ int i830_driver_dma_quiescent(drm_device_t * dev)
}
drm_ioctl_desc_t
i830_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_I830_INIT
)]
=
{
i830_dma_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_I830_VERTEX
)]
=
{
i830_dma_vertex
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_CLEAR
)]
=
{
i830_clear_bufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_FLUSH
)]
=
{
i830_flush_ioctl
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_GETAGE
)]
=
{
i830_getage
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_GETBUF
)]
=
{
i830_getbuf
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_SWAP
)]
=
{
i830_swap_bufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_COPY
)]
=
{
i830_copybuf
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_DOCOPY
)]
=
{
i830_docopy
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_FLIP
)]
=
{
i830_flip_bufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_IRQ_EMIT
)]
=
{
i830_irq_emit
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_IRQ_WAIT
)]
=
{
i830_irq_wait
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_GETPARAM
)]
=
{
i830_getparam
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I830_SETPARAM
)]
=
{
i830_setparam
,
1
,
0
}
[
DRM_IOCTL_NR
(
DRM_I830_INIT
)]
=
{
i830_dma_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_I830_VERTEX
)]
=
{
i830_dma_vertex
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_CLEAR
)]
=
{
i830_clear_bufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_FLUSH
)]
=
{
i830_flush_ioctl
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_GETAGE
)]
=
{
i830_getage
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_GETBUF
)]
=
{
i830_getbuf
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_SWAP
)]
=
{
i830_swap_bufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_COPY
)]
=
{
i830_copybuf
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_DOCOPY
)]
=
{
i830_docopy
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_FLIP
)]
=
{
i830_flip_bufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_IRQ_EMIT
)]
=
{
i830_irq_emit
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_IRQ_WAIT
)]
=
{
i830_irq_wait
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_GETPARAM
)]
=
{
i830_getparam
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I830_SETPARAM
)]
=
{
i830_setparam
,
DRM_AUTH
}
};
int
i830_max_ioctl
=
DRM_ARRAY_SIZE
(
i830_ioctls
);
...
...
drivers/char/drm/i915_dma.c
浏览文件 @
a7a2cc31
...
...
@@ -729,18 +729,18 @@ void i915_driver_preclose(drm_device_t * dev, DRMFILE filp)
}
drm_ioctl_desc_t
i915_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_I915_INIT
)]
=
{
i915_dma_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_I915_FLUSH
)]
=
{
i915_flush_ioctl
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_FLIP
)]
=
{
i915_flip_bufs
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_BATCHBUFFER
)]
=
{
i915_batchbuffer
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_IRQ_EMIT
)]
=
{
i915_irq_emit
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_IRQ_WAIT
)]
=
{
i915_irq_wait
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_GETPARAM
)]
=
{
i915_getparam
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_SETPARAM
)]
=
{
i915_setparam
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_I915_ALLOC
)]
=
{
i915_mem_alloc
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_FREE
)]
=
{
i915_mem_free
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_I915_INIT_HEAP
)]
=
{
i915_mem_init_heap
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_I915_CMDBUFFER
)]
=
{
i915_cmdbuffer
,
1
,
0
}
[
DRM_IOCTL_NR
(
DRM_I915_INIT
)]
=
{
i915_dma_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_I915_FLUSH
)]
=
{
i915_flush_ioctl
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_FLIP
)]
=
{
i915_flip_bufs
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_BATCHBUFFER
)]
=
{
i915_batchbuffer
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_IRQ_EMIT
)]
=
{
i915_irq_emit
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_IRQ_WAIT
)]
=
{
i915_irq_wait
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_GETPARAM
)]
=
{
i915_getparam
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_SETPARAM
)]
=
{
i915_setparam
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_I915_ALLOC
)]
=
{
i915_mem_alloc
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_FREE
)]
=
{
i915_mem_free
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_I915_INIT_HEAP
)]
=
{
i915_mem_init_heap
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_I915_CMDBUFFER
)]
=
{
i915_cmdbuffer
,
DRM_AUTH
}
};
int
i915_max_ioctl
=
DRM_ARRAY_SIZE
(
i915_ioctls
);
...
...
drivers/char/drm/mga_state.c
浏览文件 @
a7a2cc31
...
...
@@ -1127,19 +1127,19 @@ static int mga_wait_fence(DRM_IOCTL_ARGS)
}
drm_ioctl_desc_t
mga_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_MGA_INIT
)]
=
{
mga_dma_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_MGA_FLUSH
)]
=
{
mga_dma_flush
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_RESET
)]
=
{
mga_dma_reset
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_SWAP
)]
=
{
mga_dma_swap
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_CLEAR
)]
=
{
mga_dma_clear
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_VERTEX
)]
=
{
mga_dma_vertex
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_INDICES
)]
=
{
mga_dma_indices
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_ILOAD
)]
=
{
mga_dma_iload
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_BLIT
)]
=
{
mga_dma_blit
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_GETPARAM
)]
=
{
mga_getparam
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_SET_FENCE
)]
=
{
mga_set_fence
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_WAIT_FENCE
)]
=
{
mga_wait_fence
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_MGA_DMA_BOOTSTRAP
)]
=
{
mga_dma_bootstrap
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_MGA_INIT
)]
=
{
mga_dma_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_MGA_FLUSH
)]
=
{
mga_dma_flush
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_RESET
)]
=
{
mga_dma_reset
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_SWAP
)]
=
{
mga_dma_swap
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_CLEAR
)]
=
{
mga_dma_clear
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_VERTEX
)]
=
{
mga_dma_vertex
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_INDICES
)]
=
{
mga_dma_indices
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_ILOAD
)]
=
{
mga_dma_iload
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_BLIT
)]
=
{
mga_dma_blit
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_GETPARAM
)]
=
{
mga_getparam
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_SET_FENCE
)]
=
{
mga_set_fence
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_WAIT_FENCE
)]
=
{
mga_wait_fence
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_MGA_DMA_BOOTSTRAP
)]
=
{
mga_dma_bootstrap
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
};
int
mga_max_ioctl
=
DRM_ARRAY_SIZE
(
mga_ioctls
);
drivers/char/drm/r128_state.c
浏览文件 @
a7a2cc31
...
...
@@ -1690,23 +1690,23 @@ void r128_driver_lastclose(drm_device_t * dev)
}
drm_ioctl_desc_t
r128_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_R128_INIT
)]
=
{
r128_cce_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_START
)]
=
{
r128_cce_start
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_STOP
)]
=
{
r128_cce_stop
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_RESET
)]
=
{
r128_cce_reset
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_IDLE
)]
=
{
r128_cce_idle
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_RESET
)]
=
{
r128_engine_reset
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_FULLSCREEN
)]
=
{
r128_fullscreen
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_SWAP
)]
=
{
r128_cce_swap
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_FLIP
)]
=
{
r128_cce_flip
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_CLEAR
)]
=
{
r128_cce_clear
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_VERTEX
)]
=
{
r128_cce_vertex
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_INDICES
)]
=
{
r128_cce_indices
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_BLIT
)]
=
{
r128_cce_blit
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_DEPTH
)]
=
{
r128_cce_depth
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_STIPPLE
)]
=
{
r128_cce_stipple
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_INDIRECT
)]
=
{
r128_cce_indirect
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_R128_GETPARAM
)]
=
{
r128_getparam
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_R128_INIT
)]
=
{
r128_cce_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_START
)]
=
{
r128_cce_start
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_STOP
)]
=
{
r128_cce_stop
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_RESET
)]
=
{
r128_cce_reset
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_R128_CCE_IDLE
)]
=
{
r128_cce_idle
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_RESET
)]
=
{
r128_engine_reset
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_FULLSCREEN
)]
=
{
r128_fullscreen
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_SWAP
)]
=
{
r128_cce_swap
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_FLIP
)]
=
{
r128_cce_flip
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_CLEAR
)]
=
{
r128_cce_clear
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_VERTEX
)]
=
{
r128_cce_vertex
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_INDICES
)]
=
{
r128_cce_indices
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_BLIT
)]
=
{
r128_cce_blit
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_DEPTH
)]
=
{
r128_cce_depth
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_STIPPLE
)]
=
{
r128_cce_stipple
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_R128_INDIRECT
)]
=
{
r128_cce_indirect
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_R128_GETPARAM
)]
=
{
r128_getparam
,
DRM_AUTH
},
};
int
r128_max_ioctl
=
DRM_ARRAY_SIZE
(
r128_ioctls
);
drivers/char/drm/radeon_state.c
浏览文件 @
a7a2cc31
...
...
@@ -3116,33 +3116,33 @@ void radeon_driver_postclose(drm_device_t * dev, drm_file_t * filp_priv)
}
drm_ioctl_desc_t
radeon_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_INIT
)]
=
{
radeon_cp_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_START
)]
=
{
radeon_cp_start
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_STOP
)]
=
{
radeon_cp_stop
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_RESET
)]
=
{
radeon_cp_reset
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_IDLE
)]
=
{
radeon_cp_idle
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_RESUME
)]
=
{
radeon_cp_resume
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_RESET
)]
=
{
radeon_engine_reset
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_FULLSCREEN
)]
=
{
radeon_fullscreen
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SWAP
)]
=
{
radeon_cp_swap
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CLEAR
)]
=
{
radeon_cp_clear
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_VERTEX
)]
=
{
radeon_cp_vertex
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_INDICES
)]
=
{
radeon_cp_indices
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_TEXTURE
)]
=
{
radeon_cp_texture
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_STIPPLE
)]
=
{
radeon_cp_stipple
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_INDIRECT
)]
=
{
radeon_cp_indirect
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_RADEON_VERTEX2
)]
=
{
radeon_cp_vertex2
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CMDBUF
)]
=
{
radeon_cp_cmdbuf
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_GETPARAM
)]
=
{
radeon_cp_getparam
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_FLIP
)]
=
{
radeon_cp_flip
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_ALLOC
)]
=
{
radeon_mem_alloc
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_FREE
)]
=
{
radeon_mem_free
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_INIT_HEAP
)]
=
{
radeon_mem_init_heap
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_RADEON_IRQ_EMIT
)]
=
{
radeon_irq_emit
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_IRQ_WAIT
)]
=
{
radeon_irq_wait
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SETPARAM
)]
=
{
radeon_cp_setparam
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SURF_ALLOC
)]
=
{
radeon_surface_alloc
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SURF_FREE
)]
=
{
radeon_surface_free
,
1
,
0
}
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_INIT
)]
=
{
radeon_cp_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_START
)]
=
{
radeon_cp_start
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_STOP
)]
=
{
radeon_cp_stop
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_RESET
)]
=
{
radeon_cp_reset
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_IDLE
)]
=
{
radeon_cp_idle
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CP_RESUME
)]
=
{
radeon_cp_resume
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_RESET
)]
=
{
radeon_engine_reset
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_FULLSCREEN
)]
=
{
radeon_fullscreen
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SWAP
)]
=
{
radeon_cp_swap
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CLEAR
)]
=
{
radeon_cp_clear
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_VERTEX
)]
=
{
radeon_cp_vertex
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_INDICES
)]
=
{
radeon_cp_indices
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_TEXTURE
)]
=
{
radeon_cp_texture
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_STIPPLE
)]
=
{
radeon_cp_stipple
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_INDIRECT
)]
=
{
radeon_cp_indirect
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_RADEON_VERTEX2
)]
=
{
radeon_cp_vertex2
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_CMDBUF
)]
=
{
radeon_cp_cmdbuf
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_GETPARAM
)]
=
{
radeon_cp_getparam
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_FLIP
)]
=
{
radeon_cp_flip
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_ALLOC
)]
=
{
radeon_mem_alloc
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_FREE
)]
=
{
radeon_mem_free
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_INIT_HEAP
)]
=
{
radeon_mem_init_heap
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_RADEON_IRQ_EMIT
)]
=
{
radeon_irq_emit
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_IRQ_WAIT
)]
=
{
radeon_irq_wait
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SETPARAM
)]
=
{
radeon_cp_setparam
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SURF_ALLOC
)]
=
{
radeon_surface_alloc
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_RADEON_SURF_FREE
)]
=
{
radeon_surface_free
,
DRM_AUTH
}
};
int
radeon_max_ioctl
=
DRM_ARRAY_SIZE
(
radeon_ioctls
);
drivers/char/drm/savage_bci.c
浏览文件 @
a7a2cc31
...
...
@@ -1104,10 +1104,10 @@ void savage_reclaim_buffers(drm_device_t * dev, DRMFILE filp)
}
drm_ioctl_desc_t
savage_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_INIT
)]
=
{
savage_bci_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_CMDBUF
)]
=
{
savage_bci_cmdbuf
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_EVENT_EMIT
)]
=
{
savage_bci_event_emit
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_EVENT_WAIT
)]
=
{
savage_bci_event_wait
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_INIT
)]
=
{
savage_bci_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_CMDBUF
)]
=
{
savage_bci_cmdbuf
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_EVENT_EMIT
)]
=
{
savage_bci_event_emit
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_SAVAGE_BCI_EVENT_WAIT
)]
=
{
savage_bci_event_wait
,
DRM_AUTH
},
};
int
savage_max_ioctl
=
DRM_ARRAY_SIZE
(
savage_ioctls
);
drivers/char/drm/sis_mm.c
浏览文件 @
a7a2cc31
...
...
@@ -403,12 +403,12 @@ int sis_final_context(struct drm_device *dev, int context)
}
drm_ioctl_desc_t
sis_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_SIS_FB_ALLOC
)]
=
{
sis_fb_alloc
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SIS_FB_FREE
)]
=
{
sis_fb_free
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SIS_AGP_INIT
)]
=
{
sis_ioctl_agp_init
,
1
,
1
},
[
DRM_IOCTL_NR
(
DRM_SIS_AGP_ALLOC
)]
=
{
sis_ioctl_agp_alloc
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SIS_AGP_FREE
)]
=
{
sis_ioctl_agp_free
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_SIS_FB_INIT
)]
=
{
sis_fb_init
,
1
,
1
}
[
DRM_IOCTL_NR
(
DRM_SIS_FB_ALLOC
)]
=
{
sis_fb_alloc
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_SIS_FB_FREE
)]
=
{
sis_fb_free
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_SIS_AGP_INIT
)]
=
{
sis_ioctl_agp_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
},
[
DRM_IOCTL_NR
(
DRM_SIS_AGP_ALLOC
)]
=
{
sis_ioctl_agp_alloc
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_SIS_AGP_FREE
)]
=
{
sis_ioctl_agp_free
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_SIS_FB_INIT
)]
=
{
sis_fb_init
,
DRM_AUTH
|
DRM_MASTER
|
DRM_ROOT_ONLY
}
};
int
sis_max_ioctl
=
DRM_ARRAY_SIZE
(
sis_ioctls
);
drivers/char/drm/via_dma.c
浏览文件 @
a7a2cc31
...
...
@@ -725,18 +725,18 @@ int via_cmdbuf_size(DRM_IOCTL_ARGS)
}
drm_ioctl_desc_t
via_ioctls
[]
=
{
[
DRM_IOCTL_NR
(
DRM_VIA_ALLOCMEM
)]
=
{
via_mem_alloc
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_FREEMEM
)]
=
{
via_mem_free
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_AGP_INIT
)]
=
{
via_agp_init
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_FB_INIT
)]
=
{
via_fb_init
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_MAP_INIT
)]
=
{
via_map_init
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_DEC_FUTEX
)]
=
{
via_decoder_futex
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_DMA_INIT
)]
=
{
via_dma_init
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_CMDBUFFER
)]
=
{
via_cmdbuffer
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_FLUSH
)]
=
{
via_flush_ioctl
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_PCICMD
)]
=
{
via_pci_cmdbuffer
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_CMDBUF_SIZE
)]
=
{
via_cmdbuf_size
,
1
,
0
},
[
DRM_IOCTL_NR
(
DRM_VIA_WAIT_IRQ
)]
=
{
via_wait_irq
,
1
,
0
}
[
DRM_IOCTL_NR
(
DRM_VIA_ALLOCMEM
)]
=
{
via_mem_alloc
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_FREEMEM
)]
=
{
via_mem_free
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_AGP_INIT
)]
=
{
via_agp_init
,
DRM_AUTH
|
DRM_MASTER
},
[
DRM_IOCTL_NR
(
DRM_VIA_FB_INIT
)]
=
{
via_fb_init
,
DRM_AUTH
|
DRM_MASTER
},
[
DRM_IOCTL_NR
(
DRM_VIA_MAP_INIT
)]
=
{
via_map_init
,
DRM_AUTH
|
DRM_MASTER
},
[
DRM_IOCTL_NR
(
DRM_VIA_DEC_FUTEX
)]
=
{
via_decoder_futex
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_DMA_INIT
)]
=
{
via_dma_init
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_CMDBUFFER
)]
=
{
via_cmdbuffer
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_FLUSH
)]
=
{
via_flush_ioctl
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_PCICMD
)]
=
{
via_pci_cmdbuffer
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_CMDBUF_SIZE
)]
=
{
via_cmdbuf_size
,
DRM_AUTH
},
[
DRM_IOCTL_NR
(
DRM_VIA_WAIT_IRQ
)]
=
{
via_wait_irq
,
DRM_AUTH
}
};
int
via_max_ioctl
=
DRM_ARRAY_SIZE
(
via_ioctls
);
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