提交 a6e3c122 编写于 作者: A Alexander Graf 提交者: Laibin Qiu

KVM: arm64: vgic-its: Change default outer cacheability for {PEND, PROP}BASER

mainline inclusion
from mainline-v5.9
commit 73153217
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I5O7IH
CVE: NA

-------------

PENDBASER and PROPBASER define the outer caching mode for LPI tables.
The memory backing them may not be outer sharable, so we mark them as nC
by default. This however, breaks Windows on ARM which only accepts
SameAsInner or RaWaWb as values for outer cachability.

We do today already allow the outer mode to be set to SameAsInner
explicitly, so the easy fix is to default to that instead of nC for
situations when an OS asks for a not fulfillable cachability request.

This fixes booting Windows in KVM with vgicv3 and ITS enabled for me.
Signed-off-by: NAlexander Graf <graf@amazon.com>
Signed-off-by: NMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200701140206.8664-1-graf@amazon.comSigned-off-by: NZengruan Ye <yezengruan@huawei.com>
Reviewed-by: NZenghui Yu <yuzenghui@huawei.com>
Signed-off-by: NLaibin Qiu <qiulaibin@huawei.com>
上级 38c31861
...@@ -337,7 +337,7 @@ u64 vgic_sanitise_outer_cacheability(u64 field) ...@@ -337,7 +337,7 @@ u64 vgic_sanitise_outer_cacheability(u64 field)
case GIC_BASER_CACHE_nC: case GIC_BASER_CACHE_nC:
return field; return field;
default: default:
return GIC_BASER_CACHE_nC; return GIC_BASER_CACHE_SameAsInner;
} }
} }
......
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