ARM: dts: enable SMP support for bcm28155

Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NAlex Elder <elder@linaro.org>
Signed-off-by: NMatt Porter <mporter@linaro.org>

arch/arm/boot/dts/bcm11351.dtsi

@@ -27,6 +27,25 @@
 		bootargs = "console=ttyS0,115200n8";
 	};
 
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "brcm,bcm11351-cpu-method";
+		secondary-boot-reg = <0x3500417c>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <1>;
+		};
+	};
+
 	gic: interrupt-controller@3ff00100 {
 		compatible = "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;