i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO
stable inclusion from stable-5.10.14 commit 40545c4dd90c96f8f4ecd7eac7b107e14f467619 bugzilla: 48051 -------------------------------- [ Upstream commit 2f3a0828 ] VI I2C controller has known hardware bug where immediate multiple writes to TX_FIFO register gets stuck. Recommended software work around is to read I2C register after each write to TX_FIFO register to flush out the data. This patch implements this work around for VI I2C controller. Signed-off-by: NSowjanya Komatineni <skomatineni@nvidia.com> Reviewed-by: NDmitry Osipenko <digetx@gmail.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NWolfram Sang <wsa@kernel.org> Signed-off-by: NSasha Levin <sashal@kernel.org> Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com> Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
Showing
想要评论请 注册 或 登录