提交 9faac7b9 编写于 作者: W Weijun Yang 提交者: Ulf Hansson

mmc: sdhci: enable tuning for DDR50

CMD19 tuning is also available for DDR50 mode.
Signed-off-by: NWeijun Yang <york.yang@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
上级 4324f6de
...@@ -1895,9 +1895,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) ...@@ -1895,9 +1895,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
tuning_count = host->tuning_count; tuning_count = host->tuning_count;
/* /*
* The Host Controller needs tuning only in case of SDR104 mode * The Host Controller needs tuning in case of SDR104 and DDR50
* and for SDR50 mode when Use Tuning for SDR50 is set in the * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
* Capabilities register. * the Capabilities register.
* If the Host Controller supports the HS200 mode then the * If the Host Controller supports the HS200 mode then the
* tuning function has to be executed. * tuning function has to be executed.
*/ */
...@@ -1917,6 +1917,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) ...@@ -1917,6 +1917,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
break; break;
case MMC_TIMING_UHS_SDR104: case MMC_TIMING_UHS_SDR104:
case MMC_TIMING_UHS_DDR50:
break; break;
case MMC_TIMING_UHS_SDR50: case MMC_TIMING_UHS_SDR50:
......
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