提交 9e2c0819 编写于 作者: M Mark Brown 提交者: Catalin Marinas

arm64/sysreg: Support generation of RAZ fields

Add a statement for RAZ bitfields to the automatic register generation
script. Nothing is emitted to the header for these fields.
Signed-off-by: NMark Brown <broonie@kernel.org>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220510161208.631259-7-broonie@kernel.orgSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com>
上级 ec0067a6
......@@ -226,6 +226,13 @@ END {
next
}
/^Raz/ && (block == "Sysreg" || block == "SysregFields") {
expect_fields(2)
parse_bitdef(reg, field, $2)
next
}
/^Enum/ {
change_block("Enum", "Sysreg", "Enum")
expect_fields(3)
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册