提交 9e298f44 编写于 作者: T Takashi Iwai

Merge branch 'topic/oxygen' into topic/hda

snd-oxygen-lib-objs := oxygen_io.o oxygen_lib.o oxygen_mixer.o oxygen_pcm.o
snd-hifier-objs := hifier.o
snd-oxygen-objs := oxygen.o
snd-virtuoso-objs := virtuoso.o
snd-virtuoso-objs := virtuoso.o xonar_lib.o \
xonar_pcm179x.o xonar_cs43xx.o xonar_hdmi.o
obj-$(CONFIG_SND_OXYGEN_LIB) += snd-oxygen-lib.o
obj-$(CONFIG_SND_HIFIER) += snd-hifier.o
......
#ifndef CS2000_H_INCLUDED
#define CS2000_H_INCLUDED
#define CS2000_DEV_ID 0x01
#define CS2000_DEV_CTRL 0x02
#define CS2000_DEV_CFG_1 0x03
#define CS2000_DEV_CFG_2 0x04
#define CS2000_GLOBAL_CFG 0x05
#define CS2000_RATIO_0 0x06 /* 32 bits, big endian */
#define CS2000_RATIO_1 0x0a
#define CS2000_RATIO_2 0x0e
#define CS2000_RATIO_3 0x12
#define CS2000_FUN_CFG_1 0x16
#define CS2000_FUN_CFG_2 0x17
#define CS2000_FUN_CFG_3 0x1e
/* DEV_ID */
#define CS2000_DEVICE_MASK 0xf8
#define CS2000_REVISION_MASK 0x07
/* DEV_CTRL */
#define CS2000_UNLOCK 0x80
#define CS2000_AUX_OUT_DIS 0x02
#define CS2000_CLK_OUT_DIS 0x01
/* DEV_CFG_1 */
#define CS2000_R_MOD_SEL_MASK 0xe0
#define CS2000_R_MOD_SEL_1 0x00
#define CS2000_R_MOD_SEL_2 0x20
#define CS2000_R_MOD_SEL_4 0x40
#define CS2000_R_MOD_SEL_8 0x60
#define CS2000_R_MOD_SEL_1_2 0x80
#define CS2000_R_MOD_SEL_1_4 0xa0
#define CS2000_R_MOD_SEL_1_8 0xc0
#define CS2000_R_MOD_SEL_1_16 0xe0
#define CS2000_R_SEL_MASK 0x18
#define CS2000_R_SEL_SHIFT 3
#define CS2000_AUX_OUT_SRC_MASK 0x06
#define CS2000_AUX_OUT_SRC_REF_CLK 0x00
#define CS2000_AUX_OUT_SRC_CLK_IN 0x02
#define CS2000_AUX_OUT_SRC_CLK_OUT 0x04
#define CS2000_AUX_OUT_SRC_PLL_LOCK 0x06
#define CS2000_EN_DEV_CFG_1 0x01
/* DEV_CFG_2 */
#define CS2000_LOCK_CLK_MASK 0x06
#define CS2000_LOCK_CLK_SHIFT 1
#define CS2000_FRAC_N_SRC_MASK 0x01
#define CS2000_FRAC_N_SRC_STATIC 0x00
#define CS2000_FRAC_N_SRC_DYNAMIC 0x01
/* GLOBAL_CFG */
#define CS2000_FREEZE 0x08
#define CS2000_EN_DEV_CFG_2 0x01
/* FUN_CFG_1 */
#define CS2000_CLK_SKIP_EN 0x80
#define CS2000_AUX_LOCK_CFG_MASK 0x40
#define CS2000_AUX_LOCK_CFG_PP_HIGH 0x00
#define CS2000_AUX_LOCK_CFG_OD_LOW 0x40
#define CS2000_REF_CLK_DIV_MASK 0x18
#define CS2000_REF_CLK_DIV_4 0x00
#define CS2000_REF_CLK_DIV_2 0x08
#define CS2000_REF_CLK_DIV_1 0x10
/* FUN_CFG_2 */
#define CS2000_CLK_OUT_UNL 0x10
#define CS2000_L_F_RATIO_CFG_MASK 0x08
#define CS2000_L_F_RATIO_CFG_20_12 0x00
#define CS2000_L_F_RATIO_CFG_12_20 0x08
/* FUN_CFG_3 */
#define CS2000_CLK_IN_BW_MASK 0x70
#define CS2000_CLK_IN_BW_1 0x00
#define CS2000_CLK_IN_BW_2 0x10
#define CS2000_CLK_IN_BW_4 0x20
#define CS2000_CLK_IN_BW_8 0x30
#define CS2000_CLK_IN_BW_16 0x40
#define CS2000_CLK_IN_BW_32 0x50
#define CS2000_CLK_IN_BW_64 0x60
#define CS2000_CLK_IN_BW_128 0x70
#endif
......@@ -17,6 +17,12 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* CMI8788:
*
* SPI 0 -> AK4396
*/
#include <linux/delay.h>
#include <linux/pci.h>
#include <sound/control.h>
......@@ -51,23 +57,28 @@ static struct pci_device_id hifier_ids[] __devinitdata = {
MODULE_DEVICE_TABLE(pci, hifier_ids);
struct hifier_data {
u8 ak4396_ctl2;
u8 ak4396_regs[5];
};
static void ak4396_write(struct oxygen *chip, u8 reg, u8 value)
{
struct hifier_data *data = chip->model_data;
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
OXYGEN_SPI_DATA_LENGTH_2 |
OXYGEN_SPI_CLOCK_160 |
(0 << OXYGEN_SPI_CODEC_SHIFT) |
OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
AK4396_WRITE | (reg << 8) | value);
data->ak4396_regs[reg] = value;
}
static void update_ak4396_volume(struct oxygen *chip)
static void ak4396_write_cached(struct oxygen *chip, u8 reg, u8 value)
{
ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]);
ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]);
struct hifier_data *data = chip->model_data;
if (value != data->ak4396_regs[reg])
ak4396_write(chip, reg, value);
}
static void hifier_registers_init(struct oxygen *chip)
......@@ -75,16 +86,19 @@ static void hifier_registers_init(struct oxygen *chip)
struct hifier_data *data = chip->model_data;
ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_ctl2);
ak4396_write(chip, AK4396_CONTROL_2,
data->ak4396_regs[AK4396_CONTROL_2]);
ak4396_write(chip, AK4396_CONTROL_3, AK4396_PCM);
update_ak4396_volume(chip);
ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]);
ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]);
}
static void hifier_init(struct oxygen *chip)
{
struct hifier_data *data = chip->model_data;
data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
data->ak4396_regs[AK4396_CONTROL_2] =
AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
hifier_registers_init(chip);
snd_component_add(chip->card, "AK4396");
......@@ -106,20 +120,29 @@ static void set_ak4396_params(struct oxygen *chip,
struct hifier_data *data = chip->model_data;
u8 value;
value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
if (params_rate(params) <= 54000)
value |= AK4396_DFS_NORMAL;
else if (params_rate(params) <= 108000)
value |= AK4396_DFS_DOUBLE;
else
value |= AK4396_DFS_QUAD;
data->ak4396_ctl2 = value;
msleep(1); /* wait for the new MCLK to become stable */
ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB);
ak4396_write(chip, AK4396_CONTROL_2, value);
ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
if (value != data->ak4396_regs[AK4396_CONTROL_2]) {
ak4396_write(chip, AK4396_CONTROL_1,
AK4396_DIF_24_MSB);
ak4396_write(chip, AK4396_CONTROL_2, value);
ak4396_write(chip, AK4396_CONTROL_1,
AK4396_DIF_24_MSB | AK4396_RSTN);
}
}
static void update_ak4396_volume(struct oxygen *chip)
{
ak4396_write_cached(chip, AK4396_LCH_ATT, chip->dac_volume[0]);
ak4396_write_cached(chip, AK4396_RCH_ATT, chip->dac_volume[1]);
}
static void update_ak4396_mute(struct oxygen *chip)
......@@ -127,11 +150,10 @@ static void update_ak4396_mute(struct oxygen *chip)
struct hifier_data *data = chip->model_data;
u8 value;
value = data->ak4396_ctl2 & ~AK4396_SMUTE;
value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_SMUTE;
if (chip->dac_mute)
value |= AK4396_SMUTE;
data->ak4396_ctl2 = value;
ak4396_write(chip, AK4396_CONTROL_2, value);
ak4396_write_cached(chip, AK4396_CONTROL_2, value);
}
static void set_cs5340_params(struct oxygen *chip,
......@@ -141,21 +163,14 @@ static void set_cs5340_params(struct oxygen *chip,
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
static int hifier_control_filter(struct snd_kcontrol_new *template)
{
if (!strcmp(template->name, "Stereo Upmixing"))
return 1; /* stereo only - we don't need upmixing */
return 0;
}
static const struct oxygen_model model_hifier = {
.shortname = "C-Media CMI8787",
.longname = "C-Media Oxygen HD Audio",
.chip = "CMI8788",
.init = hifier_init,
.control_filter = hifier_control_filter,
.cleanup = hifier_cleanup,
.resume = hifier_resume,
.get_i2s_mclk = oxygen_default_i2s_mclk,
.set_dac_params = set_ak4396_params,
.set_adc_params = set_cs5340_params,
.update_dac_volume = update_ak4396_volume,
......
......@@ -18,6 +18,8 @@
*/
/*
* CMI8788:
*
* SPI 0 -> 1st AK4396 (front)
* SPI 1 -> 2nd AK4396 (surround)
* SPI 2 -> 3rd AK4396 (center/LFE)
......@@ -27,6 +29,10 @@
* GPIO 0 -> DFS0 of AK5385
* GPIO 1 -> DFS1 of AK5385
* GPIO 8 -> enable headphone amplifier on HT-Omega models
*
* CM9780:
*
* GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
*/
#include <linux/delay.h>
......@@ -91,8 +97,8 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids);
#define GPIO_CLARO_HP 0x0100
struct generic_data {
u8 ak4396_ctl2;
u16 saved_wm8785_registers[2];
u8 ak4396_regs[4][5];
u16 wm8785_regs[3];
};
static void ak4396_write(struct oxygen *chip, unsigned int codec,
......@@ -102,12 +108,24 @@ static void ak4396_write(struct oxygen *chip, unsigned int codec,
static const u8 codec_spi_map[4] = {
0, 1, 2, 4
};
struct generic_data *data = chip->model_data;
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
OXYGEN_SPI_DATA_LENGTH_2 |
OXYGEN_SPI_CLOCK_160 |
(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
AK4396_WRITE | (reg << 8) | value);
data->ak4396_regs[codec][reg] = value;
}
static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
u8 reg, u8 value)
{
struct generic_data *data = chip->model_data;
if (value != data->ak4396_regs[codec][reg])
ak4396_write(chip, codec, reg, value);
}
static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
......@@ -120,20 +138,8 @@ static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
(3 << OXYGEN_SPI_CODEC_SHIFT) |
OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
(reg << 9) | value);
if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
data->saved_wm8785_registers[reg] = value;
}
static void update_ak4396_volume(struct oxygen *chip)
{
unsigned int i;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i,
AK4396_LCH_ATT, chip->dac_volume[i * 2]);
ak4396_write(chip, i,
AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
}
if (reg < ARRAY_SIZE(data->wm8785_regs))
data->wm8785_regs[reg] = value;
}
static void ak4396_registers_init(struct oxygen *chip)
......@@ -142,21 +148,25 @@ static void ak4396_registers_init(struct oxygen *chip)
unsigned int i;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i,
AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
ak4396_write(chip, i,
AK4396_CONTROL_2, data->ak4396_ctl2);
ak4396_write(chip, i,
AK4396_CONTROL_3, AK4396_PCM);
ak4396_write(chip, i, AK4396_CONTROL_1,
AK4396_DIF_24_MSB | AK4396_RSTN);
ak4396_write(chip, i, AK4396_CONTROL_2,
data->ak4396_regs[0][AK4396_CONTROL_2]);
ak4396_write(chip, i, AK4396_CONTROL_3,
AK4396_PCM);
ak4396_write(chip, i, AK4396_LCH_ATT,
chip->dac_volume[i * 2]);
ak4396_write(chip, i, AK4396_RCH_ATT,
chip->dac_volume[i * 2 + 1]);
}
update_ak4396_volume(chip);
}
static void ak4396_init(struct oxygen *chip)
{
struct generic_data *data = chip->model_data;
data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
data->ak4396_regs[0][AK4396_CONTROL_2] =
AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
ak4396_registers_init(chip);
snd_component_add(chip->card, "AK4396");
}
......@@ -173,17 +183,17 @@ static void wm8785_registers_init(struct oxygen *chip)
struct generic_data *data = chip->model_data;
wm8785_write(chip, WM8785_R7, 0);
wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
}
static void wm8785_init(struct oxygen *chip)
{
struct generic_data *data = chip->model_data;
data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE |
WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
data->saved_wm8785_registers[1] = WM8785_WL_24;
data->wm8785_regs[0] =
WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
wm8785_registers_init(chip);
snd_component_add(chip->card, "WM8785");
}
......@@ -264,24 +274,36 @@ static void set_ak4396_params(struct oxygen *chip,
unsigned int i;
u8 value;
value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
if (params_rate(params) <= 54000)
value |= AK4396_DFS_NORMAL;
else if (params_rate(params) <= 108000)
value |= AK4396_DFS_DOUBLE;
else
value |= AK4396_DFS_QUAD;
data->ak4396_ctl2 = value;
msleep(1); /* wait for the new MCLK to become stable */
if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i, AK4396_CONTROL_1,
AK4396_DIF_24_MSB);
ak4396_write(chip, i, AK4396_CONTROL_2, value);
ak4396_write(chip, i, AK4396_CONTROL_1,
AK4396_DIF_24_MSB | AK4396_RSTN);
}
}
}
static void update_ak4396_volume(struct oxygen *chip)
{
unsigned int i;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i,
AK4396_CONTROL_1, AK4396_DIF_24_MSB);
ak4396_write(chip, i,
AK4396_CONTROL_2, value);
ak4396_write(chip, i,
AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
ak4396_write_cached(chip, i, AK4396_LCH_ATT,
chip->dac_volume[i * 2]);
ak4396_write_cached(chip, i, AK4396_RCH_ATT,
chip->dac_volume[i * 2 + 1]);
}
}
......@@ -291,21 +313,19 @@ static void update_ak4396_mute(struct oxygen *chip)
unsigned int i;
u8 value;
value = data->ak4396_ctl2 & ~AK4396_SMUTE;
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
if (chip->dac_mute)
value |= AK4396_SMUTE;
data->ak4396_ctl2 = value;
for (i = 0; i < 4; ++i)
ak4396_write(chip, i, AK4396_CONTROL_2, value);
ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
}
static void set_wm8785_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
struct generic_data *data = chip->model_data;
unsigned int value;
wm8785_write(chip, WM8785_R7, 0);
value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
if (params_rate(params) <= 48000)
value |= WM8785_OSR_SINGLE;
......@@ -313,13 +333,11 @@ static void set_wm8785_params(struct oxygen *chip,
value |= WM8785_OSR_DOUBLE;
else
value |= WM8785_OSR_QUAD;
wm8785_write(chip, WM8785_R0, value);
if (snd_pcm_format_width(params_format(params)) <= 16)
value = WM8785_WL_16;
else
value = WM8785_WL_24;
wm8785_write(chip, WM8785_R1, value);
if (value != data->wm8785_regs[0]) {
wm8785_write(chip, WM8785_R7, 0);
wm8785_write(chip, WM8785_R0, value);
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
}
}
static void set_ak5385_params(struct oxygen *chip,
......@@ -337,6 +355,134 @@ static void set_ak5385_params(struct oxygen *chip,
value, GPIO_AK5385_DFS_MASK);
}
static int rolloff_info(struct snd_kcontrol *ctl,
struct snd_ctl_elem_info *info)
{
static const char *const names[2] = {
"Sharp Roll-off", "Slow Roll-off"
};
info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
info->count = 1;
info->value.enumerated.items = 2;
if (info->value.enumerated.item >= 2)
info->value.enumerated.item = 1;
strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
return 0;
}
static int rolloff_get(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct generic_data *data = chip->model_data;
value->value.enumerated.item[0] =
(data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
return 0;
}
static int rolloff_put(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct generic_data *data = chip->model_data;
unsigned int i;
int changed;
u8 reg;
mutex_lock(&chip->mutex);
reg = data->ak4396_regs[0][AK4396_CONTROL_2];
if (value->value.enumerated.item[0])
reg |= AK4396_SLOW;
else
reg &= ~AK4396_SLOW;
changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
if (changed) {
for (i = 0; i < 4; ++i)
ak4396_write(chip, i, AK4396_CONTROL_2, reg);
}
mutex_unlock(&chip->mutex);
return changed;
}
static const struct snd_kcontrol_new rolloff_control = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "DAC Filter Playback Enum",
.info = rolloff_info,
.get = rolloff_get,
.put = rolloff_put,
};
static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
{
static const char *const names[2] = {
"None", "High-pass Filter"
};
info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
info->count = 1;
info->value.enumerated.items = 2;
if (info->value.enumerated.item >= 2)
info->value.enumerated.item = 1;
strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
return 0;
}
static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct generic_data *data = chip->model_data;
value->value.enumerated.item[0] =
(data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
return 0;
}
static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct generic_data *data = chip->model_data;
unsigned int reg;
int changed;
mutex_lock(&chip->mutex);
reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
if (value->value.enumerated.item[0])
reg |= WM8785_HPFR | WM8785_HPFL;
changed = reg != data->wm8785_regs[WM8785_R2];
if (changed)
wm8785_write(chip, WM8785_R2, reg);
mutex_unlock(&chip->mutex);
return changed;
}
static const struct snd_kcontrol_new hpf_control = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "ADC Filter Capture Enum",
.info = hpf_info,
.get = hpf_get,
.put = hpf_put,
};
static int generic_mixer_init(struct oxygen *chip)
{
return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
}
static int generic_wm8785_mixer_init(struct oxygen *chip)
{
int err;
err = generic_mixer_init(chip);
if (err < 0)
return err;
err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
if (err < 0)
return err;
return 0;
}
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
static const struct oxygen_model model_generic = {
......@@ -344,8 +490,10 @@ static const struct oxygen_model model_generic = {
.longname = "C-Media Oxygen HD Audio",
.chip = "CMI8788",
.init = generic_init,
.mixer_init = generic_wm8785_mixer_init,
.cleanup = generic_cleanup,
.resume = generic_resume,
.get_i2s_mclk = oxygen_default_i2s_mclk,
.set_dac_params = set_ak4396_params,
.set_adc_params = set_wm8785_params,
.update_dac_volume = update_ak4396_volume,
......@@ -374,6 +522,7 @@ static int __devinit get_oxygen_model(struct oxygen *chip,
switch (id->driver_data) {
case MODEL_MERIDIAN:
chip->model.init = meridian_init;
chip->model.mixer_init = generic_mixer_init;
chip->model.resume = meridian_resume;
chip->model.set_adc_params = set_ak5385_params;
chip->model.device_config = PLAYBACK_0_TO_I2S |
......@@ -389,6 +538,7 @@ static int __devinit get_oxygen_model(struct oxygen *chip,
break;
case MODEL_CLARO_HALO:
chip->model.init = claro_halo_init;
chip->model.mixer_init = generic_mixer_init;
chip->model.cleanup = claro_cleanup;
chip->model.suspend = claro_suspend;
chip->model.resume = claro_resume;
......
......@@ -78,12 +78,15 @@ struct oxygen_model {
void (*resume)(struct oxygen *chip);
void (*pcm_hardware_filter)(unsigned int channel,
struct snd_pcm_hardware *hardware);
unsigned int (*get_i2s_mclk)(struct oxygen *chip, unsigned int channel,
struct snd_pcm_hw_params *hw_params);
void (*set_dac_params)(struct oxygen *chip,
struct snd_pcm_hw_params *params);
void (*set_adc_params)(struct oxygen *chip,
struct snd_pcm_hw_params *params);
void (*update_dac_volume)(struct oxygen *chip);
void (*update_dac_mute)(struct oxygen *chip);
void (*update_center_lfe_mix)(struct oxygen *chip, bool mixed);
void (*gpio_changed)(struct oxygen *chip);
void (*uart_input)(struct oxygen *chip);
void (*ac97_switch)(struct oxygen *chip,
......@@ -162,6 +165,8 @@ void oxygen_update_spdif_source(struct oxygen *chip);
/* oxygen_pcm.c */
int oxygen_pcm_init(struct oxygen *chip);
unsigned int oxygen_default_i2s_mclk(struct oxygen *chip, unsigned int channel,
struct snd_pcm_hw_params *hw_params);
/* oxygen_io.c */
......
......@@ -278,7 +278,11 @@ oxygen_search_pci_id(struct oxygen *chip, const struct pci_device_id ids[])
static void oxygen_restore_eeprom(struct oxygen *chip,
const struct pci_device_id *id)
{
if (oxygen_read_eeprom(chip, 0) != OXYGEN_EEPROM_ID) {
u16 eeprom_id;
eeprom_id = oxygen_read_eeprom(chip, 0);
if (eeprom_id != OXYGEN_EEPROM_ID &&
(eeprom_id != 0xffff || id->subdevice != 0x8788)) {
/*
* This function gets called only when a known card model has
* been detected, i.e., we know there is a valid subsystem
......@@ -303,6 +307,28 @@ static void oxygen_restore_eeprom(struct oxygen *chip,
}
}
static void pci_bridge_magic(void)
{
struct pci_dev *pci = NULL;
u32 tmp;
for (;;) {
/* If there is any Pericom PI7C9X110 PCI-E/PCI bridge ... */
pci = pci_get_device(0x12d8, 0xe110, pci);
if (!pci)
break;
/*
* ... configure its secondary internal arbiter to park to
* the secondary port, instead of to the last master.
*/
if (!pci_read_config_dword(pci, 0x40, &tmp)) {
tmp |= 1;
pci_write_config_dword(pci, 0x40, tmp);
}
/* Why? Try asking C-Media. */
}
}
static void oxygen_init(struct oxygen *chip)
{
unsigned int i;
......@@ -581,6 +607,7 @@ int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
snd_card_set_dev(card, &pci->dev);
card->private_free = oxygen_card_free;
pci_bridge_magic();
oxygen_init(chip);
chip->model.init(chip);
......
......@@ -99,11 +99,15 @@ static int dac_mute_put(struct snd_kcontrol *ctl,
static int upmix_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
{
static const char *const names[3] = {
"Front", "Front+Surround", "Front+Surround+Back"
static const char *const names[5] = {
"Front",
"Front+Surround",
"Front+Surround+Back",
"Front+Surround+Center/LFE",
"Front+Surround+Center/LFE+Back",
};
struct oxygen *chip = ctl->private_data;
unsigned int count = 2 + (chip->model.dac_channels == 8);
unsigned int count = chip->model.update_center_lfe_mix ? 5 : 3;
info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
info->count = 1;
......@@ -127,7 +131,7 @@ static int upmix_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
void oxygen_update_dac_routing(struct oxygen *chip)
{
/* DAC 0: front, DAC 1: surround, DAC 2: center/LFE, DAC 3: back */
static const unsigned int reg_values[3] = {
static const unsigned int reg_values[5] = {
/* stereo -> front */
(0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
(1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
......@@ -143,6 +147,16 @@ void oxygen_update_dac_routing(struct oxygen *chip)
(0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
(2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
(0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT),
/* stereo -> front+surround+center/LFE */
(0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
(0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
(0 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
(3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT),
/* stereo -> front+surround+center/LFE+back */
(0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
(0 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
(0 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
(0 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT),
};
u8 channels;
unsigned int reg_value;
......@@ -167,22 +181,23 @@ void oxygen_update_dac_routing(struct oxygen *chip)
OXYGEN_PLAY_DAC1_SOURCE_MASK |
OXYGEN_PLAY_DAC2_SOURCE_MASK |
OXYGEN_PLAY_DAC3_SOURCE_MASK);
if (chip->model.update_center_lfe_mix)
chip->model.update_center_lfe_mix(chip, chip->dac_routing > 2);
}
static int upmix_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
unsigned int count = 2 + (chip->model.dac_channels == 8);
unsigned int count = chip->model.update_center_lfe_mix ? 5 : 3;
int changed;
if (value->value.enumerated.item[0] >= count)
return -EINVAL;
mutex_lock(&chip->mutex);
changed = value->value.enumerated.item[0] != chip->dac_routing;
if (changed) {
chip->dac_routing = min(value->value.enumerated.item[0],
count - 1);
spin_lock_irq(&chip->reg_lock);
chip->dac_routing = value->value.enumerated.item[0];
oxygen_update_dac_routing(chip);
spin_unlock_irq(&chip->reg_lock);
}
mutex_unlock(&chip->mutex);
return changed;
......@@ -790,7 +805,7 @@ static const struct {
.controls = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Monitor Switch",
.name = "Analog Input Monitor Playback Switch",
.info = snd_ctl_boolean_mono_info,
.get = monitor_get,
.put = monitor_put,
......@@ -798,7 +813,7 @@ static const struct {
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Monitor Volume",
.name = "Analog Input Monitor Playback Volume",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = monitor_volume_info,
......@@ -815,7 +830,7 @@ static const struct {
.controls = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Monitor Switch",
.name = "Analog Input Monitor Playback Switch",
.info = snd_ctl_boolean_mono_info,
.get = monitor_get,
.put = monitor_put,
......@@ -823,7 +838,7 @@ static const struct {
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Monitor Volume",
.name = "Analog Input Monitor Playback Volume",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = monitor_volume_info,
......@@ -840,7 +855,7 @@ static const struct {
.controls = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Monitor Switch",
.name = "Analog Input Monitor Playback Switch",
.index = 1,
.info = snd_ctl_boolean_mono_info,
.get = monitor_get,
......@@ -849,7 +864,7 @@ static const struct {
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Analog Input Monitor Volume",
.name = "Analog Input Monitor Playback Volume",
.index = 1,
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
......@@ -867,7 +882,7 @@ static const struct {
.controls = {
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Digital Input Monitor Switch",
.name = "Digital Input Monitor Playback Switch",
.info = snd_ctl_boolean_mono_info,
.get = monitor_get,
.put = monitor_put,
......@@ -875,7 +890,7 @@ static const struct {
},
{
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Digital Input Monitor Volume",
.name = "Digital Input Monitor Playback Volume",
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ,
.info = monitor_volume_info,
......@@ -954,6 +969,9 @@ static int add_controls(struct oxygen *chip,
if (err == 1)
continue;
}
if (!strcmp(template.name, "Stereo Upmixing") &&
chip->model.dac_channels == 2)
continue;
if (!strcmp(template.name, "Master Playback Volume") &&
chip->model.dac_tlv) {
template.tlv.p = chip->model.dac_tlv;
......
......@@ -271,13 +271,16 @@ static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
}
}
static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params)
unsigned int oxygen_default_i2s_mclk(struct oxygen *chip,
unsigned int channel,
struct snd_pcm_hw_params *hw_params)
{
if (params_rate(hw_params) <= 96000)
return OXYGEN_I2S_MCLK_256;
else
return OXYGEN_I2S_MCLK_128;
}
EXPORT_SYMBOL(oxygen_default_i2s_mclk);
static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
{
......@@ -354,7 +357,7 @@ static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
OXYGEN_REC_FORMAT_A_MASK);
oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
oxygen_rate(hw_params) |
oxygen_i2s_mclk(hw_params) |
chip->model.get_i2s_mclk(chip, PCM_A, hw_params) |
chip->model.adc_i2s_format |
oxygen_i2s_bits(hw_params),
OXYGEN_I2S_RATE_MASK |
......@@ -390,7 +393,8 @@ static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
if (!is_ac97)
oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
oxygen_rate(hw_params) |
oxygen_i2s_mclk(hw_params) |
chip->model.get_i2s_mclk(chip, PCM_B,
hw_params) |
chip->model.adc_i2s_format |
oxygen_i2s_bits(hw_params),
OXYGEN_I2S_RATE_MASK |
......@@ -435,6 +439,7 @@ static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
if (err < 0)
return err;
mutex_lock(&chip->mutex);
spin_lock_irq(&chip->reg_lock);
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
OXYGEN_SPDIF_OUT_ENABLE);
......@@ -446,6 +451,7 @@ static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
OXYGEN_SPDIF_OUT_RATE_MASK);
oxygen_update_spdif_source(chip);
spin_unlock_irq(&chip->reg_lock);
mutex_unlock(&chip->mutex);
return 0;
}
......@@ -459,6 +465,7 @@ static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
if (err < 0)
return err;
mutex_lock(&chip->mutex);
spin_lock_irq(&chip->reg_lock);
oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
oxygen_play_channels(hw_params),
......@@ -469,18 +476,18 @@ static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
oxygen_rate(hw_params) |
chip->model.dac_i2s_format |
oxygen_i2s_mclk(hw_params) |
chip->model.get_i2s_mclk(chip, PCM_MULTICH,
hw_params) |
oxygen_i2s_bits(hw_params),
OXYGEN_I2S_RATE_MASK |
OXYGEN_I2S_FORMAT_MASK |
OXYGEN_I2S_MCLK_MASK |
OXYGEN_I2S_BITS_MASK);
oxygen_update_dac_routing(chip);
oxygen_update_spdif_source(chip);
spin_unlock_irq(&chip->reg_lock);
mutex_lock(&chip->mutex);
chip->model.set_dac_params(chip, hw_params);
oxygen_update_dac_routing(chip);
mutex_unlock(&chip->mutex);
return 0;
}
......
此差异已折叠。
#ifndef XONAR_H_INCLUDED
#define XONAR_H_INCLUDED
#include "oxygen.h"
struct xonar_generic {
unsigned int anti_pop_delay;
u16 output_enable_bit;
u8 ext_power_reg;
u8 ext_power_int_reg;
u8 ext_power_bit;
u8 has_power;
};
struct xonar_hdmi {
u8 params[5];
};
/* generic helper functions */
void xonar_enable_output(struct oxygen *chip);
void xonar_disable_output(struct oxygen *chip);
void xonar_init_ext_power(struct oxygen *chip);
void xonar_init_cs53x1(struct oxygen *chip);
void xonar_set_cs53x1_params(struct oxygen *chip,
struct snd_pcm_hw_params *params);
int xonar_gpio_bit_switch_get(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value);
int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value);
/* model-specific card drivers */
int get_xonar_pcm179x_model(struct oxygen *chip,
const struct pci_device_id *id);
int get_xonar_cs43xx_model(struct oxygen *chip,
const struct pci_device_id *id);
/* HDMI helper functions */
void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *data);
void xonar_hdmi_cleanup(struct oxygen *chip);
void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi);
void xonar_hdmi_pcm_hardware_filter(unsigned int channel,
struct snd_pcm_hardware *hardware);
void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
struct snd_pcm_hw_params *params);
void xonar_hdmi_uart_input(struct oxygen *chip);
#endif
/*
* card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
*
* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
*
*
* This driver is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, version 2.
*
* This driver is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this driver; if not, see <http://www.gnu.org/licenses/>.
*/
/*
* Xonar D1/DX
* -----------
*
* CMI8788:
*
* I²C <-> CS4398 (front)
* <-> CS4362A (surround, center/LFE, back)
*
* GPI 0 <- external power present (DX only)
*
* GPIO 0 -> enable output to speakers
* GPIO 1 -> enable front panel I/O
* GPIO 2 -> M0 of CS5361
* GPIO 3 -> M1 of CS5361
* GPIO 8 -> route input jack to line-in (0) or mic-in (1)
*
* CS4398:
*
* AD0 <- 1
* AD1 <- 1
*
* CS4362A:
*
* AD0 <- 0
*
* CM9780:
*
* GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
*/
#include <linux/pci.h>
#include <linux/delay.h>
#include <sound/ac97_codec.h>
#include <sound/control.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/tlv.h>
#include "xonar.h"
#include "cs4398.h"
#include "cs4362a.h"
#define GPI_EXT_POWER 0x01
#define GPIO_D1_OUTPUT_ENABLE 0x0001
#define GPIO_D1_FRONT_PANEL 0x0002
#define GPIO_D1_INPUT_ROUTE 0x0100
#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
struct xonar_cs43xx {
struct xonar_generic generic;
u8 cs4398_regs[8];
u8 cs4362a_regs[15];
};
static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
{
struct xonar_cs43xx *data = chip->model_data;
oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
if (reg < ARRAY_SIZE(data->cs4398_regs))
data->cs4398_regs[reg] = value;
}
static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
{
struct xonar_cs43xx *data = chip->model_data;
if (value != data->cs4398_regs[reg])
cs4398_write(chip, reg, value);
}
static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
{
struct xonar_cs43xx *data = chip->model_data;
oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
if (reg < ARRAY_SIZE(data->cs4362a_regs))
data->cs4362a_regs[reg] = value;
}
static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
{
struct xonar_cs43xx *data = chip->model_data;
if (value != data->cs4362a_regs[reg])
cs4362a_write(chip, reg, value);
}
static void cs43xx_registers_init(struct oxygen *chip)
{
struct xonar_cs43xx *data = chip->model_data;
unsigned int i;
/* set CPEN (control port mode) and power down */
cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
/* configure */
cs4398_write(chip, 2, data->cs4398_regs[2]);
cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
cs4398_write(chip, 4, data->cs4398_regs[4]);
cs4398_write(chip, 5, data->cs4398_regs[5]);
cs4398_write(chip, 6, data->cs4398_regs[6]);
cs4398_write(chip, 7, data->cs4398_regs[7]);
cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
cs4362a_write(chip, 0x05, 0);
for (i = 6; i <= 14; ++i)
cs4362a_write(chip, i, data->cs4362a_regs[i]);
/* clear power down */
cs4398_write(chip, 8, CS4398_CPEN);
cs4362a_write(chip, 0x01, CS4362A_CPEN);
}
static void xonar_d1_init(struct oxygen *chip)
{
struct xonar_cs43xx *data = chip->model_data;
data->generic.anti_pop_delay = 800;
data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
data->cs4398_regs[2] =
CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
data->cs4398_regs[4] = CS4398_MUTEP_LOW |
CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
data->cs4398_regs[5] = 60 * 2;
data->cs4398_regs[6] = 60 * 2;
data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
data->cs4362a_regs[9] = data->cs4362a_regs[6];
data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
data->cs4362a_regs[12] = data->cs4362a_regs[6];
data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
OXYGEN_2WIRE_LENGTH_8 |
OXYGEN_2WIRE_INTERRUPT_MASK |
OXYGEN_2WIRE_SPEED_FAST);
cs43xx_registers_init(chip);
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
xonar_init_cs53x1(chip);
xonar_enable_output(chip);
snd_component_add(chip->card, "CS4398");
snd_component_add(chip->card, "CS4362A");
snd_component_add(chip->card, "CS5361");
}
static void xonar_dx_init(struct oxygen *chip)
{
struct xonar_cs43xx *data = chip->model_data;
data->generic.ext_power_reg = OXYGEN_GPI_DATA;
data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
data->generic.ext_power_bit = GPI_EXT_POWER;
xonar_init_ext_power(chip);
xonar_d1_init(chip);
}
static void xonar_d1_cleanup(struct oxygen *chip)
{
xonar_disable_output(chip);
cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
}
static void xonar_d1_suspend(struct oxygen *chip)
{
xonar_d1_cleanup(chip);
}
static void xonar_d1_resume(struct oxygen *chip)
{
oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
msleep(1);
cs43xx_registers_init(chip);
xonar_enable_output(chip);
}
static void set_cs43xx_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
struct xonar_cs43xx *data = chip->model_data;
u8 cs4398_fm, cs4362a_fm;
if (params_rate(params) <= 50000) {
cs4398_fm = CS4398_FM_SINGLE;
cs4362a_fm = CS4362A_FM_SINGLE;
} else if (params_rate(params) <= 100000) {
cs4398_fm = CS4398_FM_DOUBLE;
cs4362a_fm = CS4362A_FM_DOUBLE;
} else {
cs4398_fm = CS4398_FM_QUAD;
cs4362a_fm = CS4362A_FM_QUAD;
}
cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
cs4398_write_cached(chip, 2, cs4398_fm);
cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
cs4362a_write_cached(chip, 6, cs4362a_fm);
cs4362a_write_cached(chip, 12, cs4362a_fm);
cs4362a_fm &= CS4362A_FM_MASK;
cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
cs4362a_write_cached(chip, 9, cs4362a_fm);
}
static void update_cs4362a_volumes(struct oxygen *chip)
{
unsigned int i;
u8 mute;
mute = chip->dac_mute ? CS4362A_MUTE : 0;
for (i = 0; i < 6; ++i)
cs4362a_write_cached(chip, 7 + i + i / 2,
(127 - chip->dac_volume[2 + i]) | mute);
}
static void update_cs43xx_volume(struct oxygen *chip)
{
cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
update_cs4362a_volumes(chip);
}
static void update_cs43xx_mute(struct oxygen *chip)
{
u8 reg;
reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
if (chip->dac_mute)
reg |= CS4398_MUTE_B | CS4398_MUTE_A;
cs4398_write_cached(chip, 4, reg);
update_cs4362a_volumes(chip);
}
static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
{
struct xonar_cs43xx *data = chip->model_data;
u8 reg;
reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
if (mixed)
reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
else
reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
cs4362a_write_cached(chip, 9, reg);
}
static const struct snd_kcontrol_new front_panel_switch = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "Front Panel Switch",
.info = snd_ctl_boolean_mono_info,
.get = xonar_gpio_bit_switch_get,
.put = xonar_gpio_bit_switch_put,
.private_value = GPIO_D1_FRONT_PANEL,
};
static int rolloff_info(struct snd_kcontrol *ctl,
struct snd_ctl_elem_info *info)
{
static const char *const names[2] = {
"Fast Roll-off", "Slow Roll-off"
};
info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
info->count = 1;
info->value.enumerated.items = 2;
if (info->value.enumerated.item >= 2)
info->value.enumerated.item = 1;
strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
return 0;
}
static int rolloff_get(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct xonar_cs43xx *data = chip->model_data;
value->value.enumerated.item[0] =
(data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
return 0;
}
static int rolloff_put(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct xonar_cs43xx *data = chip->model_data;
int changed;
u8 reg;
mutex_lock(&chip->mutex);
reg = data->cs4398_regs[7];
if (value->value.enumerated.item[0])
reg |= CS4398_FILT_SEL;
else
reg &= ~CS4398_FILT_SEL;
changed = reg != data->cs4398_regs[7];
if (changed) {
cs4398_write(chip, 7, reg);
if (reg & CS4398_FILT_SEL)
reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
else
reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
cs4362a_write(chip, 0x04, reg);
}
mutex_unlock(&chip->mutex);
return changed;
}
static const struct snd_kcontrol_new rolloff_control = {
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
.name = "DAC Filter Playback Enum",
.info = rolloff_info,
.get = rolloff_get,
.put = rolloff_put,
};
static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
unsigned int reg, unsigned int mute)
{
if (reg == AC97_LINE) {
spin_lock_irq(&chip->reg_lock);
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
mute ? GPIO_D1_INPUT_ROUTE : 0,
GPIO_D1_INPUT_ROUTE);
spin_unlock_irq(&chip->reg_lock);
}
}
static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
{
if (!strncmp(template->name, "CD Capture ", 11))
return 1; /* no CD input */
return 0;
}
static int xonar_d1_mixer_init(struct oxygen *chip)
{
int err;
err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
if (err < 0)
return err;
err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
if (err < 0)
return err;
return 0;
}
static const struct oxygen_model model_xonar_d1 = {
.longname = "Asus Virtuoso 100",
.chip = "AV200",
.init = xonar_d1_init,
.control_filter = xonar_d1_control_filter,
.mixer_init = xonar_d1_mixer_init,
.cleanup = xonar_d1_cleanup,
.suspend = xonar_d1_suspend,
.resume = xonar_d1_resume,
.get_i2s_mclk = oxygen_default_i2s_mclk,
.set_dac_params = set_cs43xx_params,
.set_adc_params = xonar_set_cs53x1_params,
.update_dac_volume = update_cs43xx_volume,
.update_dac_mute = update_cs43xx_mute,
.update_center_lfe_mix = update_cs43xx_center_lfe_mix,
.ac97_switch = xonar_d1_line_mic_ac97_switch,
.dac_tlv = cs4362a_db_scale,
.model_data_size = sizeof(struct xonar_cs43xx),
.device_config = PLAYBACK_0_TO_I2S |
PLAYBACK_1_TO_SPDIF |
CAPTURE_0_FROM_I2S_2,
.dac_channels = 8,
.dac_volume_min = 127 - 60,
.dac_volume_max = 127,
.function_flags = OXYGEN_FUNCTION_2WIRE,
.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
};
int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
const struct pci_device_id *id)
{
switch (id->subdevice) {
case 0x834f:
chip->model = model_xonar_d1;
chip->model.shortname = "Xonar D1";
break;
case 0x8275:
case 0x8327:
chip->model = model_xonar_d1;
chip->model.shortname = "Xonar DX";
chip->model.init = xonar_dx_init;
break;
default:
return -EINVAL;
}
return 0;
}
/*
* helper functions for HDMI models (Xonar HDAV1.3)
*
* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
*
*
* This driver is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, version 2.
*
* This driver is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this driver; if not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/pci.h>
#include <linux/delay.h>
#include <sound/asoundef.h>
#include <sound/control.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/tlv.h>
#include "xonar.h"
static void hdmi_write_command(struct oxygen *chip, u8 command,
unsigned int count, const u8 *params)
{
unsigned int i;
u8 checksum;
oxygen_write_uart(chip, 0xfb);
oxygen_write_uart(chip, 0xef);
oxygen_write_uart(chip, command);
oxygen_write_uart(chip, count);
for (i = 0; i < count; ++i)
oxygen_write_uart(chip, params[i]);
checksum = 0xfb + 0xef + command + count;
for (i = 0; i < count; ++i)
checksum += params[i];
oxygen_write_uart(chip, checksum);
}
static void xonar_hdmi_init_commands(struct oxygen *chip,
struct xonar_hdmi *hdmi)
{
u8 param;
oxygen_reset_uart(chip);
param = 0;
hdmi_write_command(chip, 0x61, 1, &param);
param = 1;
hdmi_write_command(chip, 0x74, 1, &param);
hdmi_write_command(chip, 0x54, 5, hdmi->params);
}
void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi)
{
hdmi->params[1] = IEC958_AES3_CON_FS_48000;
hdmi->params[4] = 1;
xonar_hdmi_init_commands(chip, hdmi);
}
void xonar_hdmi_cleanup(struct oxygen *chip)
{
u8 param = 0;
hdmi_write_command(chip, 0x74, 1, &param);
}
void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi)
{
xonar_hdmi_init_commands(chip, hdmi);
}
void xonar_hdmi_pcm_hardware_filter(unsigned int channel,
struct snd_pcm_hardware *hardware)
{
if (channel == PCM_MULTICH) {
hardware->rates = SNDRV_PCM_RATE_44100 |
SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_96000 |
SNDRV_PCM_RATE_192000;
hardware->rate_min = 44100;
}
}
void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi,
struct snd_pcm_hw_params *params)
{
hdmi->params[0] = 0; /* 1 = non-audio */
switch (params_rate(params)) {
case 44100:
hdmi->params[1] = IEC958_AES3_CON_FS_44100;
break;
case 48000:
hdmi->params[1] = IEC958_AES3_CON_FS_48000;
break;
default: /* 96000 */
hdmi->params[1] = IEC958_AES3_CON_FS_96000;
break;
case 192000:
hdmi->params[1] = IEC958_AES3_CON_FS_192000;
break;
}
hdmi->params[2] = params_channels(params) / 2 - 1;
if (params_format(params) == SNDRV_PCM_FORMAT_S16_LE)
hdmi->params[3] = 0;
else
hdmi->params[3] = 0xc0;
hdmi->params[4] = 1; /* ? */
hdmi_write_command(chip, 0x54, 5, hdmi->params);
}
void xonar_hdmi_uart_input(struct oxygen *chip)
{
if (chip->uart_input_count >= 2 &&
chip->uart_input[chip->uart_input_count - 2] == 'O' &&
chip->uart_input[chip->uart_input_count - 1] == 'K') {
printk(KERN_DEBUG "message from HDMI chip received:\n");
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
chip->uart_input, chip->uart_input_count);
chip->uart_input_count = 0;
}
}
/*
* helper functions for Asus Xonar cards
*
* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
*
*
* This driver is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, version 2.
*
* This driver is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this driver; if not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/delay.h>
#include <sound/core.h>
#include <sound/control.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include "xonar.h"
#define GPIO_CS53x1_M_MASK 0x000c
#define GPIO_CS53x1_M_SINGLE 0x0000
#define GPIO_CS53x1_M_DOUBLE 0x0004
#define GPIO_CS53x1_M_QUAD 0x0008
void xonar_enable_output(struct oxygen *chip)
{
struct xonar_generic *data = chip->model_data;
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, data->output_enable_bit);
msleep(data->anti_pop_delay);
oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
}
void xonar_disable_output(struct oxygen *chip)
{
struct xonar_generic *data = chip->model_data;
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
}
static void xonar_ext_power_gpio_changed(struct oxygen *chip)
{
struct xonar_generic *data = chip->model_data;
u8 has_power;
has_power = !!(oxygen_read8(chip, data->ext_power_reg)
& data->ext_power_bit);
if (has_power != data->has_power) {
data->has_power = has_power;
if (has_power) {
snd_printk(KERN_NOTICE "power restored\n");
} else {
snd_printk(KERN_CRIT
"Hey! Don't unplug the power cable!\n");
/* TODO: stop PCMs */
}
}
}
void xonar_init_ext_power(struct oxygen *chip)
{
struct xonar_generic *data = chip->model_data;
oxygen_set_bits8(chip, data->ext_power_int_reg,
data->ext_power_bit);
chip->interrupt_mask |= OXYGEN_INT_GPIO;
chip->model.gpio_changed = xonar_ext_power_gpio_changed;
data->has_power = !!(oxygen_read8(chip, data->ext_power_reg)
& data->ext_power_bit);
}
void xonar_init_cs53x1(struct oxygen *chip)
{
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CS53x1_M_MASK);
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
GPIO_CS53x1_M_SINGLE, GPIO_CS53x1_M_MASK);
}
void xonar_set_cs53x1_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
unsigned int value;
if (params_rate(params) <= 54000)
value = GPIO_CS53x1_M_SINGLE;
else if (params_rate(params) <= 108000)
value = GPIO_CS53x1_M_DOUBLE;
else
value = GPIO_CS53x1_M_QUAD;
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
value, GPIO_CS53x1_M_MASK);
}
int xonar_gpio_bit_switch_get(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
u16 bit = ctl->private_value;
value->value.integer.value[0] =
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) & bit);
return 0;
}
int xonar_gpio_bit_switch_put(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
u16 bit = ctl->private_value;
u16 old_bits, new_bits;
int changed;
spin_lock_irq(&chip->reg_lock);
old_bits = oxygen_read16(chip, OXYGEN_GPIO_DATA);
if (value->value.integer.value[0])
new_bits = old_bits | bit;
else
new_bits = old_bits & ~bit;
changed = new_bits != old_bits;
if (changed)
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_bits);
spin_unlock_irq(&chip->reg_lock);
return changed;
}
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