ath10k: properly remove padding from the start of rx payload
In QCA99X0 (QCA99X0, QCA9984, QCA9888 and QCA4019) family chips, hw adds padding at the begining of the rx payload to make L3 header 4-byte aligned. In the chips doing this type of padding, the number of bytes padded will be indicated through msdu_end:info1. Define a hw_rx_desc_ops wrapper to retrieve the number of padded bytes and use this while doing undecap. This should fix padding related issues with ethernt decap format with QCA99X0, QCA9984, QCA9888 and QCA4019 hw. Signed-off-by: NVasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com> [Rename operations to hw_ops for other purposes] Signed-off-by: NBenjamin Berg <benjamin@sipsolutions.net> Signed-off-by: NKalle Valo <kvalo@qca.qualcomm.com>
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