提交 9bebeff9 编写于 作者: R Robin Getz 提交者: Bryan Wu

Blackfin arch: fix bug - build kernel failed at head.S when reprogram clock on all platforms

Signed-off-by: NRobin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
上级 ded963a4
......@@ -88,7 +88,7 @@ ENTRY(_start_dma_code)
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
#ifdef ANOMALY_05000265
r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
#endif
p0.h = hi(PLL_CTL);
......
......@@ -79,7 +79,7 @@ ENTRY(_start_dma_code)
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
#ifdef ANOMALY_05000265
r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
#endif
p0.h = hi(PLL_CTL);
......
......@@ -88,7 +88,7 @@ ENTRY(_start_dma_code)
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
#ifdef ANOMALY_05000265
r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
#endif
p0.h = hi(PLL_CTL);
......
......@@ -95,7 +95,7 @@ ENTRY(_start_dma_code)
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
#ifdef ANOMALY_05000265
r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
#endif
p0.h = hi(PLL_CTL);
......
......@@ -78,7 +78,7 @@ ENTRY(_start_dma_code)
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
#ifdef ANOMALY_05000265
r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
#endif
p0.h = hi(PLL_CTL);
......
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