未验证 提交 9b8d1ccd 编写于 作者: C Chen-Yu Tsai 提交者: Maxime Ripard

arm64: dts: allwinner: h6: orangepi: Enable USB 2.0 host and OTG ports

The Orange Pi Lite 2 and Orange Pi One Plus share the same design for
their USB 2.0 ports. VBUS is directly tied to the board wide 5V rail,
which is also directly tied to the DC jack. There is no current limiting
in this design.

This patch enables all the USB 2.0 related device nodes, and sets the
VBUS regulator supplies and OTG ID detection GPIO.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
上级 919d2514
......@@ -32,6 +32,14 @@
};
};
&ehci0 {
status = "okay";
};
&ehci3 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
......@@ -41,6 +49,14 @@
status = "okay";
};
&ohci0 {
status = "okay";
};
&ohci3 {
status = "okay";
};
&r_i2c {
status = "okay";
......@@ -165,3 +181,15 @@
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
&usb2otg {
dr_mode = "otg";
status = "okay";
};
&usb2phy {
usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
usb0_vbus-supply = <&reg_vcc5v>;
usb3_vbus-supply = <&reg_vcc5v>;
status = "okay";
};
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