提交 9b5bc5fa 编写于 作者: K Kevin Hilman 提交者: Paul Walmsley

OMAP3: clock: add clockdomains for UART1 & 2

UART1 & 2 were missing clockdomains resulting in broken omap_hwmod
init for these devices.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
上级 51e888d7
...@@ -1500,6 +1500,7 @@ static struct clk uart2_fck = { ...@@ -1500,6 +1500,7 @@ static struct clk uart2_fck = {
.parent = &core_48m_fck, .parent = &core_48m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_UART2_SHIFT, .enable_bit = OMAP3430_EN_UART2_SHIFT,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
...@@ -1509,6 +1510,7 @@ static struct clk uart1_fck = { ...@@ -1509,6 +1510,7 @@ static struct clk uart1_fck = {
.parent = &core_48m_fck, .parent = &core_48m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_UART1_SHIFT, .enable_bit = OMAP3430_EN_UART1_SHIFT,
.clkdm_name = "core_l4_clkdm",
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
}; };
......
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