arm64: mm: Introduce MAX_USER_VA_BITS definition

With the introduction of 52-bit virtual addressing for userspace, we are
now in a position where the virtual addressing capability of userspace
may exceed that of the kernel. Consequently, the VA_BITS definition
cannot be used blindly, since it reflects only the size of kernel
virtual addresses.

This patch introduces MAX_USER_VA_BITS which is either VA_BITS or 52
depending on whether 52-bit virtual addressing has been configured at
build time, removing a few places where the 52 is open-coded based on
explicit CONFIG_ guards.
Signed-off-by: NWill Deacon <will.deacon@arm.com>

arch/arm64/include/asm/memory.h

@@ -73,6 +73,12 @@
 #define KERNEL_START      _text
 #define KERNEL_END        _end
 
+#ifdef CONFIG_ARM64_USER_VA_BITS_52
+#define MAX_USER_VA_BITS	52
+#else
+#define MAX_USER_VA_BITS	VA_BITS
+#endif
+
 /*
  * KASAN requires 1/8th of the kernel virtual address space for the shadow
  * region. KASAN can bloat the stack significantly, so double the (minimum)

arch/arm64/include/asm/pgtable-hwdef.h

@@ -80,11 +80,7 @@
 #define PGDIR_SHIFT		ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - CONFIG_PGTABLE_LEVELS)
 #define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)
 #define PGDIR_MASK		(~(PGDIR_SIZE-1))
-#ifdef CONFIG_ARM64_USER_VA_BITS_52
-#define PTRS_PER_PGD		(1 << (52 - PGDIR_SHIFT))
-#else
-#define PTRS_PER_PGD		(1 << (VA_BITS - PGDIR_SHIFT))
-#endif
+#define PTRS_PER_PGD		(1 << (MAX_USER_VA_BITS - PGDIR_SHIFT))
 
 /*
  * Section address mask and size definitions.

arch/arm64/include/asm/processor.h

@@ -20,11 +20,7 @@
 #define __ASM_PROCESSOR_H
 
 #define KERNEL_DS		UL(-1)
-#ifdef CONFIG_ARM64_USER_VA_BITS_52
-#define USER_DS			((UL(1) << 52) - 1)
-#else
-#define USER_DS			((UL(1) << VA_BITS) - 1)
-#endif /* CONFIG_ARM64_USER_VA_BITS_52 */
+#define USER_DS			((UL(1) << MAX_USER_VA_BITS) - 1)
 
 /*
  * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is