clk: mediatek: Remove ifr{0,1}_cfg_regs structures

These aren't used and the macros that reference them aren't used either.
Remove the dead code to avoid compile warnings.

Cc: Owen Chen <owen.chen@mediatek.com>
Cc: Mars Cheng <mars.cheng@mediatek.com>
Cc: Macpaul Lin <macpaul.lin@mediatek.com>
Fixes: 1aca9939 ("clk: mediatek: Add MT6765 clock support")
Reported-by: Nkbuild test robot <lkp@intel.com>
Signed-off-by: NStephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200609211847.27366-1-sboyd@kernel.org

drivers/clk/mediatek/clk-mt6765.c

@@ -534,18 +534,6 @@ static const struct mtk_gate top_clks[] = {
 	GATE_TOP2(CLK_TOP_APLL12_DIV3, "apll12_div3", "aud_1_ck", 5),
 };
 
-static const struct mtk_gate_regs ifr0_cg_regs = {
-	.set_ofs = 0x200,
-	.clr_ofs = 0x200,
-	.sta_ofs = 0x200,
-};
-
-static const struct mtk_gate_regs ifr1_cg_regs = {
-	.set_ofs = 0x74,
-	.clr_ofs = 0x74,
-	.sta_ofs = 0x74,
-};
-
 static const struct mtk_gate_regs ifr2_cg_regs = {
 	.set_ofs = 0x80,
 	.clr_ofs = 0x84,
@@ -570,24 +558,6 @@ static const struct mtk_gate_regs ifr5_cg_regs = {
 	.sta_ofs = 0xc8,
 };
 
-#define GATE_IFR0(_id, _name, _parent, _shift) {	\
-		.id = _id,				\
-		.name = _name,				\
-		.parent_name = _parent,			\
-		.regs = &ifr0_cg_regs,			\
-		.shift = _shift,			\
-		.ops = &mtk_clk_gate_ops_no_setclr_inv,	\
-	}
-
-#define GATE_IFR1(_id, _name, _parent, _shift) {	\
-		.id = _id,				\
-		.name = _name,				\
-		.parent_name = _parent,			\
-		.regs = &ifr1_cg_regs,			\
-		.shift = _shift,			\
-		.ops = &mtk_clk_gate_ops_no_setclr,	\
-	}
-
 #define GATE_IFR2(_id, _name, _parent, _shift) {	\
 		.id = _id,				\
 		.name = _name,				\