提交 9a0baee9 编写于 作者: J Jon Hunter 提交者: Thierry Reding

ARM: tegra: Enable CPUFreq support for Tegra124 Chromebooks

Add the device-tree DFLL clock node and CPU regulator phandle for
Tegra124 Chromebooks to enable CPUFreq support on these boards.
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Reviewed-by: NTomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
上级 6ff33f39
...@@ -159,7 +159,7 @@ ...@@ -159,7 +159,7 @@
vin-ldo9-10-supply = <&vdd_5v0_sys>; vin-ldo9-10-supply = <&vdd_5v0_sys>;
vin-ldo11-supply = <&vdd_3v3_run>; vin-ldo11-supply = <&vdd_3v3_run>;
sd0 { vdd_cpu: sd0 {
regulator-name = "+VDD_CPU_AP"; regulator-name = "+VDD_CPU_AP";
regulator-min-microvolt = <700000>; regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1350000>; regulator-max-microvolt = <1350000>;
...@@ -397,6 +397,13 @@ ...@@ -397,6 +397,13 @@
non-removable; non-removable;
}; };
/* CPU DFLL clock */
clock@0,70110000 {
status = "okay";
vdd-cpu-supply = <&vdd_cpu>;
nvidia,i2c-fs-rate = <400000>;
};
ahub@0,70300000 { ahub@0,70300000 {
i2s@0,70301100 { i2s@0,70301100 {
status = "okay"; status = "okay";
...@@ -487,6 +494,12 @@ ...@@ -487,6 +494,12 @@
}; };
}; };
cpus {
cpu@0 {
vdd-cpu-supply = <&vdd_cpu>;
};
};
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
......
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