drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock

Signed-off-by: NNils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/amdgpu/ci_dpm.c

@@ -2554,8 +2554,7 @@ static u8 ci_get_sleep_divider_id_from_clock(struct amdgpu_device *adev,
 {
 	u32 i;
 	u32 tmp;
-	u32 min = (min_sclk_in_sr > CISLAND_MINIMUM_ENGINE_CLOCK) ?
-		min_sclk_in_sr : CISLAND_MINIMUM_ENGINE_CLOCK;
+	u32 min = max(min_sclk_in_sr, (u32)CISLAND_MINIMUM_ENGINE_CLOCK);
 
 	if (sclk < min)
 		return 0;

drivers/gpu/drm/amd/amdgpu/kv_dpm.c

@@ -2176,8 +2176,7 @@ static u8 kv_get_sleep_divider_id_from_clock(struct amdgpu_device *adev,
 	struct kv_power_info *pi = kv_get_pi(adev);
 	u32 i;
 	u32 temp;
-	u32 min = (min_sclk_in_sr > KV_MINIMUM_ENGINE_CLOCK) ?
-		min_sclk_in_sr : KV_MINIMUM_ENGINE_CLOCK;
+	u32 min = max(min_sclk_in_sr, (u32)KV_MINIMUM_ENGINE_CLOCK);
 
 	if (sclk < min)
 		return 0;

drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c

@@ -1903,8 +1903,7 @@ static uint8_t fiji_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
 {
 	uint8_t i;
 	uint32_t temp;
-	uint32_t min = clock_insr > FIJI_MINIMUM_ENGINE_CLOCK ?
-			clock_insr : FIJI_MINIMUM_ENGINE_CLOCK;
+	uint32_t min = max(clock_insr, (uint32_t)FIJI_MINIMUM_ENGINE_CLOCK);
 
 	PP_ASSERT_WITH_CODE((clock >= min), "Engine clock can't satisfy stutter requirement!", return 0);
 	for (i = FIJI_MAX_DEEPSLEEP_DIVIDER_ID;  ; i--) {

drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c

@@ -2420,8 +2420,7 @@ static uint8_t tonga_get_sleep_divider_id_from_clock(struct pp_hwmgr *hwmgr,
 		uint32_t engine_clock, uint32_t min_engine_clock_in_sr)
 {
 	uint32_t i, temp;
-	uint32_t min = (min_engine_clock_in_sr > TONGA_MINIMUM_ENGINE_CLOCK) ?
-			min_engine_clock_in_sr : TONGA_MINIMUM_ENGINE_CLOCK;
+	uint32_t min = max(min_engine_clock_in_sr, (uint32_t)TONGA_MINIMUM_ENGINE_CLOCK);
 
 	PP_ASSERT_WITH_CODE((engine_clock >= min),
 			"Engine clock can't satisfy stutter requirement!", return 0);