提交 9479074e 编写于 作者: M Maxime Ripard 提交者: Ulf Hansson

mmc: sunxi: Gate the clock when rate is 0

The MMC core assumes that the code will gate the clock when the bus
frequency is set to 0, which we've been ignoring so far.

Handle that.
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: NFlorian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
上级 39cc281f
无相关合并请求
......@@ -765,6 +765,9 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
if (ret)
return ret;
if (!ios->clock)
return 0;
/* 8 bit DDR requires a higher module clock */
if (ios->timing == MMC_TIMING_MMC_DDR52 &&
ios->bus_width == MMC_BUS_WIDTH_8)
......@@ -882,7 +885,7 @@ static void sunxi_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
mmc_writel(host, REG_GCTRL, rval);
/* set up clock */
if (ios->clock && ios->power_mode) {
if (ios->power_mode) {
host->ferror = sunxi_mmc_clk_set_rate(host, ios);
/* Android code had a usleep_range(50000, 55000); here */
}
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册
反馈
建议
客服 返回
顶部