arm64: dts: Add initial dts for Hisilicon Hip06 D03 board

The Hip06 soc has same cpu topology compared with Hip05, four clusters
and each cluster has quard Cortex-A57, but with different IO part,
like HNS, SAS and PCI, they are all upgraded. There are also not same
in ITS, MBIGEN and SMMU, etc.

This patch adds the initial dts for hip06 d03 board.

Note, there is no serial, because the soc use LPC uart, the serial node
is not needed.
Signed-off-by: NKefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: NKejian Yan <yankejian@huawei.com>

arch/arm64/boot/dts/hisilicon/hip06.dtsi

@@ -377,6 +377,11 @@
 			#clock-cells = <0>;
 		};
 
+		lpc@a01b0000 {
+			compatible = "hisilicon,low-pin-count";
+			reg = <0x0 0xa01b0000 0x0 0x1000>;
+		};
+
 		usb_ohci: ohci@a7030000 {
 			compatible = "generic-ohci";
 			reg = <0x0 0xa7030000 0x0 0x10000>;