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提交 930b440c 编写于 作者: L Linus Torvalds
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Merge tag 'boards-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC board changes from Arnd Bergmann:
 "As we continue to replace board files with device tree descriptions,
  this part of the ARM support is getting smaller.  We have basically
  just defconfig changes here this time, and a significant number of
  Renesas shmobile changes, as Renesas is still in the process of
  deprecating board file support"

* tag 'boards-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (92 commits)
  ARM: enable fhandle in multi_v7_defconfig
  ARM: tegra: enable fhandle in tegra_defconfig
  ARM: update multi_v7_defconfig for Tegra
  ARM: add Marvell Dove and some drivers to multi_v7 defconfig
  ARM: fix duplicate symbols in multi_v5_defconfig
  ARM: pxa: add gpio keys information
  ARM: tegra: defconfig updates
  ARM: config: keystone: enable AEMIF/NAND support
  ARM: qcom: Enable basic support for Qualcomm platforms in multi_v7_defconfig
  ARM: kirkwood: Add HP T5325 devices to {multi|mvebu}_v5_defconfig
  ARM: config: Add mvebu_v5_defconfig
  ARM: config: Add a multi_v5_defconfig
  ARM: shmobile: r7s72100: update defconfig for I2C usage
  ARM: shmobile: Remove Lager DT reference legacy clock bits
  ARM: shmobile: Remove Koelsch DT reference legacy clock bits
  ARM: shmobile: Remove KZM9D board code
  ARM: mvebu: update defconfigs for Armada 375 and 38x
  ARM: dove: Enable watchdog support in the defconfig
  ARM: mvebu: Enable watchdog support in defconfig
  ARM: config: keystone: enable led support
  ...
上级 ff050ad1 077492ac
隐藏空白更改
内联 并排
Showing with 2196 addition and 127 deletion
arch/arm/boot/dts/r8a7778-bockw-reference.dts
浏览文件 @ 930b440c
......@@ -17,6 +17,7 @@
/dts-v1/;
#include "r8a7778.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "bockw";
......@@ -84,7 +85,7 @@
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
"sdhi0_cd", "sdhi0_wp";
"sdhi0_cd";
renesas,function = "sdhi0";
};
......@@ -101,6 +102,7 @@
vmmc-supply = <&fixedregulator3v3>;
bus-width = <4>;
status = "okay";
wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
};
&hspi0 {
......
arch/arm/configs/ape6evm_defconfig
浏览文件 @ 930b440c
......@@ -48,6 +48,8 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6_SIT is not set
CONFIG_NETFILTER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FW_LOADER_USER_HELPER is not set
CONFIG_NETDEVICES=y
# CONFIG_NET_CADENCE is not set
......
arch/arm/configs/armadillo800eva_defconfig
浏览文件 @ 930b440c
......@@ -58,6 +58,8 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_MD=y
......
arch/arm/configs/bockw_defconfig
浏览文件 @ 930b440c
......@@ -44,6 +44,8 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FW_LOADER is not set
......
arch/arm/configs/dove_defconfig
浏览文件 @ 930b440c
......@@ -48,7 +48,6 @@ CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=1
......@@ -80,6 +79,8 @@ CONFIG_SPI_ORION=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_DOVE_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
......
arch/arm/configs/genmai_defconfig
浏览文件 @ 930b440c
......@@ -50,6 +50,9 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_EEPROM_AT24=y
CONFIG_NETDEVICES=y
# CONFIG_NET_CORE is not set
# CONFIG_NET_VENDOR_ARC is not set
......@@ -78,7 +81,10 @@ CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=10
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_RIIC=y
CONFIG_SPI=y
CONFIG_SPI_RSPI=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
......
arch/arm/configs/keystone_defconfig
浏览文件 @ 930b440c
......@@ -111,6 +111,7 @@ CONFIG_MTD_BLOCK=y
CONFIG_MTD_PLATRAM=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_DAVINCI=y
CONFIG_MTD_UBI=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
......@@ -131,6 +132,8 @@ CONFIG_SPI_DAVINCI=y
CONFIG_SPI_SPIDEV=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
CONFIG_DAVINCI_WATCHDOG=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
......@@ -145,6 +148,7 @@ CONFIG_DMADEVICES=y
CONFIG_TI_EDMA=y
CONFIG_COMMON_CLK_DEBUG=y
CONFIG_MEMORY=y
CONFIG_TI_AEMIF=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_MSDOS_FS=y
......@@ -177,3 +181,14 @@ CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_DAVINCI=y
CONFIG_LEDS_CLASS=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
arch/arm/configs/koelsch_defconfig
浏览文件 @ 930b440c
......@@ -8,7 +8,6 @@ CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
# CONFIG_BLOCK is not set
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7791=y
CONFIG_MACH_KOELSCH=y
......@@ -35,7 +34,14 @@ CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
......@@ -53,18 +59,31 @@ CONFIG_SH_ETH=y
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_RCAR=y
CONFIG_SPI=y
CONFIG_SPI_RSPI=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_RCAR=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
# CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set
CONFIG_TMPFS=y
......
arch/arm/configs/kzm9g_defconfig
浏览文件 @ 930b440c
......@@ -60,6 +60,8 @@ CONFIG_IRDA=y
CONFIG_SH_IRDA=y
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
......
arch/arm/configs/lager_defconfig
浏览文件 @ 930b440c
......@@ -49,6 +49,13 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
CONFIG_NETDEVICES=y
# CONFIG_NET_CORE is not set
# CONFIG_NET_VENDOR_ARC is not set
......@@ -81,6 +88,8 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_RCAR=y
CONFIG_SPI=y
CONFIG_SPI_RSPI=y
CONFIG_GPIO_SH_PFC=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_RCAR=y
......@@ -90,8 +99,20 @@ CONFIG_RCAR_THERMAL=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=y
CONFIG_SOC_CAMERA_PLATFORM=y
CONFIG_VIDEO_RCAR_VIN=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=y
CONFIG_DRM=y
CONFIG_DRM_RCAR_DU=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
......
arch/arm/configs/mackerel_defconfig
浏览文件 @ 930b440c
......@@ -42,6 +42,8 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_MTD=y
CONFIG_MTD_CONCAT=y
......
arch/arm/configs/marzen_defconfig
浏览文件 @ 930b440c
......@@ -43,6 +43,8 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FW_LOADER is not set
......
arch/arm/configs/multi_v5_defconfig 0 → 100644
浏览文件 @ 930b440c
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_T5325=y
CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX25_DT=y
CONFIG_MACH_IMX27_DT=y
CONFIG_ARCH_U300=y
CONFIG_PCI_MVEBU=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
CONFIG_ARM_KIRKWOOD_CPUIDLE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_NET_PKTGEN=m
CONFIG_CFG80211=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ORION=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_EEPROM_AT24=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=m
CONFIG_CHR_DEV_SG=m
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_NET_DSA_MV88E6123_61_65=y
CONFIG_MV643XX_ETH=y
CONFIG_R8169=y
CONFIG_MARVELL_PHY=y
CONFIG_LIBERTAS=y
CONFIG_LIBERTAS_SDIO=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MV64XXX=y
CONFIG_I2C_NOMADIK=y
CONFIG_SPI=y
CONFIG_SPI_ORION=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_SUPPLY=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_QNAP=y
CONFIG_SENSORS_ADT7475=y
CONFIG_SENSORS_LM63=y
CONFIG_SENSORS_LM75=y
CONFIG_SENSORS_LM85=y
CONFIG_THERMAL=y
CONFIG_KIRKWOOD_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_FB=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_KIRKWOOD_SOC=y
CONFIG_SND_KIRKWOOD_SOC_T5325=y
# CONFIG_ABX500_CORE is not set
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_HID_DRAGONRISE=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_NTRIG=y
CONFIG_HID_PANTHERLORD=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SONY=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_ZEROPLUS=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_PRINTER=m
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
CONFIG_MMC=y
CONFIG_SDIO_UART=y
CONFIG_MMC_MVSDIO=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RS5C372=y
CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_S35390A=y
CONFIG_RTC_DRV_MV=y
CONFIG_DMADEVICES=y
CONFIG_MV_XOR=y
CONFIG_STAGING=y
CONFIG_FB_XGI=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_EXT4_FS=y
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_UTF8=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_MV_CESA=y
CONFIG_CRC_CCITT=y
CONFIG_LIBCRC32C=y
arch/arm/configs/multi_v7_defconfig
浏览文件 @ 930b440c
CONFIG_SYSVIPC=y
CONFIG_FHANDLE=y
CONFIG_IRQ_DOMAIN_DEBUG=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
......@@ -9,7 +10,10 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_375=y
CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_MACH_DOVE=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_5301X=y
CONFIG_ARCH_BCM_MOBILE=y
......@@ -32,6 +36,10 @@ CONFIG_SOC_OMAP5=y
CONFIG_SOC_AM33XX=y
CONFIG_SOC_DRA7XX=y
CONFIG_SOC_AM43XX=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_MSM8X60=y
CONFIG_ARCH_MSM8960=y
CONFIG_ARCH_MSM8974=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_PLAT_SPEAR=y
......@@ -96,6 +104,7 @@ CONFIG_RFKILL_GPIO=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_OMAP_OCP2SCP=y
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
......@@ -113,6 +122,7 @@ CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_SUN4I_EMAC=y
CONFIG_NET_CALXEDA_XGMAC=y
CONFIG_MV643XX_ETH=y
CONFIG_MVNETA=y
CONFIG_KS8851=y
CONFIG_R8169=y
......@@ -148,6 +158,8 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_VT8500=y
CONFIG_SERIAL_VT8500_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
......@@ -161,6 +173,7 @@ CONFIG_SERIAL_ST_ASC=y
CONFIG_SERIAL_ST_ASC_CONSOLE=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_MV64XXX=y
......@@ -189,7 +202,10 @@ CONFIG_POWER_RESET_AS3722=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_SENSORS_LM90=y
CONFIG_THERMAL=y
CONFIG_DOVE_THERMAL=y
CONFIG_ARMADA_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_MFD_AS3722=y
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_SPI=y
......@@ -214,6 +230,8 @@ CONFIG_REGULATOR_VEXPRESS=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=y
CONFIG_USB_GSPCA=y
CONFIG_DRM=y
CONFIG_DRM_TEGRA=y
CONFIG_DRM_PANEL_SIMPLE=y
......@@ -256,6 +274,7 @@ CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_TEGRA=y
CONFIG_MMC_SDHCI_DOVE=y
CONFIG_MMC_SDHCI_SPEAR=y
CONFIG_MMC_SDHCI_BCM_KONA=y
CONFIG_MMC_OMAP=y
......@@ -296,6 +315,10 @@ CONFIG_MFD_NVEC=y
CONFIG_KEYBOARD_NVEC=y
CONFIG_SERIO_NVEC_PS2=y
CONFIG_NVEC_POWER=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_MSM_GCC_8660=y
CONFIG_MSM_MMCC_8960=y
CONFIG_MSM_MMCC_8974=y
CONFIG_TEGRA_IOMMU_GART=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_MEMORY=y
......
arch/arm/configs/mvebu_v5_defconfig 0 → 100644
浏览文件 @ 930b440c
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=19
CONFIG_PROFILING=y
CONFIG_OPROFILE=y
CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_T5325=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_PCI_MVEBU=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_IDLE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_NET_PKTGEN=m
CONFIG_CFG80211=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ORION=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_EEPROM_AT24=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=m
CONFIG_CHR_DEV_SG=m
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_NET_DSA_MV88E6123_61_65=y
CONFIG_MV643XX_ETH=y
CONFIG_R8169=y
CONFIG_MARVELL_PHY=y
CONFIG_LIBERTAS=y
CONFIG_LIBERTAS_SDIO=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MV64XXX=y
CONFIG_SPI=y
CONFIG_SPI_ORION=y
CONFIG_GPIO_SYSFS=y
CONFIG_POWER_SUPPLY=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_QNAP=y
CONFIG_SENSORS_ADT7475=y
CONFIG_SENSORS_LM63=y
CONFIG_SENSORS_LM75=y
CONFIG_SENSORS_LM85=y
CONFIG_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_FB=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_KIRKWOOD_SOC=y
CONFIG_SND_KIRKWOOD_SOC_T5325=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_HID_DRAGONRISE=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
CONFIG_HID_NTRIG=y
CONFIG_HID_PANTHERLORD=y
CONFIG_HID_PETALYNX=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SONY=y
CONFIG_HID_SUNPLUS=y
CONFIG_HID_GREENASIA=y
CONFIG_HID_SMARTJOYPLUS=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THRUSTMASTER=y
CONFIG_HID_ZEROPLUS=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_PRINTER=m
CONFIG_USB_STORAGE=y
CONFIG_USB_STORAGE_DATAFAB=y
CONFIG_USB_STORAGE_FREECOM=y
CONFIG_USB_STORAGE_SDDR09=y
CONFIG_USB_STORAGE_SDDR55=y
CONFIG_USB_STORAGE_JUMPSHOT=y
CONFIG_MMC=y
CONFIG_SDIO_UART=y
CONFIG_MMC_MVSDIO=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RS5C372=y
CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_S35390A=y
CONFIG_RTC_DRV_MV=y
CONFIG_DMADEVICES=y
CONFIG_MV_XOR=y
CONFIG_STAGING=y
CONFIG_FB_XGI=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_EXT4_FS=y
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_UTF8=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_MV_CESA=y
CONFIG_CRC_CCITT=y
CONFIG_LIBCRC32C=y
arch/arm/configs/mvebu_defconfig → arch/arm/configs/mvebu_v7_defconfig
浏览文件 @ 930b440c
......@@ -10,6 +10,8 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_375=y
CONFIG_MACH_ARMADA_38X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_NEON=y
# CONFIG_CACHE_L2X0 is not set
......@@ -63,6 +65,13 @@ CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_THERMAL=y
CONFIG_ARMADA_THERMAL=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_KIRKWOOD_SOC=y
CONFIG_SND_KIRKWOOD_SOC_ARMADA370_DB=y
CONFIG_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_USB_SUPPORT=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
......
arch/arm/configs/kzm9d_defconfig → arch/arm/configs/shmobile_defconfig
浏览文件 @ 930b440c
# CONFIG_ARM_PATCH_PHYS_VIRT is not set
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_IKCONFIG=y
......@@ -10,80 +8,122 @@ CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_PERF_EVENTS=y
CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_SHMOBILE_MULTI=y
CONFIG_ARCH_EMEV2=y
CONFIG_MACH_KZM9D=y
CONFIG_MEMORY_START=0x40000000
CONFIG_MEMORY_SIZE=0x10000000
# CONFIG_SH_TIMER_TMU is not set
CONFIG_ARCH_R8A7790=y
CONFIG_ARCH_R8A7791=y
CONFIG_MACH_KOELSCH=y
CONFIG_MACH_LAGER=y
# CONFIG_SWP_EMULATE is not set
# CONFIG_CACHE_L2X0 is not set
CONFIG_CPU_BPREDICT_DISABLE=y
CONFIG_PL310_ERRATA_588369=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_PCI=y
CONFIG_PCI_RCAR_GEN2=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_HOTPLUG_CPU=y
# CONFIG_LOCAL_TIMERS is not set
CONFIG_SCHED_MC=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_NR_CPUS=8
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_FORCE_MAX_ZONEORDER=13
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_KEXEC=y
CONFIG_VFP=y
CONFIG_NEON=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_BLK_DEV is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
CONFIG_SH_ETH=y
# CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_WLAN is not set
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_KEYBOARD is not set
CONFIG_SMSC_PHY=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_EM=y
# CONFIG_HW_RANDOM is not set
CONFIG_GPIOLIB=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_RCAR=y
CONFIG_SPI=y
CONFIG_SPI_RSPI=y
CONFIG_GPIO_EM=y
CONFIG_GPIO_RCAR=y
# CONFIG_HWMON is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_THERMAL=y
CONFIG_RCAR_THERMAL=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=y
CONFIG_SOC_CAMERA_PLATFORM=y
CONFIG_VIDEO_RCAR_VIN=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=y
CONFIG_DRM=y
CONFIG_DRM_RCAR_DU=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
CONFIG_USB_RCAR_GEN2_PHY=y
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_DMADEVICES=y
CONFIG_SH_DMAE=y
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_V4_1=y
CONFIG_ROOT_NFS=y
# CONFIG_FTRACE is not set
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_ARM_UNWIND is not set
arch/arm/configs/sunxi_defconfig
浏览文件 @ 930b440c
......@@ -24,6 +24,7 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_EEPROM_SUNXI_SID=y
CONFIG_NETDEVICES=y
CONFIG_SUN4I_EMAC=y
# CONFIG_NET_CADENCE is not set
......@@ -48,6 +49,8 @@ CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MV64XXX=y
CONFIG_SPI=y
CONFIG_SPI_SUN6I=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
......
arch/arm/configs/tegra_defconfig
浏览文件 @ 930b440c
CONFIG_SYSVIPC=y
CONFIG_FHANDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
......@@ -86,6 +87,7 @@ CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_PROC_DEVICETREE=y
......@@ -125,6 +127,7 @@ CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_TEGRA=y
CONFIG_SPI=y
......@@ -141,6 +144,7 @@ CONFIG_POWER_SUPPLY=y
CONFIG_BATTERY_SBS=y
CONFIG_CHARGER_TPS65090=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_AS3722=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_SENSORS_LM90=y
CONFIG_MFD_AS3722=y
......@@ -166,7 +170,8 @@ CONFIG_REGULATOR_TPS65910=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_VIDEO_CLASS=y
CONFIG_USB_GSPCA=y
CONFIG_DRM=y
CONFIG_DRM_TEGRA=y
CONFIG_DRM_PANEL_SIMPLE=y
......
arch/arm/mach-pxa/corgi.c
浏览文件 @ 930b440c
......@@ -32,6 +32,7 @@
#include <linux/spi/pxa2xx_spi.h>
#include <linux/mtd/sharpsl.h>
#include <linux/input/matrix_keypad.h>
#include <linux/gpio_keys.h>
#include <linux/module.h>
#include <video/w100fb.h>
......@@ -405,6 +406,44 @@ static struct platform_device corgikbd_device = {
},
};
static struct gpio_keys_button corgi_gpio_keys[] = {
{
.type = EV_SW,
.code = SW_LID,
.gpio = CORGI_GPIO_SWA,
.desc = "Lid close switch",
.debounce_interval = 500,
},
{
.type = EV_SW,
.code = SW_TABLET_MODE,
.gpio = CORGI_GPIO_SWB,
.desc = "Tablet mode switch",
.debounce_interval = 500,
},
{
.type = EV_SW,
.code = SW_HEADPHONE_INSERT,
.gpio = CORGI_GPIO_AK_INT,
.desc = "HeadPhone insert",
.debounce_interval = 500,
},
};
static struct gpio_keys_platform_data corgi_gpio_keys_platform_data = {
.buttons = corgi_gpio_keys,
.nbuttons = ARRAY_SIZE(corgi_gpio_keys),
.poll_interval = 250,
};
static struct platform_device corgi_gpio_keys_device = {
.name = "gpio-keys-polled",
.id = -1,
.dev = {
.platform_data = &corgi_gpio_keys_platform_data,
},
};
/*
* Corgi LEDs
*/
......@@ -646,6 +685,7 @@ static struct platform_device sharpsl_rom_device = {
static struct platform_device *devices[] __initdata = {
&corgiscoop_device,
&corgifb_device,
&corgi_gpio_keys_device,
&corgikbd_device,
&corgiled_device,
&corgi_audio_device,
......
arch/arm/mach-shmobile/Kconfig
浏览文件 @ 930b440c
......@@ -45,15 +45,12 @@ config MACH_GENMAI
config MACH_KOELSCH
bool "Koelsch board"
depends on ARCH_R8A7791
config MACH_KZM9D
bool "KZM9D board"
depends on ARCH_EMEV2
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select MICREL_PHY if SH_ETH
config MACH_LAGER
bool "Lager board"
depends on ARCH_R8A7790
select MICREL_PHY if SH_ETH
comment "Renesas ARM SoCs System Configuration"
endif
......@@ -166,11 +163,13 @@ comment "Renesas ARM SoCs Board Type"
config MACH_APE6EVM
bool "APE6EVM board"
depends on ARCH_R8A73A4
select SMSC_PHY if SMSC911X
select USE_OF
config MACH_APE6EVM_REFERENCE
bool "APE6EVM board - Reference Device Tree Implementation"
depends on ARCH_R8A73A4
select SMSC_PHY if SMSC911X
select USE_OF
---help---
Use reference implementation of APE6EVM board support
......@@ -184,6 +183,7 @@ config MACH_MACKEREL
depends on ARCH_SH7372
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SMSC_PHY if SMSC911X
select SND_SOC_AK4642 if SND_SIMPLE_CARD
select USE_OF
......@@ -192,6 +192,7 @@ config MACH_ARMADILLO800EVA
depends on ARCH_R8A7740
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SMSC_PHY if SH_ETH
select SND_SOC_WM8978 if SND_SIMPLE_CARD
select USE_OF
......@@ -200,6 +201,7 @@ config MACH_ARMADILLO800EVA_REFERENCE
depends on ARCH_R8A7740
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SMSC_PHY if SH_ETH
select SND_SOC_WM8978 if SND_SIMPLE_CARD
select USE_OF
---help---
......@@ -213,11 +215,11 @@ config MACH_BOCKW
bool "BOCK-W platform"
depends on ARCH_R8A7778
select ARCH_REQUIRE_GPIOLIB
select RENESAS_INTC_IRQPIN
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
select RENESAS_INTC_IRQPIN
select SND_SOC_AK4554 if SND_SIMPLE_CARD
select SND_SOC_AK4642 if SND_SIMPLE_CARD
select USE_OF
config MACH_BOCKW_REFERENCE
bool "BOCK-W - Reference Device Tree Implementation"
......@@ -273,6 +275,8 @@ config MACH_LAGER
bool "Lager board"
depends on ARCH_R8A7790
select USE_OF
select MICREL_PHY if SH_ETH
select SND_SOC_AK4642 if SND_SIMPLE_CARD
config MACH_KOELSCH
bool "Koelsch board"
......
arch/arm/mach-shmobile/Makefile
浏览文件 @ 930b440c
......@@ -59,7 +59,6 @@ obj-$(CONFIG_ARCH_R8A7790) += pm-r8a7790.o pm-rcar.o
ifdef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_GENMAI) += board-genmai-reference.o
obj-$(CONFIG_MACH_KOELSCH) += board-koelsch-reference.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o
else
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
......
arch/arm/mach-shmobile/board-armadillo800eva.c
浏览文件 @ 930b440c
......@@ -383,6 +383,8 @@ static struct platform_device sh_eth_device = {
.id = -1,
.dev = {
.platform_data = &sh_eth_platdata,
.dma_mask = &sh_eth_device.dev.coherent_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
.resource = sh_eth_resources,
.num_resources = ARRAY_SIZE(sh_eth_resources),
......
arch/arm/mach-shmobile/board-bockw.c
浏览文件 @ 930b440c
/*
* Bock-W board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013-2014 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
* Copyright (C) 2013 Cogent Embedded, Inc.
* Copyright (C) 2013-2014 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -168,6 +168,8 @@ static struct renesas_usbhs_platform_info usbhs_info __initdata = {
},
.driver_param = {
.buswait_bwait = 4,
.d0_tx_id = HPBDMA_SLAVE_USBFUNC_TX,
.d1_rx_id = HPBDMA_SLAVE_USBFUNC_RX,
},
};
......@@ -233,6 +235,17 @@ static struct sh_eth_plat_data ether_platform_data __initdata = {
.no_ether_link = 1,
};
static struct platform_device_info ether_info __initdata = {
.parent = &platform_bus,
.name = "r8a777x-ether",
.id = -1,
.res = ether_resources,
.num_res = ARRAY_SIZE(ether_resources),
.data = &ether_platform_data,
.size_data = sizeof(ether_platform_data),
.dma_mask = DMA_BIT_MASK(32),
};
/* I2C */
static struct i2c_board_info i2c0_devices[] = {
{
......@@ -332,16 +345,24 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_UNUSED, /* SSI 0 */
RSND_SSI_UNUSED, /* SSI 1 */
RSND_SSI_UNUSED, /* SSI 2 */
RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI_SET(1, HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), RSND_SSI_PLAY),
RSND_SSI_SET(2, HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
RSND_SSI_SET(3, HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(4, HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
};
static struct rsnd_scu_platform_info rsnd_scu[9] = {
/* no member at this point */
{ .flags = 0, }, /* SRU 0 */
{ .flags = 0, }, /* SRU 1 */
{ .flags = 0, }, /* SRU 2 */
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
};
enum {
......@@ -576,11 +597,7 @@ static void __init bockw_init(void)
r8a7778_init_irq_extpin(1);
r8a7778_add_standard_devices();
platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
ether_resources,
ARRAY_SIZE(ether_resources),
&ether_platform_data,
sizeof(ether_platform_data));
platform_device_register_full(&ether_info);
platform_device_register_full(&vin0_info);
/* VIN1 has a pin conflict with Ether */
......
arch/arm/mach-shmobile/board-genmai.c
浏览文件 @ 930b440c
/*
* Genmai board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013-2014 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
* Copyright (C) 2014 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -20,15 +21,87 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sh_eth.h>
#include <linux/spi/rspi.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r7s72100.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
/* Ether */
static const struct sh_eth_plat_data ether_pdata __initconst = {
.phy = 0x00, /* PD60610 */
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.phy_interface = PHY_INTERFACE_MODE_MII,
.no_ether_link = 1
};
static const struct resource ether_resources[] __initconst = {
DEFINE_RES_MEM(0xe8203000, 0x800),
DEFINE_RES_MEM(0xe8204800, 0x200),
DEFINE_RES_IRQ(gic_iid(359)),
};
static const struct platform_device_info ether_info __initconst = {
.parent = &platform_bus,
.name = "r7s72100-ether",
.id = -1,
.res = ether_resources,
.num_res = ARRAY_SIZE(ether_resources),
.data = &ether_pdata,
.size_data = sizeof(ether_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
/* RSPI */
#define RSPI_RESOURCE(idx, baseaddr, irq) \
static const struct resource rspi##idx##_resources[] __initconst = { \
DEFINE_RES_MEM(baseaddr, 0x24), \
DEFINE_RES_IRQ_NAMED(irq, "error"), \
DEFINE_RES_IRQ_NAMED(irq + 1, "rx"), \
DEFINE_RES_IRQ_NAMED(irq + 2, "tx"), \
}
RSPI_RESOURCE(0, 0xe800c800, gic_iid(270));
RSPI_RESOURCE(1, 0xe800d000, gic_iid(273));
RSPI_RESOURCE(2, 0xe800d800, gic_iid(276));
RSPI_RESOURCE(3, 0xe800e000, gic_iid(279));
RSPI_RESOURCE(4, 0xe800e800, gic_iid(282));
static const struct rspi_plat_data rspi_pdata __initconst = {
.num_chipselect = 1,
};
#define r7s72100_register_rspi(idx) \
platform_device_register_resndata(&platform_bus, "rspi-rz", idx, \
rspi##idx##_resources, \
ARRAY_SIZE(rspi##idx##_resources), \
&rspi_pdata, sizeof(rspi_pdata))
static const struct spi_board_info spi_info[] __initconst = {
{
.modalias = "wm8978",
.max_speed_hz = 5000000,
.bus_num = 4,
.chip_select = 0,
},
};
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
r7s72100_add_dt_devices();
platform_device_register_full(&ether_info);
r7s72100_register_rspi(0);
r7s72100_register_rspi(1);
r7s72100_register_rspi(2);
r7s72100_register_rspi(3);
r7s72100_register_rspi(4);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
}
static const char * const genmai_boards_compat_dt[] __initconst = {
......
arch/arm/mach-shmobile/board-koelsch-reference.c
浏览文件 @ 930b440c
......@@ -21,46 +21,114 @@
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/rcar-gen2.h>
#include <mach/r8a7791.h>
#include <asm/mach/arch.h>
/* DU */
static struct rcar_du_encoder_data koelsch_du_encoders[] = {
{
.type = RCAR_DU_ENCODER_NONE,
.output = RCAR_DU_OUTPUT_LVDS0,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static struct rcar_du_platform_data koelsch_du_pdata = {
.encoders = koelsch_du_encoders,
.num_encoders = ARRAY_SIZE(koelsch_du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfeb00000, 0x40000),
DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
DEFINE_RES_IRQ(gic_spi(256)),
DEFINE_RES_IRQ(gic_spi(268)),
};
static void __init koelsch_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7791",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &koelsch_du_pdata,
.size_data = sizeof(koelsch_du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
static void __init koelsch_add_standard_devices(void)
{
#ifdef CONFIG_COMMON_CLK
/*
* This is a really crude hack to provide clkdev support to the SCIF
* and CMT devices until they get moved to DT.
* This is a really crude hack to provide clkdev support to the CMT and
* DU devices until they get moved to DT.
*/
static const char * const scif_names[] = {
"scifa0", "scifa1", "scifb0", "scifb1", "scifb2", "scifa2",
"scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scifa3",
"scifa4", "scifa5",
static const struct clk_name {
const char *clk;
const char *con_id;
const char *dev_id;
} clk_names[] = {
{ "cmt0", NULL, "sh_cmt.0" },
{ "scifa0", NULL, "sh-sci.0" },
{ "scifa1", NULL, "sh-sci.1" },
{ "scifb0", NULL, "sh-sci.2" },
{ "scifb1", NULL, "sh-sci.3" },
{ "scifb2", NULL, "sh-sci.4" },
{ "scifa2", NULL, "sh-sci.5" },
{ "scif0", NULL, "sh-sci.6" },
{ "scif1", NULL, "sh-sci.7" },
{ "scif2", NULL, "sh-sci.8" },
{ "scif3", NULL, "sh-sci.9" },
{ "scif4", NULL, "sh-sci.10" },
{ "scif5", NULL, "sh-sci.11" },
{ "scifa3", NULL, "sh-sci.12" },
{ "scifa4", NULL, "sh-sci.13" },
{ "scifa5", NULL, "sh-sci.14" },
{ "du0", "du.0", "rcar-du-r8a7791" },
{ "du1", "du.1", "rcar-du-r8a7791" },
{ "lvds0", "lvds.0", "rcar-du-r8a7791" },
};
struct clk *clk;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
clk = clk_get(NULL, scif_names[i]);
if (clk) {
clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
clk = clk_get(NULL, clk_names[i].clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clk_names[i].con_id,
clk_names[i].dev_id);
clk_put(clk);
}
}
clk = clk_get(NULL, "cmt0");
if (clk) {
clk_register_clkdev(clk, NULL, "sh_cmt.0");
clk_put(clk);
}
#else
r8a7791_clock_init();
#endif
r8a7791_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
koelsch_add_du_device();
}
static const char * const koelsch_boards_compat_dt[] __initconst = {
......
arch/arm/mach-shmobile/board-koelsch.c
浏览文件 @ 930b440c
......@@ -2,8 +2,9 @@
* Koelsch board support
*
* Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013-2014 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
* Copyright (C) 2014 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -23,14 +24,27 @@
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/phy.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
#include <linux/sh_eth.h>
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7791.h>
......@@ -92,6 +106,7 @@ static void __init koelsch_add_du_device(void)
/* Ether */
static const struct sh_eth_plat_data ether_pdata __initconst = {
.phy = 0x1,
.phy_irq = irq_pin(0),
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.phy_interface = PHY_INTERFACE_MODE_RMII,
.ether_link_active_low = 1,
......@@ -102,6 +117,17 @@ static const struct resource ether_resources[] __initconst = {
DEFINE_RES_IRQ(gic_spi(162)),
};
static const struct platform_device_info ether_info __initconst = {
.parent = &platform_bus,
.name = "r8a7791-ether",
.id = -1,
.res = ether_resources,
.num_res = ARRAY_SIZE(ether_resources),
.data = &ether_pdata,
.size_data = sizeof(ether_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
/* LEDS */
static struct gpio_led koelsch_leds[] = {
{
......@@ -148,6 +174,199 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
/* QSPI */
static const struct resource qspi_resources[] __initconst = {
DEFINE_RES_MEM(0xe6b10000, 0x1000),
DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
};
static const struct rspi_plat_data qspi_pdata __initconst = {
.num_chipselect = 1,
};
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64 MiB) */
static struct mtd_partition spi_flash_part[] = {
{
.name = "loader",
.offset = 0x00000000,
.size = 512 * 1024,
.mask_flags = MTD_WRITEABLE,
},
{
.name = "bootenv",
.offset = MTDPART_OFS_APPEND,
.size = 512 * 1024,
.mask_flags = MTD_WRITEABLE,
},
{
.name = "data",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
},
};
static const struct flash_platform_data spi_flash_data = {
.name = "m25p80",
.parts = spi_flash_part,
.nr_parts = ARRAY_SIZE(spi_flash_part),
.type = "s25fl512s",
};
static const struct spi_board_info spi_info[] __initconst = {
{
.modalias = "m25p80",
.platform_data = &spi_flash_data,
.mode = SPI_MODE_0,
.max_speed_hz = 30000000,
.bus_num = 0,
.chip_select = 0,
},
};
/* SATA0 */
static const struct resource sata0_resources[] __initconst = {
DEFINE_RES_MEM(0xee300000, 0x2000),
DEFINE_RES_IRQ(gic_spi(105)),
};
static const struct platform_device_info sata0_info __initconst = {
.parent = &platform_bus,
.name = "sata-r8a7791",
.id = 0,
.res = sata0_resources,
.num_res = ARRAY_SIZE(sata0_resources),
.dma_mask = DMA_BIT_MASK(32),
};
/* I2C */
static const struct resource i2c_resources[] __initconst = {
/* I2C0 */
DEFINE_RES_MEM(0xE6508000, 0x40),
DEFINE_RES_IRQ(gic_spi(287)),
/* I2C1 */
DEFINE_RES_MEM(0xE6518000, 0x40),
DEFINE_RES_IRQ(gic_spi(288)),
/* I2C2 */
DEFINE_RES_MEM(0xE6530000, 0x40),
DEFINE_RES_IRQ(gic_spi(286)),
/* I2C3 */
DEFINE_RES_MEM(0xE6540000, 0x40),
DEFINE_RES_IRQ(gic_spi(290)),
/* I2C4 */
DEFINE_RES_MEM(0xE6520000, 0x40),
DEFINE_RES_IRQ(gic_spi(19)),
/* I2C5 */
DEFINE_RES_MEM(0xE6528000, 0x40),
DEFINE_RES_IRQ(gic_spi(20)),
};
static void __init koelsch_add_i2c(unsigned idx)
{
unsigned res_idx = idx * 2;
BUG_ON(res_idx >= ARRAY_SIZE(i2c_resources));
platform_device_register_simple("i2c-rcar_gen2", idx,
i2c_resources + res_idx, 2);
}
#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
\
static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
.constraints = { \
.valid_ops_mask = REGULATOR_CHANGE_STATUS, \
}, \
.consumer_supplies = &vcc_sdhi##idx##_consumer, \
.num_consumer_supplies = 1, \
}; \
\
static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
.supply_name = "SDHI" #idx "Vcc", \
.microvolts = 3300000, \
.gpio = vdd_pin, \
.enable_high = 1, \
.init_data = &vcc_sdhi##idx##_init_data, \
}; \
\
static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
\
static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
.constraints = { \
.input_uV = 3300000, \
.min_uV = 1800000, \
.max_uV = 3300000, \
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
REGULATOR_CHANGE_STATUS, \
}, \
.consumer_supplies = &vccq_sdhi##idx##_consumer, \
.num_consumer_supplies = 1, \
}; \
\
static struct gpio vccq_sdhi##idx##_gpio = \
{ vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
\
static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
{ .value = 1800000, .gpios = 0 }, \
{ .value = 3300000, .gpios = 1 }, \
}; \
\
static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
.supply_name = "vqmmc", \
.gpios = &vccq_sdhi##idx##_gpio, \
.nr_gpios = 1, \
.states = vccq_sdhi##idx##_states, \
.nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
.type = REGULATOR_VOLTAGE, \
.init_data = &vccq_sdhi##idx##_init_data, \
};
SDHI_REGULATOR(0, RCAR_GP_PIN(7, 17), RCAR_GP_PIN(2, 12));
SDHI_REGULATOR(1, RCAR_GP_PIN(7, 18), RCAR_GP_PIN(2, 13));
SDHI_REGULATOR(2, RCAR_GP_PIN(7, 19), RCAR_GP_PIN(2, 26));
/* SDHI0 */
static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_POWER_OFF_CARD,
.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
};
static struct resource sdhi0_resources[] __initdata = {
DEFINE_RES_MEM(0xee100000, 0x200),
DEFINE_RES_IRQ(gic_spi(165)),
};
/* SDHI1 */
static struct sh_mobile_sdhi_info sdhi1_info __initdata = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_POWER_OFF_CARD,
.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
};
static struct resource sdhi1_resources[] __initdata = {
DEFINE_RES_MEM(0xee140000, 0x100),
DEFINE_RES_IRQ(gic_spi(167)),
};
/* SDHI2 */
static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_POWER_OFF_CARD,
.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
TMIO_MMC_WRPROTECT_DISABLE,
};
static struct resource sdhi2_resources[] __initdata = {
DEFINE_RES_MEM(0xee160000, 0x100),
DEFINE_RES_IRQ(gic_spi(168)),
};
static const struct pinctrl_map koelsch_pinctrl_map[] = {
/* DU */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
......@@ -165,12 +384,51 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
"intc_irq0", "intc"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
"qspi_ctrl", "qspi"),
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7791",
"qspi_data4", "qspi"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
"scif0_data_d", "scif0"),
/* SCIF1 (CN20: DEBUG SERIAL1) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7791",
"scif1_data_d", "scif1"),
/* I2C1 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar_gen2.1", "pfc-r8a7791",
"i2c1_e", "i2c1"),
/* I2C2 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar_gen2.2", "pfc-r8a7791",
"i2c2", "i2c2"),
/* I2C4 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar_gen2.4", "pfc-r8a7791",
"i2c4_c", "i2c4"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
"sdhi0_cd", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7791",
"sdhi0_wp", "sdhi0"),
/* SDHI2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
"sdhi1_ctrl", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
"sdhi1_cd", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7791",
"sdhi1_wp", "sdhi1"),
/* SDHI2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7791",
"sdhi2_data4", "sdhi2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7791",
"sdhi2_ctrl", "sdhi2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7791",
"sdhi2_cd", "sdhi2"),
};
static void __init koelsch_add_standard_devices(void)
......@@ -180,18 +438,53 @@ static void __init koelsch_add_standard_devices(void)
ARRAY_SIZE(koelsch_pinctrl_map));
r8a7791_pinmux_init();
r8a7791_add_standard_devices();
platform_device_register_resndata(&platform_bus, "r8a7791-ether", -1,
ether_resources,
ARRAY_SIZE(ether_resources),
&ether_pdata, sizeof(ether_pdata));
platform_device_register_full(&ether_info);
platform_device_register_data(&platform_bus, "leds-gpio", -1,
&koelsch_leds_pdata,
sizeof(koelsch_leds_pdata));
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&koelsch_keys_pdata,
sizeof(koelsch_keys_pdata));
platform_device_register_resndata(&platform_bus, "qspi", 0,
qspi_resources,
ARRAY_SIZE(qspi_resources),
&qspi_pdata, sizeof(qspi_pdata));
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
koelsch_add_du_device();
platform_device_register_full(&sata0_info);
koelsch_add_i2c(1);
koelsch_add_i2c(2);
koelsch_add_i2c(4);
koelsch_add_i2c(5);
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 0,
&vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 1,
&vcc_sdhi1_info, sizeof(struct fixed_voltage_config));
platform_device_register_data(&platform_bus, "reg-fixed-voltage", 2,
&vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
platform_device_register_data(&platform_bus, "gpio-regulator", 0,
&vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
platform_device_register_data(&platform_bus, "gpio-regulator", 1,
&vccq_sdhi1_info, sizeof(struct gpio_regulator_config));
platform_device_register_data(&platform_bus, "gpio-regulator", 2,
&vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
&sdhi1_info, sizeof(struct sh_mobile_sdhi_info));
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
&sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
}
/*
......@@ -215,6 +508,8 @@ static void __init koelsch_init(void)
{
koelsch_add_standard_devices();
irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
if (IS_ENABLED(CONFIG_PHYLIB))
phy_register_fixup_for_id("r8a7791-ether-ff:01",
koelsch_ksz8041_fixup);
......
arch/arm/mach-shmobile/board-kzm9d-reference.c 已删除 100644 → 0
浏览文件 @ ff050ad1
/*
* kzm9d board support - Reference DT implementation
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/of_platform.h>
#include <mach/emev2.h>
#include <mach/common.h>
#include <asm/mach/arch.h>
static void __init kzm9d_add_standard_devices(void)
{
if (!IS_ENABLED(CONFIG_COMMON_CLK))
emev2_clock_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *kzm9d_boards_compat_dt[] __initdata = {
"renesas,kzm9d",
"renesas,kzm9d-reference",
NULL,
};
DT_MACHINE_START(KZM9D_DT, "kzm9d")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
.init_early = emev2_init_delay,
.init_machine = kzm9d_add_standard_devices,
.init_late = shmobile_init_late,
.dt_compat = kzm9d_boards_compat_dt,
MACHINE_END
arch/arm/mach-shmobile/board-lager-reference.c
浏览文件 @ 930b440c
......@@ -20,47 +20,116 @@
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/rcar-gen2.h>
#include <mach/r8a7790.h>
#include <asm/mach/arch.h>
/* DU */
static struct rcar_du_encoder_data lager_du_encoders[] = {
{
.type = RCAR_DU_ENCODER_VGA,
.output = RCAR_DU_OUTPUT_DPAD0,
}, {
.type = RCAR_DU_ENCODER_NONE,
.output = RCAR_DU_OUTPUT_LVDS1,
.connector.lvds.panel = {
.width_mm = 210,
.height_mm = 158,
.mode = {
.clock = 65000,
.hdisplay = 1024,
.hsync_start = 1048,
.hsync_end = 1184,
.htotal = 1344,
.vdisplay = 768,
.vsync_start = 771,
.vsync_end = 777,
.vtotal = 806,
.flags = 0,
},
},
},
};
static struct rcar_du_platform_data lager_du_pdata = {
.encoders = lager_du_encoders,
.num_encoders = ARRAY_SIZE(lager_du_encoders),
};
static const struct resource du_resources[] __initconst = {
DEFINE_RES_MEM(0xfeb00000, 0x70000),
DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
DEFINE_RES_IRQ(gic_spi(256)),
DEFINE_RES_IRQ(gic_spi(268)),
DEFINE_RES_IRQ(gic_spi(269)),
};
static void __init lager_add_du_device(void)
{
struct platform_device_info info = {
.name = "rcar-du-r8a7790",
.id = -1,
.res = du_resources,
.num_res = ARRAY_SIZE(du_resources),
.data = &lager_du_pdata,
.size_data = sizeof(lager_du_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
platform_device_register_full(&info);
}
static void __init lager_add_standard_devices(void)
{
#ifdef CONFIG_COMMON_CLK
/*
* This is a really crude hack to provide clkdev support to the SCIF
* and CMT devices until they get moved to DT.
* This is a really crude hack to provide clkdev support to platform
* devices until they get moved to DT.
*/
static const char * const scif_names[] = {
"scifa0", "scifa1", "scifb0", "scifb1",
"scifb2", "scifa2", "scif0", "scif1",
"hscif0", "hscif1",
static const struct clk_name {
const char *clk;
const char *con_id;
const char *dev_id;
} clk_names[] = {
{ "cmt0", NULL, "sh_cmt.0" },
{ "scifa0", NULL, "sh-sci.0" },
{ "scifa1", NULL, "sh-sci.1" },
{ "scifb0", NULL, "sh-sci.2" },
{ "scifb1", NULL, "sh-sci.3" },
{ "scifb2", NULL, "sh-sci.4" },
{ "scifa2", NULL, "sh-sci.5" },
{ "scif0", NULL, "sh-sci.6" },
{ "scif1", NULL, "sh-sci.7" },
{ "hscif0", NULL, "sh-sci.8" },
{ "hscif1", NULL, "sh-sci.9" },
{ "du0", "du.0", "rcar-du-r8a7790" },
{ "du1", "du.1", "rcar-du-r8a7790" },
{ "du2", "du.2", "rcar-du-r8a7790" },
{ "lvds0", "lvds.0", "rcar-du-r8a7790" },
{ "lvds1", "lvds.1", "rcar-du-r8a7790" },
};
struct clk *clk;
unsigned int i;
for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
clk = clk_get(NULL, scif_names[i]);
if (clk) {
clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
clk = clk_get(NULL, clk_names[i].clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clk_names[i].con_id,
clk_names[i].dev_id);
clk_put(clk);
}
}
clk = clk_get(NULL, "cmt0");
if (clk) {
clk_register_clkdev(clk, NULL, "sh_cmt.0");
clk_put(clk);
}
#else
r8a7790_clock_init();
#endif
r8a7790_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
lager_add_du_device();
}
static const char *lager_boards_compat_dt[] __initdata = {
......
arch/arm/mach-shmobile/board-lager.c
浏览文件 @ 930b440c
/*
* Lager board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013-2014 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
* Copyright (C) 2014 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -20,15 +21,21 @@
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/i2c.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/camera-rcar.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/rcar-du.h>
#include <linux/platform_data/usb-rcar-gen2-phy.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/regulator/driver.h>
......@@ -36,9 +43,12 @@
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
#include <linux/sh_eth.h>
#include <linux/usb/phy.h>
#include <linux/usb/renesas_usbhs.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7790.h>
#include <media/soc_camera.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/mtd/partitions.h>
......@@ -46,6 +56,33 @@
#include <linux/spi/flash.h>
#include <linux/spi/rspi.h>
#include <linux/spi/spi.h>
#include <sound/rcar_snd.h>
#include <sound/simple_card.h>
/*
* SSI-AK4643
*
* SW1: 1: AK4643
* 2: CN22
* 3: ADV7511
*
* this command is required when playback.
*
* # amixer set "LINEOUT Mixer DACL" on
*/
/*
* SDHI0 (CN8)
*
* JP3: pin1
* SW20: pin1
* GP5_24: 1: VDD 3.3V (defult)
* 0: VDD 0.0V
* GP5_29: 1: VccQ 3.3V (defult)
* 0: VccQ 1.8V
*
*/
/* DU */
static struct rcar_du_encoder_data lager_du_encoders[] = {
......@@ -228,6 +265,7 @@ static const struct resource mmcif1_resources[] __initconst = {
/* Ether */
static const struct sh_eth_plat_data ether_pdata __initconst = {
.phy = 0x1,
.phy_irq = irq_pin(0),
.edmac_endian = EDMAC_LITTLE_ENDIAN,
.phy_interface = PHY_INTERFACE_MODE_RMII,
.ether_link_active_low = 1,
......@@ -238,6 +276,17 @@ static const struct resource ether_resources[] __initconst = {
DEFINE_RES_IRQ(gic_spi(162)),
};
static const struct platform_device_info ether_info __initconst = {
.parent = &platform_bus,
.name = "r8a7790-ether",
.id = -1,
.res = ether_resources,
.num_res = ARRAY_SIZE(ether_resources),
.data = &ether_pdata,
.size_data = sizeof(ether_pdata),
.dma_mask = DMA_BIT_MASK(32),
};
/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
static struct mtd_partition spi_flash_part[] = {
/* Reserved for user loader program, read-only */
......@@ -263,7 +312,7 @@ static struct mtd_partition spi_flash_part[] = {
},
};
static struct flash_platform_data spi_flash_data = {
static const struct flash_platform_data spi_flash_data = {
.name = "m25p80",
.parts = spi_flash_part,
.nr_parts = ARRAY_SIZE(spi_flash_part),
......@@ -288,9 +337,361 @@ static const struct spi_board_info spi_info[] __initconst = {
/* QSPI resource */
static const struct resource qspi_resources[] __initconst = {
DEFINE_RES_MEM(0xe6b10000, 0x1000),
DEFINE_RES_IRQ(gic_spi(184)),
DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
};
/* VIN */
static const struct resource vin_resources[] __initconst = {
/* VIN0 */
DEFINE_RES_MEM(0xe6ef0000, 0x1000),
DEFINE_RES_IRQ(gic_spi(188)),
/* VIN1 */
DEFINE_RES_MEM(0xe6ef1000, 0x1000),
DEFINE_RES_IRQ(gic_spi(189)),
};
static void __init lager_add_vin_device(unsigned idx,
struct rcar_vin_platform_data *pdata)
{
struct platform_device_info vin_info = {
.parent = &platform_bus,
.name = "r8a7790-vin",
.id = idx,
.res = &vin_resources[idx * 2],
.num_res = 2,
.dma_mask = DMA_BIT_MASK(32),
.data = pdata,
.size_data = sizeof(*pdata),
};
BUG_ON(idx > 1);
platform_device_register_full(&vin_info);
}
#define LAGER_CAMERA(idx, name, addr, pdata, flag) \
static struct i2c_board_info i2c_cam##idx##_device = { \
I2C_BOARD_INFO(name, addr), \
}; \
\
static struct rcar_vin_platform_data vin##idx##_pdata = { \
.flags = flag, \
}; \
\
static struct soc_camera_link cam##idx##_link = { \
.bus_id = idx, \
.board_info = &i2c_cam##idx##_device, \
.i2c_adapter_id = 2, \
.module_name = name, \
.priv = pdata, \
}
/* Camera 0 is not currently supported due to adv7612 support missing */
LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
static void __init lager_add_camera1_device(void)
{
platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
&cam1_link, sizeof(cam1_link));
lager_add_vin_device(1, &vin1_pdata);
}
/* SATA1 */
static const struct resource sata1_resources[] __initconst = {
DEFINE_RES_MEM(0xee500000, 0x2000),
DEFINE_RES_IRQ(gic_spi(106)),
};
static const struct platform_device_info sata1_info __initconst = {
.parent = &platform_bus,
.name = "sata-r8a7790",
.id = 1,
.res = sata1_resources,
.num_res = ARRAY_SIZE(sata1_resources),
.dma_mask = DMA_BIT_MASK(32),
};
/* USBHS */
static const struct resource usbhs_resources[] __initconst = {
DEFINE_RES_MEM(0xe6590000, 0x100),
DEFINE_RES_IRQ(gic_spi(107)),
};
struct usbhs_private {
struct renesas_usbhs_platform_info info;
struct usb_phy *phy;
};
#define usbhs_get_priv(pdev) \
container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
static int usbhs_power_ctrl(struct platform_device *pdev,
void __iomem *base, int enable)
{
struct usbhs_private *priv = usbhs_get_priv(pdev);
if (!priv->phy)
return -ENODEV;
if (enable) {
int retval = usb_phy_init(priv->phy);
if (!retval)
retval = usb_phy_set_suspend(priv->phy, 0);
return retval;
}
usb_phy_set_suspend(priv->phy, 1);
usb_phy_shutdown(priv->phy);
return 0;
}
static int usbhs_hardware_init(struct platform_device *pdev)
{
struct usbhs_private *priv = usbhs_get_priv(pdev);
struct usb_phy *phy;
int ret;
/* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
* setting to avoid VBUS short circuit due to wrong cable.
* PWEN should be pulled up high if USB Function is selected by SW5
*/
gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
ret = -ENOTSUPP;
goto error;
}
phy = usb_get_phy_dev(&pdev->dev, 0);
if (IS_ERR(phy)) {
ret = PTR_ERR(phy);
goto error;
}
priv->phy = phy;
return 0;
error:
gpio_free(RCAR_GP_PIN(5, 18));
return ret;
}
static int usbhs_hardware_exit(struct platform_device *pdev)
{
struct usbhs_private *priv = usbhs_get_priv(pdev);
if (!priv->phy)
return 0;
usb_put_phy(priv->phy);
priv->phy = NULL;
gpio_free(RCAR_GP_PIN(5, 18));
return 0;
}
static int usbhs_get_id(struct platform_device *pdev)
{
return USBHS_GADGET;
}
static u32 lager_usbhs_pipe_type[] = {
USB_ENDPOINT_XFER_CONTROL,
USB_ENDPOINT_XFER_ISOC,
USB_ENDPOINT_XFER_ISOC,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_INT,
USB_ENDPOINT_XFER_INT,
USB_ENDPOINT_XFER_INT,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
USB_ENDPOINT_XFER_BULK,
};
static struct usbhs_private usbhs_priv __initdata = {
.info = {
.platform_callback = {
.power_ctrl = usbhs_power_ctrl,
.hardware_init = usbhs_hardware_init,
.hardware_exit = usbhs_hardware_exit,
.get_id = usbhs_get_id,
},
.driver_param = {
.buswait_bwait = 4,
.pipe_type = lager_usbhs_pipe_type,
.pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
},
}
};
static void __init lager_register_usbhs(void)
{
usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
platform_device_register_resndata(&platform_bus,
"renesas_usbhs", -1,
usbhs_resources,
ARRAY_SIZE(usbhs_resources),
&usbhs_priv.info,
sizeof(usbhs_priv.info));
}
/* USBHS PHY */
static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
.chan0_pci = 0, /* Channel 0 is USBHS */
.chan2_pci = 1, /* Channel 2 is PCI USB */
};
static const struct resource usbhs_phy_resources[] __initconst = {
DEFINE_RES_MEM(0xe6590100, 0x100),
};
/* I2C */
static struct i2c_board_info i2c2_devices[] = {
{
I2C_BOARD_INFO("ak4643", 0x12),
}
};
/* Sound */
static struct resource rsnd_resources[] __initdata = {
[RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
[RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
[RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
[RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
};
static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY),
RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
};
static struct rsnd_scu_platform_info rsnd_scu[2] = {
/* no member at this point */
};
static struct rcar_snd_info rsnd_info = {
.flags = RSND_GEN2,
.ssi_info = rsnd_ssi,
.ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
.scu_info = rsnd_scu,
.scu_info_nr = ARRAY_SIZE(rsnd_scu),
};
static struct asoc_simple_card_info rsnd_card_info = {
.name = "AK4643",
.card = "SSI01-AK4643",
.codec = "ak4642-codec.2-0012",
.platform = "rcar_sound",
.daifmt = SND_SOC_DAIFMT_LEFT_J,
.cpu_dai = {
.name = "rcar_sound",
.fmt = SND_SOC_DAIFMT_CBS_CFS,
},
.codec_dai = {
.name = "ak4642-hifi",
.fmt = SND_SOC_DAIFMT_CBM_CFM,
.sysclk = 11289600,
},
};
static void __init lager_add_rsnd_device(void)
{
struct platform_device_info cardinfo = {
.parent = &platform_bus,
.name = "asoc-simple-card",
.id = -1,
.data = &rsnd_card_info,
.size_data = sizeof(struct asoc_simple_card_info),
.dma_mask = DMA_BIT_MASK(32),
};
i2c_register_board_info(2, i2c2_devices,
ARRAY_SIZE(i2c2_devices));
platform_device_register_resndata(
&platform_bus, "rcar_sound", -1,
rsnd_resources, ARRAY_SIZE(rsnd_resources),
&rsnd_info, sizeof(rsnd_info));
platform_device_register_full(&cardinfo);
}
/* SDHI0 */
static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_POWER_OFF_CARD,
.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
TMIO_MMC_WRPROTECT_DISABLE,
};
static struct resource sdhi0_resources[] __initdata = {
DEFINE_RES_MEM(0xee100000, 0x200),
DEFINE_RES_IRQ(gic_spi(165)),
};
/* SDHI2 */
static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
MMC_CAP_POWER_OFF_CARD,
.tmio_caps2 = MMC_CAP2_NO_MULTI_READ,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
TMIO_MMC_WRPROTECT_DISABLE,
};
static struct resource sdhi2_resources[] __initdata = {
DEFINE_RES_MEM(0xee140000, 0x100),
DEFINE_RES_IRQ(gic_spi(167)),
};
/* Internal PCI1 */
static const struct resource pci1_resources[] __initconst = {
DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
DEFINE_RES_IRQ(gic_spi(112)),
};
static const struct platform_device_info pci1_info __initconst = {
.parent = &platform_bus,
.name = "pci-rcar-gen2",
.id = 1,
.res = pci1_resources,
.num_res = ARRAY_SIZE(pci1_resources),
.dma_mask = DMA_BIT_MASK(32),
};
static void __init lager_add_usb1_device(void)
{
platform_device_register_full(&pci1_info);
}
/* Internal PCI2 */
static const struct resource pci2_resources[] __initconst = {
DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
DEFINE_RES_IRQ(gic_spi(113)),
};
static const struct platform_device_info pci2_info __initconst = {
.parent = &platform_bus,
.name = "pci-rcar-gen2",
.id = 2,
.res = pci2_resources,
.num_res = ARRAY_SIZE(pci2_resources),
.dma_mask = DMA_BIT_MASK(32),
};
static void __init lager_add_usb2_device(void)
{
platform_device_register_full(&pci2_info);
}
static const struct pinctrl_map lager_pinctrl_map[] = {
/* DU (CN10: ARGB0, CN13: LVDS) */
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
......@@ -299,12 +700,43 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
"du_sync_1", "du"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
"du_clk_out_0", "du"),
/* I2C2 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
"i2c2", "i2c2"),
/* QSPI */
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
"qspi_ctrl", "qspi"),
PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
"qspi_data4", "qspi"),
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
"scif0_data", "scif0"),
/* SCIF1 (CN20: DEBUG SERIAL1) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
"scif1_data", "scif1"),
/* SDHI0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
"sdhi0_cd", "sdhi0"),
/* SDHI2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
"sdhi2_data4", "sdhi2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
"sdhi2_ctrl", "sdhi2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
"sdhi2_cd", "sdhi2"),
/* SSI (CN17: sound) */
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
"ssi0129_ctrl", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
"ssi0_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
"ssi1_data", "ssi"),
PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
"audio_clk_a", "audio_clk"),
/* MMCIF1 */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
"mmc1_data8", "mmc1"),
......@@ -319,6 +751,31 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
"eth_rmii", "eth"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
"intc_irq0", "intc"),
/* VIN0 */
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
"vin0_data24", "vin0"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
"vin0_sync", "vin0"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
"vin0_field", "vin0"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
"vin0_clkenb", "vin0"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
"vin0_clk", "vin0"),
/* VIN1 */
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
"vin1_data8", "vin1"),
PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
"vin1_clk", "vin1"),
/* USB0 */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
"usb0_ovc_vbus", "usb0"),
/* USB1 */
PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
"usb1", "usb1"),
/* USB2 */
PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
"usb2", "usb2"),
};
static void __init lager_add_standard_devices(void)
......@@ -346,10 +803,7 @@ static void __init lager_add_standard_devices(void)
mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
&mmcif1_pdata, sizeof(mmcif1_pdata));
platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
ether_resources,
ARRAY_SIZE(ether_resources),
&ether_pdata, sizeof(ether_pdata));
platform_device_register_full(&ether_info);
lager_add_du_device();
......@@ -368,6 +822,28 @@ static void __init lager_add_standard_devices(void)
&vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
&vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
lager_add_camera1_device();
platform_device_register_full(&sata1_info);
platform_device_register_resndata(&platform_bus, "usb_phy_rcar_gen2",
-1, usbhs_phy_resources,
ARRAY_SIZE(usbhs_phy_resources),
&usbhs_phy_pdata,
sizeof(usbhs_phy_pdata));
lager_register_usbhs();
lager_add_usb1_device();
lager_add_usb2_device();
lager_add_rsnd_device();
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 2,
sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
&sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
}
/*
......@@ -391,6 +867,8 @@ static void __init lager_init(void)
{
lager_add_standard_devices();
irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
if (IS_ENABLED(CONFIG_PHYLIB))
phy_register_fixup_for_id("r8a7790-ether-ff:01",
lager_ksz8041_fixup);
......
arch/arm/mach-shmobile/include/mach/head-kzm9g.txt 0 → 100644
浏览文件 @ 930b440c
LIST "KZM9G low-level initialization routine."
LIST "Adapted from u-boot KZM9G support code."
LIST "Copyright (C) 2013 Ulrich Hecht"
LIST "This program is free software; you can redistribute it and/or modify"
LIST "it under the terms of the GNU General Public License version 2 as"
LIST "published by the Free Software Foundation."
LIST "This program is distributed in the hope that it will be useful,"
LIST "but WITHOUT ANY WARRANTY; without even the implied warranty of"
LIST "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the"
LIST "GNU General Public License for more details."
LIST "Register definitions:"
LIST "Secure control register"
#define LIFEC_SEC_SRC (0xE6110008)
LIST "RWDT"
#define RWDT_BASE (0xE6020000)
#define RWTCSRA0 (RWDT_BASE + 0x04)
LIST "HPB Semaphore Control Registers"
#define HPBSCR_BASE (0xE6000000)
#define HPBCTRL6 (HPBSCR_BASE + 0x1030)
#define SBSC1_BASE (0xFE400000)
#define SDCR0A (SBSC1_BASE + 0x0008)
#define SDCR1A (SBSC1_BASE + 0x000C)
#define SDPCRA (SBSC1_BASE + 0x0010)
#define SDCR0SA (SBSC1_BASE + 0x0018)
#define SDCR1SA (SBSC1_BASE + 0x001C)
#define RTCSRA (SBSC1_BASE + 0x0020)
#define RTCORA (SBSC1_BASE + 0x0028)
#define RTCORHA (SBSC1_BASE + 0x002C)
#define SDWCRC0A (SBSC1_BASE + 0x0040)
#define SDWCRC1A (SBSC1_BASE + 0x0044)
#define SDWCR00A (SBSC1_BASE + 0x0048)
#define SDWCR01A (SBSC1_BASE + 0x004C)
#define SDWCR10A (SBSC1_BASE + 0x0050)
#define SDWCR11A (SBSC1_BASE + 0x0054)
#define SDWCR2A (SBSC1_BASE + 0x0060)
#define SDWCRC2A (SBSC1_BASE + 0x0064)
#define ZQCCRA (SBSC1_BASE + 0x0068)
#define SDMRACR0A (SBSC1_BASE + 0x0084)
#define SDMRTMPCRA (SBSC1_BASE + 0x008C)
#define SDMRTMPMSKA (SBSC1_BASE + 0x0094)
#define SDGENCNTA (SBSC1_BASE + 0x009C)
#define SDDRVCR0A (SBSC1_BASE + 0x00B4)
#define DLLCNT0A (SBSC1_BASE + 0x0354)
#define SDMRA1 (0xFE500000)
#define SDMRA2 (0xFE5C0000)
#define SDMRA3 (0xFE504000)
#define SBSC2_BASE (0xFB400000)
#define SDCR0B (SBSC2_BASE + 0x0008)
#define SDCR1B (SBSC2_BASE + 0x000C)
#define SDPCRB (SBSC2_BASE + 0x0010)
#define SDCR0SB (SBSC2_BASE + 0x0018)
#define SDCR1SB (SBSC2_BASE + 0x001C)
#define RTCSRB (SBSC2_BASE + 0x0020)
#define RTCORB (SBSC2_BASE + 0x0028)
#define RTCORHB (SBSC2_BASE + 0x002C)
#define SDWCRC0B (SBSC2_BASE + 0x0040)
#define SDWCRC1B (SBSC2_BASE + 0x0044)
#define SDWCR00B (SBSC2_BASE + 0x0048)
#define SDWCR01B (SBSC2_BASE + 0x004C)
#define SDWCR10B (SBSC2_BASE + 0x0050)
#define SDWCR11B (SBSC2_BASE + 0x0054)
#define SDPDCR0B (SBSC2_BASE + 0x0058)
#define SDWCR2B (SBSC2_BASE + 0x0060)
#define SDWCRC2B (SBSC2_BASE + 0x0064)
#define ZQCCRB (SBSC2_BASE + 0x0068)
#define SDMRACR0B (SBSC2_BASE + 0x0084)
#define SDMRTMPCRB (SBSC2_BASE + 0x008C)
#define SDMRTMPMSKB (SBSC2_BASE + 0x0094)
#define SDGENCNTB (SBSC2_BASE + 0x009C)
#define DPHYCNT0B (SBSC2_BASE + 0x00A0)
#define DPHYCNT1B (SBSC2_BASE + 0x00A4)
#define DPHYCNT2B (SBSC2_BASE + 0x00A8)
#define SDDRVCR0B (SBSC2_BASE + 0x00B4)
#define DLLCNT0B (SBSC2_BASE + 0x0354)
#define SDMRB1 (0xFB500000)
#define SDMRB2 (0xFB5C0000)
#define SDMRB3 (0xFB504000)
#define CPG_BASE (0xE6150000)
#define FRQCRA (CPG_BASE + 0x0000)
#define FRQCRB (CPG_BASE + 0x0004)
#define FRQCRD (CPG_BASE + 0x00E4)
#define VCLKCR1 (CPG_BASE + 0x0008)
#define VCLKCR2 (CPG_BASE + 0x000C)
#define VCLKCR3 (CPG_BASE + 0x001C)
#define ZBCKCR (CPG_BASE + 0x0010)
#define FLCKCR (CPG_BASE + 0x0014)
#define SD0CKCR (CPG_BASE + 0x0074)
#define SD1CKCR (CPG_BASE + 0x0078)
#define SD2CKCR (CPG_BASE + 0x007C)
#define FSIACKCR (CPG_BASE + 0x0018)
#define SUBCKCR (CPG_BASE + 0x0080)
#define SPUACKCR (CPG_BASE + 0x0084)
#define SPUVCKCR (CPG_BASE + 0x0094)
#define MSUCKCR (CPG_BASE + 0x0088)
#define HSICKCR (CPG_BASE + 0x008C)
#define FSIBCKCR (CPG_BASE + 0x0090)
#define MFCK1CR (CPG_BASE + 0x0098)
#define MFCK2CR (CPG_BASE + 0x009C)
#define DSITCKCR (CPG_BASE + 0x0060)
#define DSI0PCKCR (CPG_BASE + 0x0064)
#define DSI1PCKCR (CPG_BASE + 0x0068)
#define DSI0PHYCR (CPG_BASE + 0x006C)
#define DVFSCR3 (CPG_BASE + 0x0174)
#define DVFSCR4 (CPG_BASE + 0x0178)
#define DVFSCR5 (CPG_BASE + 0x017C)
#define MPMODE (CPG_BASE + 0x00CC)
#define PLLECR (CPG_BASE + 0x00D0)
#define PLL0CR (CPG_BASE + 0x00D8)
#define PLL1CR (CPG_BASE + 0x0028)
#define PLL2CR (CPG_BASE + 0x002C)
#define PLL3CR (CPG_BASE + 0x00DC)
#define PLL0STPCR (CPG_BASE + 0x00F0)
#define PLL1STPCR (CPG_BASE + 0x00C8)
#define PLL2STPCR (CPG_BASE + 0x00F8)
#define PLL3STPCR (CPG_BASE + 0x00FC)
#define RMSTPCR0 (CPG_BASE + 0x0110)
#define RMSTPCR1 (CPG_BASE + 0x0114)
#define RMSTPCR2 (CPG_BASE + 0x0118)
#define RMSTPCR3 (CPG_BASE + 0x011C)
#define RMSTPCR4 (CPG_BASE + 0x0120)
#define RMSTPCR5 (CPG_BASE + 0x0124)
#define SMSTPCR0 (CPG_BASE + 0x0130)
#define SMSTPCR2 (CPG_BASE + 0x0138)
#define SMSTPCR3 (CPG_BASE + 0x013C)
#define CPGXXCR4 (CPG_BASE + 0x0150)
#define SRCR0 (CPG_BASE + 0x80A0)
#define SRCR2 (CPG_BASE + 0x80B0)
#define SRCR3 (CPG_BASE + 0x80A8)
#define VREFCR (CPG_BASE + 0x00EC)
#define PCLKCR (CPG_BASE + 0x1020)
#define PORT32CR (0xE6051020)
#define PORT33CR (0xE6051021)
#define PORT34CR (0xE6051022)
#define PORT35CR (0xE6051023)
LIST "DRAM initialization code:"
EW RWTCSRA0, 0xA507
ED_AND LIFEC_SEC_SRC, 0xFFFF7FFF
ED_AND SMSTPCR3,0xFFFF7FFF
ED_AND SRCR3, 0xFFFF7FFF
ED_AND SMSTPCR2,0xFFFBFFFF
ED_AND SRCR2, 0xFFFBFFFF
ED PLLECR, 0x00000000
WAIT_MASK PLLECR, 0x00000F00, 0x00000000
WAIT_MASK FRQCRB, 0x80000000, 0x00000000
ED PLL0CR, 0x2D000000
ED PLL1CR, 0x17100000
ED FRQCRB, 0x96235880
WAIT_MASK FRQCRB, 0x80000000, 0x00000000
ED FLCKCR, 0x0000000B
ED_AND SMSTPCR0, 0xFFFFFFFD
ED_AND SRCR0, 0xFFFFFFFD
ED 0xE6001628, 0x514
ED 0xE6001648, 0x514
ED 0xE6001658, 0x514
ED 0xE6001678, 0x514
ED DVFSCR4, 0x00092000
ED DVFSCR5, 0x000000DC
ED PLLECR, 0x00000000
WAIT_MASK PLLECR, 0x00000F00, 0x00000000
ED FRQCRA, 0x0012453C
ED FRQCRB, 0x80431350
WAIT_MASK FRQCRB, 0x80000000, 0x00000000
ED FRQCRD, 0x00000B0B
WAIT_MASK FRQCRD, 0x80000000, 0x00000000
ED PCLKCR, 0x00000003
ED VCLKCR1, 0x0000012F
ED VCLKCR2, 0x00000119
ED VCLKCR3, 0x00000119
ED ZBCKCR, 0x00000002
ED FLCKCR, 0x00000005
ED SD0CKCR, 0x00000080
ED SD1CKCR, 0x00000080
ED SD2CKCR, 0x00000080
ED FSIACKCR, 0x0000003F
ED FSIBCKCR, 0x0000003F
ED SUBCKCR, 0x00000080
ED SPUACKCR, 0x0000000B
ED SPUVCKCR, 0x0000000B
ED MSUCKCR, 0x0000013F
ED HSICKCR, 0x00000080
ED MFCK1CR, 0x0000003F
ED MFCK2CR, 0x0000003F
ED DSITCKCR, 0x00000107
ED DSI0PCKCR, 0x00000313
ED DSI1PCKCR, 0x0000130D
ED DSI0PHYCR, 0x2A800E0E
ED PLL0CR, 0x1E000000
ED PLL0CR, 0x2D000000
ED PLL1CR, 0x17100000
ED PLL2CR, 0x27000080
ED PLL3CR, 0x1D000000
ED PLL0STPCR, 0x00080000
ED PLL1STPCR, 0x000120C0
ED PLL2STPCR, 0x00012000
ED PLL3STPCR, 0x00000030
ED PLLECR, 0x0000000B
WAIT_MASK PLLECR, 0x00000B00, 0x00000B00
ED DVFSCR3, 0x000120F0
ED MPMODE, 0x00000020
ED VREFCR, 0x0000028A
ED RMSTPCR0, 0xE4628087
ED RMSTPCR1, 0xFFFFFFFF
ED RMSTPCR2, 0x53FFFFFF
ED RMSTPCR3, 0xFFFFFFFF
ED RMSTPCR4, 0x00800D3D
ED RMSTPCR5, 0xFFFFF3FF
ED SMSTPCR2, 0x00000000
ED SRCR2, 0x00040000
ED_AND PLLECR, 0xFFFFFFF7
WAIT_MASK PLLECR, 0x00000800, 0x00000000
LIST "set SBSC operational"
ED HPBCTRL6, 0x00000001
WAIT_MASK HPBCTRL6, 0x00000001, 0x00000001
LIST "set SBSC operating frequency"
ED FRQCRD, 0x00001414
WAIT_MASK FRQCRD, 0x80000000, 0x00000000
ED PLL3CR, 0x1D000000
ED_OR PLLECR, 0x00000008
WAIT_MASK PLLECR, 0x00000800, 0x00000800
LIST "enable DLL oscillation in DDRPHY"
ED_OR DLLCNT0A, 0x00000002
LIST "wait >= 100 ns"
ED SDGENCNTA, 0x00000005
WAIT_MASK SDGENCNTA, 0xFFFFFFFF, 0x00000000
LIST "target LPDDR2 device settings"
ED SDCR0A, 0xACC90159
ED SDCR1A, 0x00010059
ED SDWCRC0A, 0x50874114
ED SDWCRC1A, 0x33199B37
ED SDWCRC2A, 0x008F2313
ED SDWCR00A, 0x31020707
ED SDWCR01A, 0x0017040A
ED SDWCR10A, 0x31020707
ED SDWCR11A, 0x0017040A
ED SDDRVCR0A, 0x055557ff
ED SDWCR2A, 0x30000000
LIST "drive CKE high"
ED_OR SDPCRA, 0x00000080
WAIT_MASK SDPCRA, 0x00000080, 0x00000080
LIST "wait >= 200 us"
ED SDGENCNTA, 0x00002710
WAIT_MASK SDGENCNTA, 0xFFFFFFFF, 0x00000000
LIST "issue reset command to LPDDR2 device"
ED SDMRACR0A, 0x0000003F
ED SDMRA1, 0x00000000
LIST "wait >= 10 (or 1) us (docs inconsistent)"
ED SDGENCNTA, 0x000001F4
WAIT_MASK SDGENCNTA, 0xFFFFFFFF, 0x00000000
LIST "MRW ZS initialization calibration command"
ED SDMRACR0A, 0x0000FF0A
ED SDMRA3, 0x00000000
LIST "wait >= 1 us"
ED SDGENCNTA, 0x00000032
WAIT_MASK SDGENCNTA, 0xFFFFFFFF, 0x00000000
LIST "specify operating mode in LPDDR2"
ED SDMRACR0A, 0x00002201
ED SDMRA1, 0x00000000
ED SDMRACR0A, 0x00000402
ED SDMRA1, 0x00000000
ED SDMRACR0A, 0x00000203
ED SDMRA1, 0x00000000
LIST "initialize DDR interface"
ED SDMRA2, 0x00000000
LIST "temperature sensor control"
ED SDMRTMPCRA, 0x88800004
ED SDMRTMPMSKA,0x00000004
LIST "auto-refreshing control"
ED RTCORA, 0xA55A0032
ED RTCORHA, 0xA55A000C
ED RTCSRA, 0xA55A2048
ED_OR SDCR0A, 0x00000800
ED_OR SDCR1A, 0x00000400
LIST "auto ZQ calibration control"
ED ZQCCRA, 0xFFF20000
ED_OR DLLCNT0B, 0x00000002
ED SDGENCNTB, 0x00000005
WAIT_MASK SDGENCNTB, 0xFFFFFFFF, 0x00000000
ED SDCR0B, 0xACC90159
ED SDCR1B, 0x00010059
ED SDWCRC0B, 0x50874114
ED SDWCRC1B, 0x33199B37
ED SDWCRC2B, 0x008F2313
ED SDWCR00B, 0x31020707
ED SDWCR01B, 0x0017040A
ED SDWCR10B, 0x31020707
ED SDWCR11B, 0x0017040A
ED SDDRVCR0B, 0x055557ff
ED SDWCR2B, 0x30000000
ED_OR SDPCRB, 0x00000080
WAIT_MASK SDPCRB, 0x00000080, 0x00000080
ED SDGENCNTB, 0x00002710
WAIT_MASK SDGENCNTB, 0xFFFFFFFF, 0x00000000
ED SDMRACR0B, 0x0000003F
LIST "upstream u-boot writes to SDMRA1A for both SBSC 1 and 2, which does"
LIST "not seem to make a lot of sense..."
ED SDMRB1, 0x00000000
ED SDGENCNTB, 0x000001F4
WAIT_MASK SDGENCNTB, 0xFFFFFFFF, 0x00000000
ED SDMRACR0B, 0x0000FF0A
ED SDMRB3, 0x00000000
ED SDGENCNTB, 0x00000032
WAIT_MASK SDGENCNTB, 0xFFFFFFFF, 0x00000000
ED SDMRACR0B, 0x00002201
ED SDMRB1, 0x00000000
ED SDMRACR0B, 0x00000402
ED SDMRB1, 0x00000000
ED SDMRACR0B, 0x00000203
ED SDMRB1, 0x00000000
ED SDMRB2, 0x00000000
ED SDMRTMPCRB, 0x88800004
ED SDMRTMPMSKB, 0x00000004
ED RTCORB, 0xA55A0032
ED RTCORHB, 0xA55A000C
ED RTCSRB, 0xA55A2048
ED_OR SDCR0B, 0x00000800
ED_OR SDCR1B, 0x00000400
ED ZQCCRB, 0xFFF20000
ED_OR SDPDCR0B, 0x00030000
ED DPHYCNT1B, 0xA5390000
ED DPHYCNT0B, 0x00001200
ED DPHYCNT1B, 0x07CE0000
ED DPHYCNT0B, 0x00001247
WAIT_MASK DPHYCNT2B, 0xFFFFFFFF, 0x07CE0000
ED_AND SDPDCR0B, 0xFFFCFFFF
ED FRQCRD, 0x00000B0B
WAIT_MASK FRQCRD, 0x80000000, 0x00000000
ED CPGXXCR4, 0xfffffffc
LIST "Setup SCIF4 / workaround"
EB PORT32CR, 0x12
EB PORT33CR, 0x22
EB PORT34CR, 0x12
EB PORT35CR, 0x22
EW 0xE6C80000, 0
EB 0xE6C80004, 0x19
EW 0xE6C80008, 0x0030
EW 0xE6C80018, 0
EW 0xE6C80030, 0x0014
LIST "Magic to avoid hangs and corruption on DRAM writes."
LIST "It has been observed that the system would most often hang while"
LIST "decompressing the kernel, and if it didn't it would always write"
LIST "a corrupt image to DRAM."
LIST "This problem does not occur in u-boot, and the reason is that"
LIST "u-boot performs an additional cache invalidation after setting up"
LIST "the DRAM controller. Such an invalidation should not be necessary at"
LIST "this point, and attempts at removing parts of the routine to arrive"
LIST "at the minimal snippet of code necessary to avoid the DRAM stability"
LIST "problem yielded the following:"
MRC p15, 0, r0, c1, c0, 0
MCR p15, 0, r0, c1, c0, 0
arch/arm/mach-shmobile/include/mach/zboot.h
浏览文件 @ 930b440c
......@@ -12,6 +12,9 @@
#ifdef CONFIG_MACH_MACKEREL
#define MEMORY_START 0x40000000
#include "mach/head-mackerel.txt"
#elif defined(CONFIG_MACH_KZM9G) || defined(CONFIG_MACH_KZM9G_REFERENCE)
#define MEMORY_START 0x43000000
#include "mach/head-kzm9g.txt"
#else
#error "unsupported board."
#endif
......
arch/arm/mach-shmobile/include/mach/zboot_macros.h
浏览文件 @ 930b440c
......@@ -62,4 +62,47 @@
2 :
.endm
/* loop until a given value has been read (with mask) */
.macro WAIT_MASK, addr, data, cmp
LDR r0, 2f
LDR r1, 3f
LDR r2, 4f
1:
LDR r3, [r0, #0]
AND r3, r1, r3
CMP r2, r3
BNE 1b
B 5f
2: .long \addr
3: .long \data
4: .long \cmp
5:
.endm
/* read 32-bit value from addr, "or" an immediate and write back */
.macro ED_OR, addr, data
LDR r4, 1f
LDR r5, 2f
LDR r6, [r4]
ORR r5, r6, r5
STR r5, [r4]
B 3f
1: .long \addr
2: .long \data
3:
.endm
/* read 32-bit value from addr, "and" an immediate and write back */
.macro ED_AND, addr, data
LDR r4, 1f
LDR r5, 2f
LDR r6, [r4]
AND r5, r6, r5
STR r5, [r4]
B 3f
1: .long \addr
2: .long \data
3:
.endm
#endif /* __ZBOOT_MACRO_H */
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