MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: NChad Reese <kreese@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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