提交 8f94d24b 编写于 作者: B Ben Widawsky 提交者: Daniel Vetter

drm/i915/bdw: Add FBC support

This got lost when we shuffled around our internal branch and
GEN7_FEATURES macro. There were no HW changes to support FBC, so we just
need to set the flag.

v2: Don't allow FBC for any pipe but A on platforms with DDI. (Paulo)

Cc: Daisy Sun <daisy.sun@intel.com>
Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 f62a0076
...@@ -265,6 +265,7 @@ static const struct intel_device_info intel_broadwell_d_info = { ...@@ -265,6 +265,7 @@ static const struct intel_device_info intel_broadwell_d_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.has_llc = 1, .has_llc = 1,
.has_ddi = 1, .has_ddi = 1,
.has_fbc = 1,
GEN_DEFAULT_PIPEOFFSETS, GEN_DEFAULT_PIPEOFFSETS,
}; };
...@@ -274,6 +275,7 @@ static const struct intel_device_info intel_broadwell_m_info = { ...@@ -274,6 +275,7 @@ static const struct intel_device_info intel_broadwell_m_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.has_llc = 1, .has_llc = 1,
.has_ddi = 1, .has_ddi = 1,
.has_fbc = 1,
GEN_DEFAULT_PIPEOFFSETS, GEN_DEFAULT_PIPEOFFSETS,
}; };
......
...@@ -540,7 +540,7 @@ void intel_update_fbc(struct drm_device *dev) ...@@ -540,7 +540,7 @@ void intel_update_fbc(struct drm_device *dev)
DRM_DEBUG_KMS("mode too large for compression, disabling\n"); DRM_DEBUG_KMS("mode too large for compression, disabling\n");
goto out_disable; goto out_disable;
} }
if ((INTEL_INFO(dev)->gen < 4 || IS_HASWELL(dev)) && if ((INTEL_INFO(dev)->gen < 4 || HAS_DDI(dev)) &&
intel_crtc->plane != PLANE_A) { intel_crtc->plane != PLANE_A) {
if (set_no_fbc_reason(dev_priv, FBC_BAD_PLANE)) if (set_no_fbc_reason(dev_priv, FBC_BAD_PLANE))
DRM_DEBUG_KMS("plane not A, disabling compression\n"); DRM_DEBUG_KMS("plane not A, disabling compression\n");
......
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