提交 89e7ada4 编写于 作者: J Jay Agarwal 提交者: Stephen Warren

ARM: tegra: Enable PCIe controller on Cardhu

Root port 2 is routed to the bottom connector on Cardhu and is used by
the development dock to provide gigabit ethernet and USB functionality.
Signed-off-by: NJay Agarwal <jagarwal@nvidia.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
上级 e07e3dbd
......@@ -31,6 +31,26 @@
reg = <0x80000000 0x40000000>;
};
pcie-controller {
status = "okay";
pex-clk-supply = <&pex_hvdd_3v3_reg>;
vdd-supply = <&ldo1_reg>;
avdd-supply = <&ldo2_reg>;
pci@1,0 {
nvidia,num-lanes = <4>;
};
pci@2,0 {
nvidia,num-lanes = <1>;
};
pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;
};
};
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
......
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