提交 87fec051 编写于 作者: A Anton Blanchard 提交者: Benjamin Herrenschmidt

powerpc: PTRACE_PEEKUSR/PTRACE_POKEUSER of FPR registers in little endian builds

FPRs overlap the high 64bits of the first 32 VSX registers. The
ptrace FP read/write code assumes big endian ordering and grabs
the lowest 64 bits.

Fix this by using the TS_FPR macro which does the right thing.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
上级 e156bd8a
......@@ -1554,8 +1554,8 @@ long arch_ptrace(struct task_struct *child, long request,
flush_fp_to_thread(child);
if (fpidx < (PT_FPSCR - PT_FPR0))
tmp = ((unsigned long *)child->thread.fpr)
[fpidx * TS_FPRWIDTH];
memcpy(&tmp, &child->thread.TS_FPR(fpidx),
sizeof(long));
else
tmp = child->thread.fpscr.val;
}
......@@ -1587,8 +1587,8 @@ long arch_ptrace(struct task_struct *child, long request,
flush_fp_to_thread(child);
if (fpidx < (PT_FPSCR - PT_FPR0))
((unsigned long *)child->thread.fpr)
[fpidx * TS_FPRWIDTH] = data;
memcpy(&child->thread.TS_FPR(fpidx), &data,
sizeof(long));
else
child->thread.fpscr.val = data;
ret = 0;
......
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