提交 8580a646 编写于 作者: J John Garry 提交者: Zheng Zengkai

scsi: pm8001: Fix bogus FW crash for maxcpus=1

stable inclusion
from stable-v5.10.101
commit 12cf1208035d72a0e6a0f4127b2cbc3961154240
bugzilla: https://gitee.com/openeuler/kernel/issues/I5669Z

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=12cf1208035d72a0e6a0f4127b2cbc3961154240

--------------------------------

[ Upstream commit 62afb379 ]

According to the comment in check_fw_ready() we should not check the
IOP1_READY field in register SCRATCH_PAD_1 for 8008 or 8009 controllers.

However we check this very field in process_oq() for processing the highest
index interrupt vector. The highest interrupt vector is checked as the FW
is programmed to signal fatal errors through this irq.

Change that function to not check IOP1_READY for those mentioned
controllers, but do check ILA_READY in both cases.

The reason I assume that this was not hit earlier was because we always
allocated 64 MSI(X), and just did not pass the vector index check in
process_oq(), i.e.  the handler never ran for vector index 63.

Link: https://lore.kernel.org/r/1642508105-95432-1-git-send-email-john.garry@huawei.comTested-by: NDamien Le Moal <damien.lemoal@opensource.wdc.com>
Reviewed-by: NDamien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: NJohn Garry <john.garry@huawei.com>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NYu Liao <liaoyu15@huawei.com>
Reviewed-by: NWei Li <liwei391@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 65aaeca1
...@@ -4066,10 +4066,22 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) ...@@ -4066,10 +4066,22 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec)
unsigned long flags; unsigned long flags;
u32 regval; u32 regval;
/*
* Fatal errors are programmed to be signalled in irq vector
* pm8001_ha->max_q_num - 1 through pm8001_ha->main_cfg_tbl.pm80xx_tbl.
* fatal_err_interrupt
*/
if (vec == (pm8001_ha->max_q_num - 1)) { if (vec == (pm8001_ha->max_q_num - 1)) {
u32 mipsall_ready;
if (pm8001_ha->chip_id == chip_8008 ||
pm8001_ha->chip_id == chip_8009)
mipsall_ready = SCRATCH_PAD_MIPSALL_READY_8PORT;
else
mipsall_ready = SCRATCH_PAD_MIPSALL_READY_16PORT;
regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1); regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
if ((regval & SCRATCH_PAD_MIPSALL_READY) != if ((regval & mipsall_ready) != mipsall_ready) {
SCRATCH_PAD_MIPSALL_READY) {
pm8001_ha->controller_fatal_error = true; pm8001_ha->controller_fatal_error = true;
pm8001_dbg(pm8001_ha, FAIL, pm8001_dbg(pm8001_ha, FAIL,
"Firmware Fatal error! Regval:0x%x\n", "Firmware Fatal error! Regval:0x%x\n",
......
...@@ -1391,8 +1391,12 @@ typedef struct SASProtocolTimerConfig SASProtocolTimerConfig_t; ...@@ -1391,8 +1391,12 @@ typedef struct SASProtocolTimerConfig SASProtocolTimerConfig_t;
#define SCRATCH_PAD_BOOT_LOAD_SUCCESS 0x0 #define SCRATCH_PAD_BOOT_LOAD_SUCCESS 0x0
#define SCRATCH_PAD_IOP0_READY 0xC00 #define SCRATCH_PAD_IOP0_READY 0xC00
#define SCRATCH_PAD_IOP1_READY 0x3000 #define SCRATCH_PAD_IOP1_READY 0x3000
#define SCRATCH_PAD_MIPSALL_READY (SCRATCH_PAD_IOP1_READY | \ #define SCRATCH_PAD_MIPSALL_READY_16PORT (SCRATCH_PAD_IOP1_READY | \
SCRATCH_PAD_IOP0_READY | \ SCRATCH_PAD_IOP0_READY | \
SCRATCH_PAD_ILA_READY | \
SCRATCH_PAD_RAAE_READY)
#define SCRATCH_PAD_MIPSALL_READY_8PORT (SCRATCH_PAD_IOP0_READY | \
SCRATCH_PAD_ILA_READY | \
SCRATCH_PAD_RAAE_READY) SCRATCH_PAD_RAAE_READY)
/* boot loader state */ /* boot loader state */
......
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